diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt | 2108 |
1 files changed, 1054 insertions, 1054 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt index 767e8859f..8edb1ca7a 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor/stats.txt @@ -1,138 +1,138 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 51.667585 # Number of seconds simulated -sim_ticks 51667585479000 # Number of ticks simulated -final_tick 51667585479000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 51.667490 # Number of seconds simulated +sim_ticks 51667489826000 # Number of ticks simulated +final_tick 51667489826000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 173260 # Simulator instruction rate (inst/s) -host_op_rate 203581 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 9711995066 # Simulator tick rate (ticks/s) -host_mem_usage 728604 # Number of bytes of host memory used -host_seconds 5319.98 # Real time elapsed on the host -sim_insts 921741550 # Number of instructions simulated -sim_ops 1083047600 # Number of ops (including micro ops) simulated +host_inst_rate 98445 # Simulator instruction rate (inst/s) +host_op_rate 115675 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5518412939 # Simulator tick rate (ticks/s) +host_mem_usage 676348 # Number of bytes of host memory used +host_seconds 9362.74 # Real time elapsed on the host +sim_insts 921716010 # Number of instructions simulated +sim_ops 1083032845 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks -system.physmem.bytes_read::cpu.dtb.walker 358592 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.itb.walker 308608 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.inst 10084224 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.data 94130760 # Number of bytes read from this memory -system.physmem.bytes_read::realview.ide 400576 # Number of bytes read from this memory -system.physmem.bytes_read::total 105282760 # Number of bytes read from this memory -system.physmem.bytes_inst_read::cpu.inst 10084224 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::total 10084224 # Number of instructions bytes read from this memory -system.physmem.bytes_written::writebacks 87776448 # Number of bytes written to this memory +system.physmem.bytes_read::cpu.dtb.walker 356224 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.itb.walker 294592 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.inst 10211648 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.data 93641864 # Number of bytes read from this memory +system.physmem.bytes_read::realview.ide 394368 # Number of bytes read from this memory +system.physmem.bytes_read::total 104898696 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu.inst 10211648 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 10211648 # Number of instructions bytes read from this memory +system.physmem.bytes_written::writebacks 87439552 # Number of bytes written to this memory system.physmem.bytes_written::cpu.data 20580 # Number of bytes written to this memory -system.physmem.bytes_written::total 87797028 # Number of bytes written to this memory -system.physmem.num_reads::cpu.dtb.walker 5603 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.itb.walker 4822 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.inst 157566 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.data 1470806 # Number of read requests responded to by this memory -system.physmem.num_reads::realview.ide 6259 # Number of read requests responded to by this memory -system.physmem.num_reads::total 1645056 # Number of read requests responded to by this memory -system.physmem.num_writes::writebacks 1371507 # Number of write requests responded to by this memory +system.physmem.bytes_written::total 87460132 # Number of bytes written to this memory +system.physmem.num_reads::cpu.dtb.walker 5566 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.itb.walker 4603 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.inst 159557 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.data 1463167 # Number of read requests responded to by this memory +system.physmem.num_reads::realview.ide 6162 # Number of read requests responded to by this memory +system.physmem.num_reads::total 1639055 # Number of read requests responded to by this memory +system.physmem.num_writes::writebacks 1366243 # Number of write requests responded to by this memory system.physmem.num_writes::cpu.data 2573 # Number of write requests responded to by this memory -system.physmem.num_writes::total 1374080 # Number of write requests responded to by this memory -system.physmem.bw_read::cpu.dtb.walker 6940 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.itb.walker 5973 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.inst 195175 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.data 1821853 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::realview.ide 7753 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 2037695 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu.inst 195175 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 195175 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_write::writebacks 1698869 # Write bandwidth from this memory (bytes/s) +system.physmem.num_writes::total 1368816 # Number of write requests responded to by this memory +system.physmem.bw_read::cpu.dtb.walker 6895 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.itb.walker 5702 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.inst 197642 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 1812394 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::realview.ide 7633 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 2030265 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 197642 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 197642 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write::writebacks 1692351 # Write bandwidth from this memory (bytes/s) system.physmem.bw_write::cpu.data 398 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 1699267 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total::writebacks 1698869 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.dtb.walker 6940 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.itb.walker 5973 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.inst 195175 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.data 1822252 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::realview.ide 7753 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 3736962 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 1645056 # Number of read requests accepted -system.physmem.writeReqs 1374080 # Number of write requests accepted -system.physmem.readBursts 1645056 # Number of DRAM read bursts, including those serviced by the write queue -system.physmem.writeBursts 1374080 # Number of DRAM write bursts, including those merged in the write queue -system.physmem.bytesReadDRAM 105226304 # Total number of bytes read from DRAM -system.physmem.bytesReadWrQ 57280 # Total number of bytes read from write queue -system.physmem.bytesWritten 87795840 # Total number of bytes written to DRAM -system.physmem.bytesReadSys 105282760 # Total read bytes from the system interface side -system.physmem.bytesWrittenSys 87797028 # Total written bytes from the system interface side -system.physmem.servicedByWrQ 895 # Number of DRAM read bursts serviced by the write queue +system.physmem.bw_write::total 1692750 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::writebacks 1692351 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.dtb.walker 6895 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.itb.walker 5702 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 197642 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 1812793 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::realview.ide 7633 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 3723015 # Total bandwidth to/from this memory (bytes/s) +system.physmem.readReqs 1639055 # Number of read requests accepted +system.physmem.writeReqs 1368816 # Number of write requests accepted +system.physmem.readBursts 1639055 # Number of DRAM read bursts, including those serviced by the write queue +system.physmem.writeBursts 1368816 # Number of DRAM write bursts, including those merged in the write queue +system.physmem.bytesReadDRAM 104838592 # Total number of bytes read from DRAM +system.physmem.bytesReadWrQ 60928 # Total number of bytes read from write queue +system.physmem.bytesWritten 87458560 # Total number of bytes written to DRAM +system.physmem.bytesReadSys 104898696 # Total read bytes from the system interface side +system.physmem.bytesWrittenSys 87460132 # Total written bytes from the system interface side +system.physmem.servicedByWrQ 952 # Number of DRAM read bursts serviced by the write queue system.physmem.mergedWrBursts 2245 # Number of DRAM write bursts merged with an existing one -system.physmem.neitherReadNorWriteReqs 144878 # Number of requests that are neither read nor write -system.physmem.perBankRdBursts::0 98762 # Per bank write bursts -system.physmem.perBankRdBursts::1 104908 # Per bank write bursts -system.physmem.perBankRdBursts::2 100268 # Per bank write bursts -system.physmem.perBankRdBursts::3 95741 # Per bank write bursts -system.physmem.perBankRdBursts::4 100817 # Per bank write bursts -system.physmem.perBankRdBursts::5 109226 # Per bank write bursts -system.physmem.perBankRdBursts::6 96584 # Per bank write bursts -system.physmem.perBankRdBursts::7 96517 # Per bank write bursts -system.physmem.perBankRdBursts::8 93312 # Per bank write bursts -system.physmem.perBankRdBursts::9 154793 # Per bank write bursts -system.physmem.perBankRdBursts::10 99831 # Per bank write bursts -system.physmem.perBankRdBursts::11 102735 # Per bank write bursts -system.physmem.perBankRdBursts::12 98206 # Per bank write bursts -system.physmem.perBankRdBursts::13 101977 # Per bank write bursts -system.physmem.perBankRdBursts::14 93251 # Per bank write bursts -system.physmem.perBankRdBursts::15 97233 # Per bank write bursts -system.physmem.perBankWrBursts::0 83938 # Per bank write bursts -system.physmem.perBankWrBursts::1 86643 # Per bank write bursts -system.physmem.perBankWrBursts::2 85449 # Per bank write bursts -system.physmem.perBankWrBursts::3 83391 # Per bank write bursts -system.physmem.perBankWrBursts::4 87884 # Per bank write bursts -system.physmem.perBankWrBursts::5 92979 # Per bank write bursts -system.physmem.perBankWrBursts::6 83797 # Per bank write bursts -system.physmem.perBankWrBursts::7 84591 # Per bank write bursts -system.physmem.perBankWrBursts::8 82134 # Per bank write bursts -system.physmem.perBankWrBursts::9 88444 # Per bank write bursts -system.physmem.perBankWrBursts::10 84764 # Per bank write bursts -system.physmem.perBankWrBursts::11 87315 # Per bank write bursts -system.physmem.perBankWrBursts::12 85408 # Per bank write bursts -system.physmem.perBankWrBursts::13 87944 # Per bank write bursts -system.physmem.perBankWrBursts::14 81647 # Per bank write bursts -system.physmem.perBankWrBursts::15 85482 # Per bank write bursts +system.physmem.neitherReadNorWriteReqs 145140 # Number of requests that are neither read nor write +system.physmem.perBankRdBursts::0 96907 # Per bank write bursts +system.physmem.perBankRdBursts::1 103074 # Per bank write bursts +system.physmem.perBankRdBursts::2 99514 # Per bank write bursts +system.physmem.perBankRdBursts::3 96513 # Per bank write bursts +system.physmem.perBankRdBursts::4 97689 # Per bank write bursts +system.physmem.perBankRdBursts::5 108359 # Per bank write bursts +system.physmem.perBankRdBursts::6 97886 # Per bank write bursts +system.physmem.perBankRdBursts::7 97902 # Per bank write bursts +system.physmem.perBankRdBursts::8 96810 # Per bank write bursts +system.physmem.perBankRdBursts::9 157961 # Per bank write bursts +system.physmem.perBankRdBursts::10 100161 # Per bank write bursts +system.physmem.perBankRdBursts::11 104541 # Per bank write bursts +system.physmem.perBankRdBursts::12 94779 # Per bank write bursts +system.physmem.perBankRdBursts::13 97199 # Per bank write bursts +system.physmem.perBankRdBursts::14 94176 # Per bank write bursts +system.physmem.perBankRdBursts::15 94632 # Per bank write bursts +system.physmem.perBankWrBursts::0 82268 # Per bank write bursts +system.physmem.perBankWrBursts::1 85491 # Per bank write bursts +system.physmem.perBankWrBursts::2 84713 # Per bank write bursts +system.physmem.perBankWrBursts::3 83877 # Per bank write bursts +system.physmem.perBankWrBursts::4 85039 # Per bank write bursts +system.physmem.perBankWrBursts::5 91961 # Per bank write bursts +system.physmem.perBankWrBursts::6 84027 # Per bank write bursts +system.physmem.perBankWrBursts::7 85348 # Per bank write bursts +system.physmem.perBankWrBursts::8 84923 # Per bank write bursts +system.physmem.perBankWrBursts::9 91534 # Per bank write bursts +system.physmem.perBankWrBursts::10 85936 # Per bank write bursts +system.physmem.perBankWrBursts::11 89456 # Per bank write bursts +system.physmem.perBankWrBursts::12 82822 # Per bank write bursts +system.physmem.perBankWrBursts::13 84269 # Per bank write bursts +system.physmem.perBankWrBursts::14 82271 # Per bank write bursts +system.physmem.perBankWrBursts::15 82605 # Per bank write bursts system.physmem.numRdRetry 0 # Number of times read queue was full causing retry -system.physmem.numWrRetry 15 # Number of times write queue was full causing retry -system.physmem.totGap 51667583532000 # Total gap between requests +system.physmem.numWrRetry 26 # Number of times write queue was full causing retry +system.physmem.totGap 51667488071000 # Total gap between requests system.physmem.readPktSize::0 0 # Read request sizes (log2) system.physmem.readPktSize::1 0 # Read request sizes (log2) system.physmem.readPktSize::2 0 # Read request sizes (log2) system.physmem.readPktSize::3 13 # Read request sizes (log2) system.physmem.readPktSize::4 2 # Read request sizes (log2) system.physmem.readPktSize::5 0 # Read request sizes (log2) -system.physmem.readPktSize::6 1645041 # Read request sizes (log2) +system.physmem.readPktSize::6 1639040 # Read request sizes (log2) system.physmem.writePktSize::0 0 # Write request sizes (log2) system.physmem.writePktSize::1 0 # Write request sizes (log2) system.physmem.writePktSize::2 1 # Write request sizes (log2) system.physmem.writePktSize::3 2572 # Write request sizes (log2) system.physmem.writePktSize::4 0 # Write request sizes (log2) system.physmem.writePktSize::5 0 # Write request sizes (log2) -system.physmem.writePktSize::6 1371507 # Write request sizes (log2) -system.physmem.rdQLenPdf::0 1321455 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::1 316451 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::2 938 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::3 316 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::4 463 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::5 532 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::6 518 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::7 1146 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::8 697 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::9 315 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::10 350 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::11 165 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::12 161 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::13 122 # What read queue length does an incoming req see +system.physmem.writePktSize::6 1366243 # Write request sizes (log2) +system.physmem.rdQLenPdf::0 1313990 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::1 317969 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::2 940 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::3 332 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::4 443 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::5 534 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::6 495 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::7 1094 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::8 660 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::9 341 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::10 336 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::11 159 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::12 164 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::13 118 # What read queue length does an incoming req see system.physmem.rdQLenPdf::14 109 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::15 107 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::16 101 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::17 93 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::18 68 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::19 50 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::20 4 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::15 103 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::16 95 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::17 91 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::18 73 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::19 54 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::20 3 # What read queue length does an incoming req see system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see @@ -159,162 +159,163 @@ system.physmem.wrQLenPdf::11 1 # Wh system.physmem.wrQLenPdf::12 1 # What write queue length does an incoming req see system.physmem.wrQLenPdf::13 1 # What write queue length does an incoming req see system.physmem.wrQLenPdf::14 1 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::15 15056 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::16 17226 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::17 66293 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::18 80848 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::19 82840 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::20 82796 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::21 83570 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::22 83932 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::23 85472 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::24 84523 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::25 85247 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::26 89567 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::27 84372 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::28 83217 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::29 92227 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::30 82440 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::31 83507 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::32 80252 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::33 1030 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::34 604 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::35 418 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::36 449 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::37 392 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::38 379 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::39 396 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::40 370 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::41 331 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::42 325 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::43 325 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::44 366 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::45 288 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::46 288 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::47 310 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::48 313 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::49 334 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::50 190 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::51 212 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::52 178 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::53 179 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::54 156 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::55 152 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::56 100 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::57 81 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::58 54 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::59 64 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::60 39 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::61 46 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::62 24 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::63 42 # What write queue length does an incoming req see -system.physmem.bytesPerActivate::samples 646368 # Bytes accessed per row activation -system.physmem.bytesPerActivate::mean 298.625675 # Bytes accessed per row activation -system.physmem.bytesPerActivate::gmean 174.464471 # Bytes accessed per row activation -system.physmem.bytesPerActivate::stdev 324.594716 # Bytes accessed per row activation -system.physmem.bytesPerActivate::0-127 252807 39.11% 39.11% # Bytes accessed per row activation -system.physmem.bytesPerActivate::128-255 155954 24.13% 63.24% # Bytes accessed per row activation -system.physmem.bytesPerActivate::256-383 60049 9.29% 72.53% # Bytes accessed per row activation -system.physmem.bytesPerActivate::384-511 34895 5.40% 77.93% # Bytes accessed per row activation -system.physmem.bytesPerActivate::512-639 25863 4.00% 81.93% # Bytes accessed per row activation -system.physmem.bytesPerActivate::640-767 18951 2.93% 84.86% # Bytes accessed per row activation -system.physmem.bytesPerActivate::768-895 14056 2.17% 87.04% # Bytes accessed per row activation -system.physmem.bytesPerActivate::896-1023 13035 2.02% 89.05% # Bytes accessed per row activation -system.physmem.bytesPerActivate::1024-1151 70758 10.95% 100.00% # Bytes accessed per row activation -system.physmem.bytesPerActivate::total 646368 # Bytes accessed per row activation -system.physmem.rdPerTurnAround::samples 79614 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::mean 20.651179 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::stdev 282.749901 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::0-4095 79611 100.00% 100.00% # Reads before turning the bus around for writes +system.physmem.wrQLenPdf::15 14883 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::16 17196 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::17 65910 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::18 80385 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::19 82507 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::20 82508 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::21 83232 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::22 83418 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::23 85151 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::24 84166 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::25 84814 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::26 89146 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::27 84019 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::28 82787 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::29 91825 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::30 82010 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::31 83266 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::32 79973 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::33 1221 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::34 663 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::35 487 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::36 510 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::37 476 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::38 421 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::39 348 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::40 389 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::41 302 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::42 399 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::43 340 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::44 412 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::45 268 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::46 306 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::47 328 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::48 306 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::49 350 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::50 244 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::51 174 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::52 164 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::53 184 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::54 172 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::55 177 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::56 135 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::57 114 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::58 95 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::59 109 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::60 91 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::61 76 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::62 45 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::63 54 # What write queue length does an incoming req see +system.physmem.bytesPerActivate::samples 648381 # Bytes accessed per row activation +system.physmem.bytesPerActivate::mean 296.579894 # Bytes accessed per row activation +system.physmem.bytesPerActivate::gmean 173.167741 # Bytes accessed per row activation +system.physmem.bytesPerActivate::stdev 323.754919 # Bytes accessed per row activation +system.physmem.bytesPerActivate::0-127 255622 39.42% 39.42% # Bytes accessed per row activation +system.physmem.bytesPerActivate::128-255 156386 24.12% 63.54% # Bytes accessed per row activation +system.physmem.bytesPerActivate::256-383 60110 9.27% 72.81% # Bytes accessed per row activation +system.physmem.bytesPerActivate::384-511 34859 5.38% 78.19% # Bytes accessed per row activation +system.physmem.bytesPerActivate::512-639 25315 3.90% 82.10% # Bytes accessed per row activation +system.physmem.bytesPerActivate::640-767 18876 2.91% 85.01% # Bytes accessed per row activation +system.physmem.bytesPerActivate::768-895 13882 2.14% 87.15% # Bytes accessed per row activation +system.physmem.bytesPerActivate::896-1023 12930 1.99% 89.14% # Bytes accessed per row activation +system.physmem.bytesPerActivate::1024-1151 70401 10.86% 100.00% # Bytes accessed per row activation +system.physmem.bytesPerActivate::total 648381 # Bytes accessed per row activation +system.physmem.rdPerTurnAround::samples 79285 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::mean 20.660314 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::stdev 283.326654 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::0-4095 79282 100.00% 100.00% # Reads before turning the bus around for writes system.physmem.rdPerTurnAround::4096-8191 1 0.00% 100.00% # Reads before turning the bus around for writes system.physmem.rdPerTurnAround::24576-28671 1 0.00% 100.00% # Reads before turning the bus around for writes system.physmem.rdPerTurnAround::73728-77823 1 0.00% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::total 79614 # Reads before turning the bus around for writes -system.physmem.wrPerTurnAround::samples 79614 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::mean 17.230763 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::gmean 16.794029 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::stdev 6.276538 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::16-19 77327 97.13% 97.13% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::20-23 304 0.38% 97.51% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::24-27 53 0.07% 97.58% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::28-31 307 0.39% 97.96% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::32-35 57 0.07% 98.03% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::36-39 338 0.42% 98.46% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::40-43 219 0.28% 98.73% # Writes before turning the bus around for reads +system.physmem.rdPerTurnAround::total 79285 # Reads before turning the bus around for writes +system.physmem.wrPerTurnAround::samples 79285 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::mean 17.235795 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::gmean 16.792425 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::stdev 6.378813 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::16-19 77022 97.15% 97.15% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::20-23 299 0.38% 97.52% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::24-27 59 0.07% 97.60% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::28-31 299 0.38% 97.97% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::32-35 54 0.07% 98.04% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::36-39 317 0.40% 98.44% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::40-43 225 0.28% 98.73% # Writes before turning the bus around for reads system.physmem.wrPerTurnAround::44-47 23 0.03% 98.76% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::48-51 64 0.08% 98.84% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::52-55 131 0.16% 99.01% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::56-59 34 0.04% 99.05% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::60-63 35 0.04% 99.09% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::64-67 493 0.62% 99.71% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::68-71 27 0.03% 99.75% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::72-75 21 0.03% 99.77% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::76-79 122 0.15% 99.93% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::80-83 7 0.01% 99.93% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::84-87 1 0.00% 99.94% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::92-95 1 0.00% 99.94% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::48-51 58 0.07% 98.83% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::52-55 133 0.17% 99.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::56-59 25 0.03% 99.03% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::60-63 40 0.05% 99.08% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::64-67 480 0.61% 99.68% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::68-71 36 0.05% 99.73% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::72-75 17 0.02% 99.75% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::76-79 132 0.17% 99.92% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::80-83 8 0.01% 99.93% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::84-87 2 0.00% 99.93% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::92-95 3 0.00% 99.93% # Writes before turning the bus around for reads system.physmem.wrPerTurnAround::96-99 2 0.00% 99.94% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::100-103 4 0.01% 99.94% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::108-111 1 0.00% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::116-119 2 0.00% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::120-123 1 0.00% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::124-127 4 0.01% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::128-131 27 0.03% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::136-139 1 0.00% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::140-143 2 0.00% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::152-155 2 0.00% 99.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::100-103 5 0.01% 99.94% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::104-107 1 0.00% 99.94% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::124-127 2 0.00% 99.95% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::128-131 28 0.04% 99.98% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::132-135 1 0.00% 99.98% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::136-139 1 0.00% 99.98% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::140-143 3 0.00% 99.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::144-147 1 0.00% 99.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::152-155 4 0.01% 99.99% # Writes before turning the bus around for reads system.physmem.wrPerTurnAround::156-159 3 0.00% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::160-163 1 0.00% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::total 79614 # Writes before turning the bus around for reads -system.physmem.totQLat 26413369588 # Total ticks spent queuing -system.physmem.totMemAccLat 57241388338 # Total ticks spent from burst creation until serviced by the DRAM -system.physmem.totBusLat 8220805000 # Total ticks spent in databus transfers -system.physmem.avgQLat 16064.95 # Average queueing delay per DRAM burst +system.physmem.wrPerTurnAround::164-167 1 0.00% 100.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::176-179 1 0.00% 100.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::total 79285 # Writes before turning the bus around for reads +system.physmem.totQLat 26536419219 # Total ticks spent queuing +system.physmem.totMemAccLat 57250850469 # Total ticks spent from burst creation until serviced by the DRAM +system.physmem.totBusLat 8190515000 # Total ticks spent in databus transfers +system.physmem.avgQLat 16199.48 # Average queueing delay per DRAM burst system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst -system.physmem.avgMemAccLat 34814.95 # Average memory access latency per DRAM burst -system.physmem.avgRdBW 2.04 # Average DRAM read bandwidth in MiByte/s -system.physmem.avgWrBW 1.70 # Average achieved write bandwidth in MiByte/s -system.physmem.avgRdBWSys 2.04 # Average system read bandwidth in MiByte/s -system.physmem.avgWrBWSys 1.70 # Average system write bandwidth in MiByte/s +system.physmem.avgMemAccLat 34949.48 # Average memory access latency per DRAM burst +system.physmem.avgRdBW 2.03 # Average DRAM read bandwidth in MiByte/s +system.physmem.avgWrBW 1.69 # Average achieved write bandwidth in MiByte/s +system.physmem.avgRdBWSys 2.03 # Average system read bandwidth in MiByte/s +system.physmem.avgWrBWSys 1.69 # Average system write bandwidth in MiByte/s system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s system.physmem.busUtil 0.03 # Data bus utilization in percentage system.physmem.busUtilRead 0.02 # Data bus utilization in percentage for reads system.physmem.busUtilWrite 0.01 # Data bus utilization in percentage for writes system.physmem.avgRdQLen 1.00 # Average read queue length when enqueuing -system.physmem.avgWrQLen 21.46 # Average write queue length when enqueuing -system.physmem.readRowHits 1338705 # Number of row buffer hits during reads -system.physmem.writeRowHits 1030897 # Number of row buffer hits during writes -system.physmem.readRowHitRate 81.42 # Row buffer hit rate for reads -system.physmem.writeRowHitRate 75.15 # Row buffer hit rate for writes -system.physmem.avgGap 17113367.38 # Average gap between requests -system.physmem.pageHitRate 78.57 # Row buffer hit rate, read and write combined -system.physmem_0.actEnergy 2462533920 # Energy for activate commands per rank (pJ) -system.physmem_0.preEnergy 1343644500 # Energy for precharge commands per rank (pJ) -system.physmem_0.readEnergy 6262011600 # Energy for read commands per rank (pJ) -system.physmem_0.writeEnergy 4462594560 # Energy for write commands per rank (pJ) -system.physmem_0.refreshEnergy 3374675494320 # Energy for refresh commands per rank (pJ) -system.physmem_0.actBackEnergy 1320469447905 # Energy for active background per rank (pJ) -system.physmem_0.preBackEnergy 29842244670000 # Energy for precharge background per rank (pJ) -system.physmem_0.totalEnergy 34551920396805 # Total energy per rank (pJ) -system.physmem_0.averagePower 668.734956 # Core power per rank (mW) -system.physmem_0.memoryStateTime::IDLE 49644314314893 # Time in different power states -system.physmem_0.memoryStateTime::REF 1725294220000 # Time in different power states +system.physmem.avgWrQLen 24.18 # Average write queue length when enqueuing +system.physmem.readRowHits 1330988 # Number of row buffer hits during reads +system.physmem.writeRowHits 1025273 # Number of row buffer hits during writes +system.physmem.readRowHitRate 81.25 # Row buffer hit rate for reads +system.physmem.writeRowHitRate 75.03 # Row buffer hit rate for writes +system.physmem.avgGap 17177428.18 # Average gap between requests +system.physmem.pageHitRate 78.42 # Row buffer hit rate, read and write combined +system.physmem_0.actEnergy 2459736720 # Energy for activate commands per rank (pJ) +system.physmem_0.preEnergy 1342118250 # Energy for precharge commands per rank (pJ) +system.physmem_0.readEnergy 6223136400 # Energy for read commands per rank (pJ) +system.physmem_0.writeEnergy 4424051520 # Energy for write commands per rank (pJ) +system.physmem_0.refreshEnergy 3374668883040 # Energy for refresh commands per rank (pJ) +system.physmem_0.actBackEnergy 1319911106400 # Energy for active background per rank (pJ) +system.physmem_0.preBackEnergy 29842673702250 # Energy for precharge background per rank (pJ) +system.physmem_0.totalEnergy 34551702734580 # Total energy per rank (pJ) +system.physmem_0.averagePower 668.732053 # Core power per rank (mW) +system.physmem_0.memoryStateTime::IDLE 49645039210452 # Time in different power states +system.physmem_0.memoryStateTime::REF 1725290840000 # Time in different power states system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem_0.memoryStateTime::ACT 297976817607 # Time in different power states +system.physmem_0.memoryStateTime::ACT 297159003548 # Time in different power states system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states -system.physmem_1.actEnergy 2424008160 # Energy for activate commands per rank (pJ) -system.physmem_1.preEnergy 1322623500 # Energy for precharge commands per rank (pJ) -system.physmem_1.readEnergy 6562436400 # Energy for read commands per rank (pJ) -system.physmem_1.writeEnergy 4426734240 # Energy for write commands per rank (pJ) -system.physmem_1.refreshEnergy 3374675494320 # Energy for refresh commands per rank (pJ) -system.physmem_1.actBackEnergy 1320896835045 # Energy for active background per rank (pJ) -system.physmem_1.preBackEnergy 29841869760750 # Energy for precharge background per rank (pJ) -system.physmem_1.totalEnergy 34552177892415 # Total energy per rank (pJ) -system.physmem_1.averagePower 668.739940 # Core power per rank (mW) -system.physmem_1.memoryStateTime::IDLE 49643648149046 # Time in different power states -system.physmem_1.memoryStateTime::REF 1725294220000 # Time in different power states +system.physmem_1.actEnergy 2442023640 # Energy for activate commands per rank (pJ) +system.physmem_1.preEnergy 1332453375 # Energy for precharge commands per rank (pJ) +system.physmem_1.readEnergy 6554020200 # Energy for read commands per rank (pJ) +system.physmem_1.writeEnergy 4431127680 # Energy for write commands per rank (pJ) +system.physmem_1.refreshEnergy 3374668883040 # Energy for refresh commands per rank (pJ) +system.physmem_1.actBackEnergy 1320412056885 # Energy for active background per rank (pJ) +system.physmem_1.preBackEnergy 29842234272000 # Energy for precharge background per rank (pJ) +system.physmem_1.totalEnergy 34552074836820 # Total energy per rank (pJ) +system.physmem_1.averagePower 668.739255 # Core power per rank (mW) +system.physmem_1.memoryStateTime::IDLE 49644231851772 # Time in different power states +system.physmem_1.memoryStateTime::REF 1725290840000 # Time in different power states system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem_1.memoryStateTime::ACT 298642969704 # Time in different power states +system.physmem_1.memoryStateTime::ACT 297961425728 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states system.realview.nvmem.bytes_read::cpu.inst 704 # Number of bytes read from this memory system.realview.nvmem.bytes_read::cpu.data 36 # Number of bytes read from this memory @@ -338,15 +339,15 @@ system.cf0.dma_read_txs 122 # Nu system.cf0.dma_write_full_pages 1666 # Number of full page size DMA writes. system.cf0.dma_write_bytes 6826496 # Number of bytes transfered via DMA writes. system.cf0.dma_write_txs 1669 # Number of DMA write transactions. -system.cpu.branchPred.lookups 252423071 # Number of BP lookups -system.cpu.branchPred.condPredicted 176427079 # Number of conditional branches predicted -system.cpu.branchPred.condIncorrect 11938474 # Number of conditional branches incorrect -system.cpu.branchPred.BTBLookups 185221577 # Number of BTB lookups -system.cpu.branchPred.BTBHits 131501265 # Number of BTB hits +system.cpu.branchPred.lookups 252436095 # Number of BP lookups +system.cpu.branchPred.condPredicted 176405196 # Number of conditional branches predicted +system.cpu.branchPred.condIncorrect 11951074 # Number of conditional branches incorrect +system.cpu.branchPred.BTBLookups 185535740 # Number of BTB lookups +system.cpu.branchPred.BTBHits 131467669 # Number of BTB hits system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly. -system.cpu.branchPred.BTBHitPct 70.996731 # BTB Hit Percentage -system.cpu.branchPred.usedRAS 30906734 # Number of times the RAS was used to get a target. -system.cpu.branchPred.RASInCorrect 2133609 # Number of incorrect RAS predictions. +system.cpu.branchPred.BTBHitPct 70.858407 # BTB Hit Percentage +system.cpu.branchPred.usedRAS 30937069 # Number of times the RAS was used to get a target. +system.cpu.branchPred.RASInCorrect 2133020 # Number of incorrect RAS predictions. system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst @@ -377,63 +378,63 @@ system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 system.cpu.dstage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu.dstage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu.dtb.walker.walks 560833 # Table walker walks requested -system.cpu.dtb.walker.walksLong 560833 # Table walker walks initiated with long descriptors -system.cpu.dtb.walker.walksLongTerminationLevel::Level2 21083 # Level at which table walker walks with long descriptors terminate -system.cpu.dtb.walker.walksLongTerminationLevel::Level3 178899 # Level at which table walker walks with long descriptors terminate -system.cpu.dtb.walker.walkWaitTime::samples 560833 # Table walker wait (enqueue to first request) latency -system.cpu.dtb.walker.walkWaitTime::0 560833 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu.dtb.walker.walkWaitTime::total 560833 # Table walker wait (enqueue to first request) latency -system.cpu.dtb.walker.walkCompletionTime::samples 199982 # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::mean 27029.240132 # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::gmean 22851.547546 # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::stdev 20760.636291 # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::0-65535 197624 98.82% 98.82% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::65536-131071 5 0.00% 98.82% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::131072-196607 2039 1.02% 99.84% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::196608-262143 52 0.03% 99.87% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::262144-327679 109 0.05% 99.92% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::327680-393215 52 0.03% 99.95% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::393216-458751 79 0.04% 99.99% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walks 560363 # Table walker walks requested +system.cpu.dtb.walker.walksLong 560363 # Table walker walks initiated with long descriptors +system.cpu.dtb.walker.walksLongTerminationLevel::Level2 20601 # Level at which table walker walks with long descriptors terminate +system.cpu.dtb.walker.walksLongTerminationLevel::Level3 178609 # Level at which table walker walks with long descriptors terminate +system.cpu.dtb.walker.walkWaitTime::samples 560363 # Table walker wait (enqueue to first request) latency +system.cpu.dtb.walker.walkWaitTime::0 560363 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu.dtb.walker.walkWaitTime::total 560363 # Table walker wait (enqueue to first request) latency +system.cpu.dtb.walker.walkCompletionTime::samples 199210 # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::mean 27145.243713 # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::gmean 23005.972162 # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::stdev 20907.221064 # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::0-65535 196938 98.86% 98.86% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::65536-131071 1 0.00% 98.86% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::131072-196607 1933 0.97% 99.83% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::196608-262143 52 0.03% 99.86% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::262144-327679 120 0.06% 99.92% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::327680-393215 58 0.03% 99.95% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::393216-458751 84 0.04% 99.99% # Table walker service (enqueue to completion) latency system.cpu.dtb.walker.walkCompletionTime::458752-524287 11 0.01% 99.99% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::524288-589823 3 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::524288-589823 6 0.00% 100.00% # Table walker service (enqueue to completion) latency system.cpu.dtb.walker.walkCompletionTime::589824-655359 6 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::655360-720895 2 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu.dtb.walker.walkCompletionTime::total 199982 # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::655360-720895 1 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu.dtb.walker.walkCompletionTime::total 199210 # Table walker service (enqueue to completion) latency system.cpu.dtb.walker.walksPending::samples -1571833592 # Table walker pending requests distribution system.cpu.dtb.walker.walksPending::0 -1571833592 100.00% 100.00% # Table walker pending requests distribution system.cpu.dtb.walker.walksPending::total -1571833592 # Table walker pending requests distribution -system.cpu.dtb.walker.walkPageSizes::4K 178900 89.46% 89.46% # Table walker page sizes translated -system.cpu.dtb.walker.walkPageSizes::2M 21083 10.54% 100.00% # Table walker page sizes translated -system.cpu.dtb.walker.walkPageSizes::total 199983 # Table walker page sizes translated -system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 560833 # Table walker requests started/completed, data/inst +system.cpu.dtb.walker.walkPageSizes::4K 178610 89.66% 89.66% # Table walker page sizes translated +system.cpu.dtb.walker.walkPageSizes::2M 20601 10.34% 100.00% # Table walker page sizes translated +system.cpu.dtb.walker.walkPageSizes::total 199211 # Table walker page sizes translated +system.cpu.dtb.walker.walkRequestOrigin_Requested::Data 560363 # Table walker requests started/completed, data/inst system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst -system.cpu.dtb.walker.walkRequestOrigin_Requested::total 560833 # Table walker requests started/completed, data/inst -system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 199983 # Table walker requests started/completed, data/inst +system.cpu.dtb.walker.walkRequestOrigin_Requested::total 560363 # Table walker requests started/completed, data/inst +system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 199211 # Table walker requests started/completed, data/inst system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst -system.cpu.dtb.walker.walkRequestOrigin_Completed::total 199983 # Table walker requests started/completed, data/inst -system.cpu.dtb.walker.walkRequestOrigin::total 760816 # Table walker requests started/completed, data/inst +system.cpu.dtb.walker.walkRequestOrigin_Completed::total 199211 # Table walker requests started/completed, data/inst +system.cpu.dtb.walker.walkRequestOrigin::total 759574 # Table walker requests started/completed, data/inst system.cpu.dtb.inst_hits 0 # ITB inst hits system.cpu.dtb.inst_misses 0 # ITB inst misses -system.cpu.dtb.read_hits 178232351 # DTB read hits -system.cpu.dtb.read_misses 463077 # DTB read misses -system.cpu.dtb.write_hits 157845440 # DTB write hits -system.cpu.dtb.write_misses 97756 # DTB write misses +system.cpu.dtb.read_hits 178192284 # DTB read hits +system.cpu.dtb.read_misses 462603 # DTB read misses +system.cpu.dtb.write_hits 157870024 # DTB write hits +system.cpu.dtb.write_misses 97760 # DTB write misses system.cpu.dtb.flush_tlb 11 # Number of times complete TLB was flushed system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu.dtb.flush_tlb_mva_asid 45304 # Number of times TLB was flushed by MVA & ASID +system.cpu.dtb.flush_tlb_mva_asid 45300 # Number of times TLB was flushed by MVA & ASID system.cpu.dtb.flush_tlb_asid 1089 # Number of times TLB was flushed by ASID -system.cpu.dtb.flush_entries 77809 # Number of entries that have been flushed from TLB -system.cpu.dtb.align_faults 1378 # Number of TLB faults due to alignment restrictions -system.cpu.dtb.prefetch_faults 14628 # Number of TLB faults due to prefetch +system.cpu.dtb.flush_entries 78455 # Number of entries that have been flushed from TLB +system.cpu.dtb.align_faults 1375 # Number of TLB faults due to alignment restrictions +system.cpu.dtb.prefetch_faults 14585 # Number of TLB faults due to prefetch system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu.dtb.perms_faults 23069 # Number of TLB faults due to permissions restrictions -system.cpu.dtb.read_accesses 178695428 # DTB read accesses -system.cpu.dtb.write_accesses 157943196 # DTB write accesses +system.cpu.dtb.perms_faults 23059 # Number of TLB faults due to permissions restrictions +system.cpu.dtb.read_accesses 178654887 # DTB read accesses +system.cpu.dtb.write_accesses 157967784 # DTB write accesses system.cpu.dtb.inst_accesses 0 # ITB inst accesses -system.cpu.dtb.hits 336077791 # DTB hits -system.cpu.dtb.misses 560833 # DTB misses -system.cpu.dtb.accesses 336638624 # DTB accesses +system.cpu.dtb.hits 336062308 # DTB hits +system.cpu.dtb.misses 560363 # DTB misses +system.cpu.dtb.accesses 336622671 # DTB accesses system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -463,184 +464,183 @@ system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 system.cpu.istage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu.istage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu.itb.walker.walks 134950 # Table walker walks requested -system.cpu.itb.walker.walksLong 134950 # Table walker walks initiated with long descriptors -system.cpu.itb.walker.walksLongTerminationLevel::Level2 1074 # Level at which table walker walks with long descriptors terminate -system.cpu.itb.walker.walksLongTerminationLevel::Level3 117621 # Level at which table walker walks with long descriptors terminate -system.cpu.itb.walker.walkWaitTime::samples 134950 # Table walker wait (enqueue to first request) latency -system.cpu.itb.walker.walkWaitTime::0 134950 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu.itb.walker.walkWaitTime::total 134950 # Table walker wait (enqueue to first request) latency -system.cpu.itb.walker.walkCompletionTime::samples 118695 # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::mean 30170.011374 # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::gmean 25640.228509 # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::stdev 23413.242871 # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::0-65535 115997 97.73% 97.73% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::65536-131071 4 0.00% 97.73% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::131072-196607 2500 2.11% 99.84% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::196608-262143 50 0.04% 99.88% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::262144-327679 104 0.09% 99.97% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::327680-393215 27 0.02% 99.99% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::393216-458751 8 0.01% 100.00% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::458752-524287 2 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::524288-589823 3 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu.itb.walker.walkCompletionTime::total 118695 # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walks 134893 # Table walker walks requested +system.cpu.itb.walker.walksLong 134893 # Table walker walks initiated with long descriptors +system.cpu.itb.walker.walksLongTerminationLevel::Level2 1070 # Level at which table walker walks with long descriptors terminate +system.cpu.itb.walker.walksLongTerminationLevel::Level3 117642 # Level at which table walker walks with long descriptors terminate +system.cpu.itb.walker.walkWaitTime::samples 134893 # Table walker wait (enqueue to first request) latency +system.cpu.itb.walker.walkWaitTime::0 134893 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu.itb.walker.walkWaitTime::total 134893 # Table walker wait (enqueue to first request) latency +system.cpu.itb.walker.walkCompletionTime::samples 118712 # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::mean 30207.312656 # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::gmean 25802.029077 # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::stdev 23121.543530 # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::0-65535 116190 97.88% 97.88% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::65536-131071 6 0.01% 97.88% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::131072-196607 2295 1.93% 99.81% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::196608-262143 67 0.06% 99.87% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::262144-327679 109 0.09% 99.96% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::327680-393215 28 0.02% 99.99% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::393216-458751 11 0.01% 99.99% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::458752-524287 5 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::524288-589823 1 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu.itb.walker.walkCompletionTime::total 118712 # Table walker service (enqueue to completion) latency system.cpu.itb.walker.walksPending::samples -1572850092 # Table walker pending requests distribution system.cpu.itb.walker.walksPending::0 -1572850092 100.00% 100.00% # Table walker pending requests distribution system.cpu.itb.walker.walksPending::total -1572850092 # Table walker pending requests distribution -system.cpu.itb.walker.walkPageSizes::4K 117621 99.10% 99.10% # Table walker page sizes translated -system.cpu.itb.walker.walkPageSizes::2M 1074 0.90% 100.00% # Table walker page sizes translated -system.cpu.itb.walker.walkPageSizes::total 118695 # Table walker page sizes translated +system.cpu.itb.walker.walkPageSizes::4K 117642 99.10% 99.10% # Table walker page sizes translated +system.cpu.itb.walker.walkPageSizes::2M 1070 0.90% 100.00% # Table walker page sizes translated +system.cpu.itb.walker.walkPageSizes::total 118712 # Table walker page sizes translated system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst -system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 134950 # Table walker requests started/completed, data/inst -system.cpu.itb.walker.walkRequestOrigin_Requested::total 134950 # Table walker requests started/completed, data/inst +system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 134893 # Table walker requests started/completed, data/inst +system.cpu.itb.walker.walkRequestOrigin_Requested::total 134893 # Table walker requests started/completed, data/inst system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst -system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 118695 # Table walker requests started/completed, data/inst -system.cpu.itb.walker.walkRequestOrigin_Completed::total 118695 # Table walker requests started/completed, data/inst -system.cpu.itb.walker.walkRequestOrigin::total 253645 # Table walker requests started/completed, data/inst -system.cpu.itb.inst_hits 438786222 # ITB inst hits -system.cpu.itb.inst_misses 134950 # ITB inst misses +system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 118712 # Table walker requests started/completed, data/inst +system.cpu.itb.walker.walkRequestOrigin_Completed::total 118712 # Table walker requests started/completed, data/inst +system.cpu.itb.walker.walkRequestOrigin::total 253605 # Table walker requests started/completed, data/inst +system.cpu.itb.inst_hits 438788360 # ITB inst hits +system.cpu.itb.inst_misses 134893 # ITB inst misses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses system.cpu.itb.flush_tlb 11 # Number of times complete TLB was flushed system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu.itb.flush_tlb_mva_asid 45304 # Number of times TLB was flushed by MVA & ASID +system.cpu.itb.flush_tlb_mva_asid 45300 # Number of times TLB was flushed by MVA & ASID system.cpu.itb.flush_tlb_asid 1089 # Number of times TLB was flushed by ASID -system.cpu.itb.flush_entries 55568 # Number of entries that have been flushed from TLB +system.cpu.itb.flush_entries 56501 # Number of entries that have been flushed from TLB system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu.itb.perms_faults 357024 # Number of TLB faults due to permissions restrictions +system.cpu.itb.perms_faults 359579 # Number of TLB faults due to permissions restrictions system.cpu.itb.read_accesses 0 # DTB read accesses system.cpu.itb.write_accesses 0 # DTB write accesses -system.cpu.itb.inst_accesses 438921172 # ITB inst accesses -system.cpu.itb.hits 438786222 # DTB hits -system.cpu.itb.misses 134950 # DTB misses -system.cpu.itb.accesses 438921172 # DTB accesses -system.cpu.numCycles 2561969113 # number of cpu cycles simulated +system.cpu.itb.inst_accesses 438923253 # ITB inst accesses +system.cpu.itb.hits 438788360 # DTB hits +system.cpu.itb.misses 134893 # DTB misses +system.cpu.itb.accesses 438923253 # DTB accesses +system.cpu.numCycles 2560804207 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu.committedInsts 921741550 # Number of instructions committed -system.cpu.committedOps 1083047600 # Number of ops (including micro ops) committed -system.cpu.discardedOps 92851518 # Number of ops (including micro ops) which were discarded before commit -system.cpu.numFetchSuspends 7622 # Number of times Execute suspended instruction fetching -system.cpu.quiesceCycles 100774422273 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt -system.cpu.cpi 2.779487 # CPI: cycles per instruction -system.cpu.ipc 0.359779 # IPC: instructions per cycle +system.cpu.committedInsts 921716010 # Number of instructions committed +system.cpu.committedOps 1083032845 # Number of ops (including micro ops) committed +system.cpu.discardedOps 92871017 # Number of ops (including micro ops) which were discarded before commit +system.cpu.numFetchSuspends 7624 # Number of times Execute suspended instruction fetching +system.cpu.quiesceCycles 100775316475 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt +system.cpu.cpi 2.778301 # CPI: cycles per instruction +system.cpu.ipc 0.359932 # IPC: instructions per cycle system.cpu.kern.inst.arm 0 # number of arm instructions executed -system.cpu.kern.inst.quiesce 19360 # number of quiesce instructions executed -system.cpu.tickCycles 1740348403 # Number of cycles that the object actually ticked -system.cpu.idleCycles 821620710 # Total number of cycles that the object has spent stopped -system.cpu.dcache.tags.replacements 10715341 # number of replacements -system.cpu.dcache.tags.tagsinuse 511.930095 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 320246754 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 10715853 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 29.885325 # Average number of references to valid blocks. +system.cpu.kern.inst.quiesce 16484 # number of quiesce instructions executed +system.cpu.tickCycles 1740208465 # Number of cycles that the object actually ticked +system.cpu.idleCycles 820595742 # Total number of cycles that the object has spent stopped +system.cpu.dcache.tags.replacements 10718531 # number of replacements +system.cpu.dcache.tags.tagsinuse 511.930101 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 320228714 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 10719043 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 29.874749 # Average number of references to valid blocks. system.cpu.dcache.tags.warmup_cycle 7085883500 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 511.930095 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_blocks::cpu.data 511.930101 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.999863 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_percent::total 0.999863 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::0 69 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::1 385 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::2 57 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 71 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 394 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 47 # Occupied blocks per task id system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.dcache.tags.tag_accesses 1345291071 # Number of tag accesses -system.cpu.dcache.tags.data_accesses 1345291071 # Number of data accesses -system.cpu.dcache.ReadReq_hits::cpu.data 163948346 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 163948346 # number of ReadReq hits -system.cpu.dcache.WriteReq_hits::cpu.data 147386054 # number of WriteReq hits -system.cpu.dcache.WriteReq_hits::total 147386054 # number of WriteReq hits -system.cpu.dcache.SoftPFReq_hits::cpu.data 512627 # number of SoftPFReq hits -system.cpu.dcache.SoftPFReq_hits::total 512627 # number of SoftPFReq hits -system.cpu.dcache.WriteLineReq_hits::cpu.data 336269 # number of WriteLineReq hits -system.cpu.dcache.WriteLineReq_hits::total 336269 # number of WriteLineReq hits -system.cpu.dcache.LoadLockedReq_hits::cpu.data 3854490 # number of LoadLockedReq hits -system.cpu.dcache.LoadLockedReq_hits::total 3854490 # number of LoadLockedReq hits -system.cpu.dcache.StoreCondReq_hits::cpu.data 4160967 # number of StoreCondReq hits -system.cpu.dcache.StoreCondReq_hits::total 4160967 # number of StoreCondReq hits -system.cpu.dcache.demand_hits::cpu.data 311334400 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 311334400 # number of demand (read+write) hits -system.cpu.dcache.overall_hits::cpu.data 311847027 # number of overall hits -system.cpu.dcache.overall_hits::total 311847027 # number of overall hits -system.cpu.dcache.ReadReq_misses::cpu.data 6367020 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 6367020 # number of ReadReq misses -system.cpu.dcache.WriteReq_misses::cpu.data 4130399 # number of WriteReq misses -system.cpu.dcache.WriteReq_misses::total 4130399 # number of WriteReq misses -system.cpu.dcache.SoftPFReq_misses::cpu.data 1400627 # number of SoftPFReq misses -system.cpu.dcache.SoftPFReq_misses::total 1400627 # number of SoftPFReq misses -system.cpu.dcache.WriteLineReq_misses::cpu.data 1238807 # number of WriteLineReq misses -system.cpu.dcache.WriteLineReq_misses::total 1238807 # number of WriteLineReq misses -system.cpu.dcache.LoadLockedReq_misses::cpu.data 308186 # number of LoadLockedReq misses -system.cpu.dcache.LoadLockedReq_misses::total 308186 # number of LoadLockedReq misses -system.cpu.dcache.StoreCondReq_misses::cpu.data 2 # number of StoreCondReq misses -system.cpu.dcache.StoreCondReq_misses::total 2 # number of StoreCondReq misses -system.cpu.dcache.demand_misses::cpu.data 10497419 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 10497419 # number of demand (read+write) misses -system.cpu.dcache.overall_misses::cpu.data 11898046 # number of overall misses -system.cpu.dcache.overall_misses::total 11898046 # number of overall misses -system.cpu.dcache.ReadReq_miss_latency::cpu.data 117617695000 # number of ReadReq miss cycles -system.cpu.dcache.ReadReq_miss_latency::total 117617695000 # number of ReadReq miss cycles -system.cpu.dcache.WriteReq_miss_latency::cpu.data 201217455000 # number of WriteReq miss cycles -system.cpu.dcache.WriteReq_miss_latency::total 201217455000 # number of WriteReq miss cycles -system.cpu.dcache.WriteLineReq_miss_latency::cpu.data 84065023500 # number of WriteLineReq miss cycles -system.cpu.dcache.WriteLineReq_miss_latency::total 84065023500 # number of WriteLineReq miss cycles -system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 5131918500 # number of LoadLockedReq miss cycles -system.cpu.dcache.LoadLockedReq_miss_latency::total 5131918500 # number of LoadLockedReq miss cycles -system.cpu.dcache.StoreCondReq_miss_latency::cpu.data 165500 # number of StoreCondReq miss cycles -system.cpu.dcache.StoreCondReq_miss_latency::total 165500 # number of StoreCondReq miss cycles -system.cpu.dcache.demand_miss_latency::cpu.data 318835150000 # number of demand (read+write) miss cycles -system.cpu.dcache.demand_miss_latency::total 318835150000 # number of demand (read+write) miss cycles -system.cpu.dcache.overall_miss_latency::cpu.data 318835150000 # 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miss rate for StoreCondReq accesses system.cpu.dcache.StoreCondReq_miss_rate::total 0.000000 # miss rate for StoreCondReq accesses -system.cpu.dcache.demand_miss_rate::cpu.data 0.032618 # miss rate for demand accesses -system.cpu.dcache.demand_miss_rate::total 0.032618 # miss rate for demand accesses -system.cpu.dcache.overall_miss_rate::cpu.data 0.036751 # miss rate for overall accesses -system.cpu.dcache.overall_miss_rate::total 0.036751 # miss rate for overall accesses -system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 18472.958307 # average ReadReq miss latency -system.cpu.dcache.ReadReq_avg_miss_latency::total 18472.958307 # average ReadReq miss latency -system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 48716.226931 # average WriteReq miss latency -system.cpu.dcache.WriteReq_avg_miss_latency::total 48716.226931 # average WriteReq miss latency -system.cpu.dcache.WriteLineReq_avg_miss_latency::cpu.data 67859.661352 # average WriteLineReq miss latency -system.cpu.dcache.WriteLineReq_avg_miss_latency::total 67859.661352 # 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miss rate for overall accesses +system.cpu.dcache.overall_miss_rate::total 0.036743 # miss rate for overall accesses +system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 18423.283556 # average ReadReq miss latency +system.cpu.dcache.ReadReq_avg_miss_latency::total 18423.283556 # average ReadReq miss latency +system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 48451.601960 # average WriteReq miss latency +system.cpu.dcache.WriteReq_avg_miss_latency::total 48451.601960 # average WriteReq miss latency +system.cpu.dcache.WriteLineReq_avg_miss_latency::cpu.data 68167.765715 # average WriteLineReq miss latency +system.cpu.dcache.WriteLineReq_avg_miss_latency::total 68167.765715 # average WriteLineReq miss latency +system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 16542.454804 # average LoadLockedReq miss latency +system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 16542.454804 # average LoadLockedReq miss latency +system.cpu.dcache.StoreCondReq_avg_miss_latency::cpu.data 82000 # average StoreCondReq miss latency +system.cpu.dcache.StoreCondReq_avg_miss_latency::total 82000 # average StoreCondReq miss latency +system.cpu.dcache.demand_avg_miss_latency::cpu.data 30238.979012 # average overall miss latency +system.cpu.dcache.demand_avg_miss_latency::total 30238.979012 # average overall miss latency +system.cpu.dcache.overall_avg_miss_latency::cpu.data 26681.201283 # average overall miss latency +system.cpu.dcache.overall_avg_miss_latency::total 26681.201283 # average overall miss latency system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -649,155 +649,155 @@ system.cpu.dcache.avg_blocked_cycles::no_mshrs nan system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # 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number of demand (read+write) MSHR miss cycles -system.cpu.dcache.demand_mshr_miss_latency::total 202942047000 # number of demand (read+write) MSHR miss cycles -system.cpu.dcache.overall_mshr_miss_latency::cpu.data 229759036500 # number of overall MSHR miss cycles -system.cpu.dcache.overall_mshr_miss_latency::total 229759036500 # number of overall MSHR miss cycles -system.cpu.dcache.ReadReq_mshr_uncacheable_latency::cpu.data 5830985000 # number of ReadReq MSHR uncacheable cycles -system.cpu.dcache.ReadReq_mshr_uncacheable_latency::total 5830985000 # number of ReadReq MSHR uncacheable cycles -system.cpu.dcache.WriteReq_mshr_uncacheable_latency::cpu.data 5820481500 # number of WriteReq MSHR uncacheable cycles -system.cpu.dcache.WriteReq_mshr_uncacheable_latency::total 5820481500 # number of WriteReq MSHR uncacheable cycles -system.cpu.dcache.overall_mshr_uncacheable_latency::cpu.data 11651466500 # number of overall MSHR uncacheable cycles -system.cpu.dcache.overall_mshr_uncacheable_latency::total 11651466500 # number of overall MSHR uncacheable cycles -system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.032789 # mshr miss rate for ReadReq accesses -system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.032789 # mshr miss rate for ReadReq accesses -system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.015241 # mshr miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.015241 # mshr miss rate for WriteReq accesses -system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.728128 # mshr miss rate for SoftPFReq accesses -system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.728128 # mshr miss rate for SoftPFReq accesses -system.cpu.dcache.WriteLineReq_mshr_miss_rate::cpu.data 0.786416 # mshr miss rate for WriteLineReq accesses -system.cpu.dcache.WriteLineReq_mshr_miss_rate::total 0.786416 # mshr miss rate for WriteLineReq accesses -system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.057259 # mshr miss rate for LoadLockedReq accesses -system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.057259 # mshr miss rate for LoadLockedReq accesses +system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 95942539500 # number of ReadReq MSHR miss cycles +system.cpu.dcache.ReadReq_mshr_miss_latency::total 95942539500 # number of ReadReq MSHR miss cycles +system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 106127468000 # number of WriteReq MSHR miss cycles +system.cpu.dcache.WriteReq_mshr_miss_latency::total 106127468000 # number of WriteReq MSHR miss cycles +system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 26584469000 # number of SoftPFReq MSHR miss cycles +system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 26584469000 # number of SoftPFReq MSHR miss cycles +system.cpu.dcache.WriteLineReq_mshr_miss_latency::cpu.data 83210863500 # number of WriteLineReq MSHR miss cycles +system.cpu.dcache.WriteLineReq_mshr_miss_latency::total 83210863500 # number of WriteLineReq MSHR miss cycles +system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 3483152500 # number of LoadLockedReq MSHR miss cycles +system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 3483152500 # number of LoadLockedReq MSHR miss cycles +system.cpu.dcache.StoreCondReq_mshr_miss_latency::cpu.data 81000 # number of StoreCondReq MSHR miss cycles +system.cpu.dcache.StoreCondReq_mshr_miss_latency::total 81000 # number of StoreCondReq MSHR miss cycles +system.cpu.dcache.demand_mshr_miss_latency::cpu.data 202070007500 # number of demand (read+write) MSHR miss cycles +system.cpu.dcache.demand_mshr_miss_latency::total 202070007500 # number of demand (read+write) MSHR miss cycles +system.cpu.dcache.overall_mshr_miss_latency::cpu.data 228654476500 # number of overall MSHR miss cycles +system.cpu.dcache.overall_mshr_miss_latency::total 228654476500 # number of overall MSHR miss cycles +system.cpu.dcache.ReadReq_mshr_uncacheable_latency::cpu.data 5831192500 # number of ReadReq MSHR uncacheable cycles +system.cpu.dcache.ReadReq_mshr_uncacheable_latency::total 5831192500 # number of ReadReq MSHR uncacheable cycles +system.cpu.dcache.WriteReq_mshr_uncacheable_latency::cpu.data 5820427500 # number of WriteReq MSHR uncacheable cycles +system.cpu.dcache.WriteReq_mshr_uncacheable_latency::total 5820427500 # number of WriteReq MSHR uncacheable cycles +system.cpu.dcache.overall_mshr_uncacheable_latency::cpu.data 11651620000 # number of overall MSHR uncacheable cycles +system.cpu.dcache.overall_mshr_uncacheable_latency::total 11651620000 # number of overall MSHR uncacheable cycles +system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.032810 # mshr miss rate for ReadReq accesses +system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.032810 # mshr miss rate for ReadReq accesses +system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.015234 # mshr miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.015234 # mshr miss rate for WriteReq accesses +system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.728061 # mshr miss rate for SoftPFReq accesses +system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.728061 # mshr miss rate for SoftPFReq accesses +system.cpu.dcache.WriteLineReq_mshr_miss_rate::cpu.data 0.786666 # mshr miss rate for WriteLineReq accesses +system.cpu.dcache.WriteLineReq_mshr_miss_rate::total 0.786666 # mshr miss rate for WriteLineReq accesses +system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.057931 # mshr miss rate for LoadLockedReq accesses +system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.057931 # mshr miss rate for LoadLockedReq accesses system.cpu.dcache.StoreCondReq_mshr_miss_rate::cpu.data 0.000000 # mshr miss rate for StoreCondReq accesses system.cpu.dcache.StoreCondReq_mshr_miss_rate::total 0.000000 # mshr miss rate for StoreCondReq accesses -system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.024527 # mshr miss rate for demand accesses -system.cpu.dcache.demand_mshr_miss_rate::total 0.024527 # mshr miss rate for demand accesses -system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.028686 # mshr miss rate for overall accesses -system.cpu.dcache.overall_mshr_miss_rate::total 0.028686 # mshr miss rate for overall accesses -system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 17224.207129 # average ReadReq mshr miss latency -system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 17224.207129 # average ReadReq mshr miss latency -system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 46228.053595 # average WriteReq mshr miss latency -system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 46228.053595 # average WriteReq mshr miss latency -system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 19249.963570 # average SoftPFReq mshr miss latency -system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 19249.963570 # average SoftPFReq mshr miss latency -system.cpu.dcache.WriteLineReq_avg_mshr_miss_latency::cpu.data 66861.630465 # average WriteLineReq mshr miss latency -system.cpu.dcache.WriteLineReq_avg_mshr_miss_latency::total 66861.630465 # average WriteLineReq mshr miss latency -system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 14537.360710 # average LoadLockedReq mshr miss latency -system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 14537.360710 # average LoadLockedReq mshr miss latency -system.cpu.dcache.StoreCondReq_avg_mshr_miss_latency::cpu.data 81750 # average StoreCondReq mshr miss latency -system.cpu.dcache.StoreCondReq_avg_mshr_miss_latency::total 81750 # average StoreCondReq mshr miss latency -system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 25709.333291 # average overall mshr miss latency -system.cpu.dcache.demand_avg_mshr_miss_latency::total 25709.333291 # average overall mshr miss latency -system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 24740.377475 # average overall mshr miss latency -system.cpu.dcache.overall_avg_mshr_miss_latency::total 24740.377475 # average overall mshr miss latency -system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 173041.665430 # average ReadReq mshr uncacheable latency -system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total 173041.665430 # average ReadReq mshr uncacheable latency -system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu.data 172683.839672 # average WriteReq mshr uncacheable latency -system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::total 172683.839672 # average WriteReq mshr uncacheable latency -system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data 172862.728662 # average overall mshr uncacheable latency -system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total 172862.728662 # average overall mshr uncacheable latency +system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.024534 # mshr miss rate for demand accesses +system.cpu.dcache.demand_mshr_miss_rate::total 0.024534 # mshr miss rate for demand accesses +system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.028689 # mshr miss rate for overall accesses +system.cpu.dcache.overall_mshr_miss_rate::total 0.028689 # mshr miss rate for overall accesses +system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 17173.352384 # average ReadReq mshr miss latency +system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 17173.352384 # average ReadReq mshr miss latency +system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 45969.691247 # average WriteReq mshr miss latency +system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 45969.691247 # average WriteReq mshr miss latency +system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 19099.163169 # average SoftPFReq mshr miss latency +system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 19099.163169 # average SoftPFReq mshr miss latency +system.cpu.dcache.WriteLineReq_avg_mshr_miss_latency::cpu.data 67170.593050 # average WriteLineReq mshr miss latency +system.cpu.dcache.WriteLineReq_avg_mshr_miss_latency::total 67170.593050 # average WriteLineReq mshr miss latency +system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 14444.583829 # average LoadLockedReq mshr miss latency +system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 14444.583829 # average LoadLockedReq mshr miss latency +system.cpu.dcache.StoreCondReq_avg_mshr_miss_latency::cpu.data 81000 # average StoreCondReq mshr miss latency +system.cpu.dcache.StoreCondReq_avg_mshr_miss_latency::total 81000 # average StoreCondReq mshr miss latency +system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 25593.546518 # average overall mshr miss latency +system.cpu.dcache.demand_avg_mshr_miss_latency::total 25593.546518 # average overall mshr miss latency +system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 24620.208709 # average overall mshr miss latency +system.cpu.dcache.overall_avg_mshr_miss_latency::total 24620.208709 # average overall mshr miss latency +system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 173047.823248 # average ReadReq mshr uncacheable latency +system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total 173047.823248 # average ReadReq mshr uncacheable latency +system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu.data 172682.237584 # average WriteReq mshr uncacheable latency +system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::total 172682.237584 # average WriteReq mshr uncacheable latency +system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data 172865.006009 # average overall mshr uncacheable latency +system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total 172865.006009 # average overall mshr uncacheable latency system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.icache.tags.replacements 24143027 # number of replacements -system.cpu.icache.tags.tagsinuse 511.872432 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 414273354 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 24143539 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 17.158767 # Average number of references to valid blocks. +system.cpu.icache.tags.replacements 24130706 # number of replacements +system.cpu.icache.tags.tagsinuse 511.872431 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 414285199 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 24131218 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 17.168019 # Average number of references to valid blocks. system.cpu.icache.tags.warmup_cycle 39477111500 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 511.872432 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_blocks::cpu.inst 511.872431 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.999751 # Average percentage of cache occupancy system.cpu.icache.tags.occ_percent::total 0.999751 # Average percentage of cache occupancy system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::0 90 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::1 307 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::2 115 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 97 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 287 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 128 # Occupied blocks per task id system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.icache.tags.tag_accesses 462560451 # Number of tag accesses -system.cpu.icache.tags.data_accesses 462560451 # Number of data accesses -system.cpu.icache.ReadReq_hits::cpu.inst 414273354 # number of ReadReq hits -system.cpu.icache.ReadReq_hits::total 414273354 # number of ReadReq hits -system.cpu.icache.demand_hits::cpu.inst 414273354 # number of demand (read+write) hits -system.cpu.icache.demand_hits::total 414273354 # number of demand (read+write) hits -system.cpu.icache.overall_hits::cpu.inst 414273354 # number of overall hits -system.cpu.icache.overall_hits::total 414273354 # number of overall hits -system.cpu.icache.ReadReq_misses::cpu.inst 24143549 # number of ReadReq misses -system.cpu.icache.ReadReq_misses::total 24143549 # number of ReadReq misses -system.cpu.icache.demand_misses::cpu.inst 24143549 # number of demand (read+write) misses -system.cpu.icache.demand_misses::total 24143549 # number of demand (read+write) misses -system.cpu.icache.overall_misses::cpu.inst 24143549 # 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average overall miss latency -system.cpu.icache.demand_avg_miss_latency::total 13534.958676 # average overall miss latency -system.cpu.icache.overall_avg_miss_latency::cpu.inst 13534.958676 # average overall miss latency -system.cpu.icache.overall_avg_miss_latency::total 13534.958676 # average overall miss latency +system.cpu.icache.tags.tag_accesses 462547654 # Number of tag accesses +system.cpu.icache.tags.data_accesses 462547654 # Number of data accesses +system.cpu.icache.ReadReq_hits::cpu.inst 414285199 # number of ReadReq hits +system.cpu.icache.ReadReq_hits::total 414285199 # number of ReadReq hits +system.cpu.icache.demand_hits::cpu.inst 414285199 # number of demand (read+write) hits +system.cpu.icache.demand_hits::total 414285199 # number of demand (read+write) hits +system.cpu.icache.overall_hits::cpu.inst 414285199 # number of overall hits +system.cpu.icache.overall_hits::total 414285199 # number of overall hits +system.cpu.icache.ReadReq_misses::cpu.inst 24131228 # number of ReadReq misses +system.cpu.icache.ReadReq_misses::total 24131228 # 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miss rate for overall accesses +system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 13546.041109 # average ReadReq miss latency +system.cpu.icache.ReadReq_avg_miss_latency::total 13546.041109 # average ReadReq miss latency +system.cpu.icache.demand_avg_miss_latency::cpu.inst 13546.041109 # average overall miss latency +system.cpu.icache.demand_avg_miss_latency::total 13546.041109 # average overall miss latency +system.cpu.icache.overall_avg_miss_latency::cpu.inst 13546.041109 # average overall miss latency +system.cpu.icache.overall_avg_miss_latency::total 13546.041109 # average overall miss latency system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -806,225 +806,225 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs nan system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # 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Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.995533 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_blocks::writebacks 37009.506114 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 327.357473 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 390.452800 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 8008.475299 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 19511.504564 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_percent::writebacks 0.564720 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.004995 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.005958 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.inst 0.122200 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.data 0.297722 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.995595 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_task_id_blocks::1023 261 # Occupied blocks per task id -system.cpu.l2cache.tags.occ_task_id_blocks::1024 62838 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1023::3 2 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1023::4 259 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::1 440 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::2 2477 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::3 5563 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54301 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_blocks::1024 62858 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1023::3 1 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1023::4 260 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 52 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::1 534 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 2399 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 5570 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54303 # Occupied blocks per task id system.cpu.l2cache.tags.occ_task_id_percent::1023 0.003983 # Percentage of cache occupancy per task id -system.cpu.l2cache.tags.occ_task_id_percent::1024 0.958832 # Percentage of cache occupancy per task id -system.cpu.l2cache.tags.tag_accesses 572879965 # Number of tag accesses -system.cpu.l2cache.tags.data_accesses 572879965 # Number of data accesses -system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 917645 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 281080 # 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average UpgradeReq mshr miss latency +system.cpu.l2cache.SCUpgradeReq_avg_mshr_miss_latency::cpu.data 69500 # average SCUpgradeReq mshr miss latency +system.cpu.l2cache.SCUpgradeReq_avg_mshr_miss_latency::total 69500 # average SCUpgradeReq mshr miss latency +system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 122757.794444 # average ReadExReq mshr miss latency +system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 122757.794444 # average ReadExReq mshr miss latency +system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 122275.211142 # average ReadCleanReq mshr miss latency +system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 122275.211142 # average ReadCleanReq mshr miss latency +system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 124960.043991 # average ReadSharedReq mshr miss latency +system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 124960.043991 # average ReadSharedReq mshr miss latency +system.cpu.l2cache.InvalidateReq_avg_mshr_miss_latency::cpu.data 128749.529981 # average InvalidateReq mshr miss latency +system.cpu.l2cache.InvalidateReq_avg_mshr_miss_latency::total 128749.529981 # average InvalidateReq mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.dtb.walker 126912.324829 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.itb.walker 126721.485987 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 122275.211142 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 123498.723449 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::total 123406.052460 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.dtb.walker 126912.324829 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.itb.walker 126721.485987 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 122275.211142 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 123498.723449 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::total 123406.052460 # average overall mshr miss latency system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.inst 113480.118144 # average ReadReq mshr uncacheable latency -system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 160539.795828 # average ReadReq mshr uncacheable latency -system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::total 131918.017348 # average ReadReq mshr uncacheable latency -system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::cpu.data 161165.296980 # average WriteReq mshr uncacheable latency -system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::total 161165.296980 # average WriteReq mshr uncacheable latency +system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 160545.953646 # average ReadReq mshr uncacheable latency +system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::total 131920.429970 # average ReadReq mshr uncacheable latency +system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::cpu.data 161163.783896 # average WriteReq mshr uncacheable latency +system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::total 161163.783896 # average WriteReq mshr uncacheable latency system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.inst 113480.118144 # average overall mshr uncacheable latency -system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.data 160852.588164 # average overall mshr uncacheable latency -system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::total 140152.854350 # average overall mshr uncacheable latency +system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.data 160854.910019 # average overall mshr uncacheable latency +system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::total 140154.161655 # average overall mshr uncacheable latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.toL2Bus.snoop_filter.tot_requests 70464557 # Total number of requests made to the snoop filter. -system.cpu.toL2Bus.snoop_filter.hit_single_requests 35605124 # Number of requests hitting in the snoop filter with a single holder of the requested data. -system.cpu.toL2Bus.snoop_filter.hit_multi_requests 4387 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. -system.cpu.toL2Bus.snoop_filter.tot_snoops 2275 # Total number of snoops made to the snoop filter. -system.cpu.toL2Bus.snoop_filter.hit_single_snoops 2275 # Number of snoops hitting in the snoop filter with a single holder of the requested data. +system.cpu.toL2Bus.snoop_filter.tot_requests 70442734 # Total number of requests made to the snoop filter. +system.cpu.toL2Bus.snoop_filter.hit_single_requests 35592438 # Number of requests hitting in the snoop filter with a single holder of the requested data. +system.cpu.toL2Bus.snoop_filter.hit_multi_requests 4386 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu.toL2Bus.snoop_filter.tot_snoops 2280 # Total number of snoops made to the snoop filter. +system.cpu.toL2Bus.snoop_filter.hit_single_snoops 2280 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. -system.cpu.toL2Bus.trans_dist::ReadReq 1730195 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadResp 33090138 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadReq 1728553 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadResp 33080077 # Transaction distribution system.cpu.toL2Bus.trans_dist::WriteReq 33706 # Transaction distribution system.cpu.toL2Bus.trans_dist::WriteResp 33706 # Transaction distribution -system.cpu.toL2Bus.trans_dist::Writeback 9595897 # Transaction distribution -system.cpu.toL2Bus.trans_dist::CleanEvict 26867205 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeReq 47929 # Transaction distribution -system.cpu.toL2Bus.trans_dist::SCUpgradeReq 2 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeResp 47931 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExReq 2261624 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExResp 2261624 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadCleanReq 24143549 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadSharedReq 7224490 # Transaction distribution -system.cpu.toL2Bus.trans_dist::InvalidateReq 1345329 # Transaction distribution -system.cpu.toL2Bus.trans_dist::InvalidateResp 1238665 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 72531044 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32377896 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 689100 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 2164239 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count::total 107762279 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1548534656 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 1133143634 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 2287216 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 7385984 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size::total 2691351490 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.snoops 2160503 # Total snoops (count) -system.cpu.toL2Bus.snoop_fanout::samples 73254310 # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::mean 0.009691 # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::stdev 0.097963 # Request fanout histogram +system.cpu.toL2Bus.trans_dist::Writeback 9596069 # Transaction distribution +system.cpu.toL2Bus.trans_dist::CleanEvict 26854364 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeReq 48128 # Transaction distribution +system.cpu.toL2Bus.trans_dist::SCUpgradeReq 1 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeResp 48129 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExReq 2260770 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExResp 2260770 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadCleanReq 24131228 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadSharedReq 7228389 # Transaction distribution +system.cpu.toL2Bus.trans_dist::InvalidateReq 1345463 # Transaction distribution +system.cpu.toL2Bus.trans_dist::InvalidateResp 1238799 # Transaction distribution +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 72494093 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32387839 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 691084 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 2167479 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 107740495 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1547746112 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 1133685906 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 2304392 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 7423736 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size::total 2691160146 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.snoops 2148445 # Total snoops (count) +system.cpu.toL2Bus.snoop_fanout::samples 73231054 # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::mean 0.009642 # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::stdev 0.097721 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::0 72544433 99.03% 99.03% # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::1 709877 0.97% 100.00% # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::0 72524927 99.04% 99.04% # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::1 706127 0.96% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::total 73254310 # Request fanout histogram -system.cpu.toL2Bus.reqLayer0.occupancy 44006051993 # Layer occupancy (ticks) +system.cpu.toL2Bus.snoop_fanout::total 73231054 # Request fanout histogram +system.cpu.toL2Bus.reqLayer0.occupancy 44001619997 # Layer occupancy (ticks) system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%) -system.cpu.toL2Bus.snoopLayer0.occupancy 1484899 # Layer occupancy (ticks) +system.cpu.toL2Bus.snoopLayer0.occupancy 1484887 # Layer occupancy (ticks) system.cpu.toL2Bus.snoopLayer0.utilization 0.0 # Layer utilization (%) -system.cpu.toL2Bus.respLayer0.occupancy 36299896753 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer0.occupancy 36281501081 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%) -system.cpu.toL2Bus.respLayer1.occupancy 14910158065 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer1.occupancy 14914900069 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.cpu.toL2Bus.respLayer2.occupancy 403245904 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer2.occupancy 403060948 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%) -system.cpu.toL2Bus.respLayer3.occupancy 1241004972 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer3.occupancy 1239526970 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%) -system.iobus.trans_dist::ReadReq 40332 # Transaction distribution -system.iobus.trans_dist::ReadResp 40332 # Transaction distribution +system.iobus.trans_dist::ReadReq 40325 # Transaction distribution +system.iobus.trans_dist::ReadResp 40325 # Transaction distribution system.iobus.trans_dist::WriteReq 136571 # Transaction distribution system.iobus.trans_dist::WriteResp 136571 # Transaction distribution system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 47822 # Packet count per connected master and slave (bytes) @@ -1249,11 +1249,11 @@ system.iobus.pkt_count_system.bridge.master::system.realview.ethernet.pio system.iobus.pkt_count_system.bridge.master::system.realview.ethernet-pciconf 164 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.bridge.master::system.realview.pciconfig.pio 60 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.bridge.master::total 122704 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 231022 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.realview.ide.dma::total 231022 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 231008 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.realview.ide.dma::total 231008 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.realview.ethernet.dma::system.iocache.cpu_side 80 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.realview.ethernet.dma::total 80 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count::total 353806 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count::total 353792 # Packet count per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.uart.pio 47842 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.realview_io.pio 28 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.timer0.pio 32 # Cumulative packet size per connected master and slave (bytes) @@ -1270,11 +1270,11 @@ system.iobus.pkt_size_system.bridge.master::system.realview.ethernet.pio system.iobus.pkt_size_system.bridge.master::system.realview.ethernet-pciconf 251 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.pciconfig.pio 120 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::total 155834 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 7334520 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.realview.ide.dma::total 7334520 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 7334464 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.realview.ide.dma::total 7334464 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.realview.ethernet.dma::system.iocache.cpu_side 2086 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.realview.ethernet.dma::total 2086 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size::total 7492440 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size::total 7492384 # Cumulative packet size per connected master and slave (bytes) system.iobus.reqLayer0.occupancy 36301000 # Layer occupancy (ticks) system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer1.occupancy 9000 # Layer occupancy (ticks) @@ -1303,71 +1303,71 @@ system.iobus.reqLayer25.occupancy 32658000 # La system.iobus.reqLayer25.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer26.occupancy 101000 # Layer occupancy (ticks) system.iobus.reqLayer26.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer27.occupancy 565934074 # Layer occupancy (ticks) +system.iobus.reqLayer27.occupancy 565802629 # Layer occupancy (ticks) system.iobus.reqLayer27.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer28.occupancy 30000 # Layer occupancy (ticks) system.iobus.reqLayer28.utilization 0.0 # Layer utilization (%) system.iobus.respLayer0.occupancy 92800000 # Layer occupancy (ticks) system.iobus.respLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer3.occupancy 147782000 # Layer occupancy (ticks) +system.iobus.respLayer3.occupancy 147768000 # Layer occupancy (ticks) system.iobus.respLayer3.utilization 0.0 # Layer utilization (%) system.iobus.respLayer4.occupancy 170000 # Layer occupancy (ticks) system.iobus.respLayer4.utilization 0.0 # Layer utilization (%) -system.iocache.tags.replacements 115493 # number of replacements -system.iocache.tags.tagsinuse 10.440039 # Cycle average of tags in use +system.iocache.tags.replacements 115486 # number of replacements +system.iocache.tags.tagsinuse 10.440024 # Cycle average of tags in use system.iocache.tags.total_refs 3 # Total number of references to valid blocks. -system.iocache.tags.sampled_refs 115509 # Sample count of references to valid blocks. +system.iocache.tags.sampled_refs 115502 # Sample count of references to valid blocks. system.iocache.tags.avg_refs 0.000026 # Average number of references to valid blocks. -system.iocache.tags.warmup_cycle 13160095445000 # Cycle when the warmup percentage was hit. -system.iocache.tags.occ_blocks::realview.ethernet 3.520833 # Average occupied blocks per requestor -system.iocache.tags.occ_blocks::realview.ide 6.919206 # Average occupied blocks per requestor -system.iocache.tags.occ_percent::realview.ethernet 0.220052 # Average percentage of cache occupancy -system.iocache.tags.occ_percent::realview.ide 0.432450 # Average percentage of cache occupancy -system.iocache.tags.occ_percent::total 0.652502 # Average percentage of cache occupancy +system.iocache.tags.warmup_cycle 13160095292000 # Cycle when the warmup percentage was hit. +system.iocache.tags.occ_blocks::realview.ethernet 3.520841 # Average occupied blocks per requestor +system.iocache.tags.occ_blocks::realview.ide 6.919182 # Average occupied blocks per requestor +system.iocache.tags.occ_percent::realview.ethernet 0.220053 # Average percentage of cache occupancy +system.iocache.tags.occ_percent::realview.ide 0.432449 # Average percentage of cache occupancy +system.iocache.tags.occ_percent::total 0.652501 # Average percentage of cache occupancy system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id -system.iocache.tags.tag_accesses 1039956 # Number of tag accesses -system.iocache.tags.data_accesses 1039956 # Number of data accesses +system.iocache.tags.tag_accesses 1039893 # Number of tag accesses +system.iocache.tags.data_accesses 1039893 # Number of data accesses system.iocache.ReadReq_misses::realview.ethernet 37 # number of ReadReq misses -system.iocache.ReadReq_misses::realview.ide 8847 # number of ReadReq misses -system.iocache.ReadReq_misses::total 8884 # number of ReadReq misses +system.iocache.ReadReq_misses::realview.ide 8840 # number of ReadReq misses +system.iocache.ReadReq_misses::total 8877 # number of ReadReq misses system.iocache.WriteReq_misses::realview.ethernet 3 # number of WriteReq misses system.iocache.WriteReq_misses::total 3 # number of WriteReq misses system.iocache.WriteLineReq_misses::realview.ide 106664 # number of WriteLineReq misses system.iocache.WriteLineReq_misses::total 106664 # number of WriteLineReq misses system.iocache.demand_misses::realview.ethernet 40 # number of demand (read+write) misses -system.iocache.demand_misses::realview.ide 8847 # number of demand (read+write) misses -system.iocache.demand_misses::total 8887 # number of demand (read+write) misses +system.iocache.demand_misses::realview.ide 8840 # number of demand (read+write) misses +system.iocache.demand_misses::total 8880 # number of demand (read+write) misses system.iocache.overall_misses::realview.ethernet 40 # number of overall misses -system.iocache.overall_misses::realview.ide 8847 # number of overall misses -system.iocache.overall_misses::total 8887 # number of overall misses +system.iocache.overall_misses::realview.ide 8840 # number of overall misses +system.iocache.overall_misses::total 8880 # number of overall misses system.iocache.ReadReq_miss_latency::realview.ethernet 5069000 # number of ReadReq miss cycles -system.iocache.ReadReq_miss_latency::realview.ide 1639357105 # number of ReadReq miss cycles -system.iocache.ReadReq_miss_latency::total 1644426105 # number of ReadReq miss cycles +system.iocache.ReadReq_miss_latency::realview.ide 1641330150 # number of ReadReq miss cycles +system.iocache.ReadReq_miss_latency::total 1646399150 # number of ReadReq miss cycles system.iocache.WriteReq_miss_latency::realview.ethernet 351000 # number of WriteReq miss cycles system.iocache.WriteReq_miss_latency::total 351000 # number of WriteReq miss cycles -system.iocache.WriteLineReq_miss_latency::realview.ide 13823164969 # number of WriteLineReq miss cycles -system.iocache.WriteLineReq_miss_latency::total 13823164969 # number of WriteLineReq miss cycles +system.iocache.WriteLineReq_miss_latency::realview.ide 13825092479 # number of WriteLineReq miss cycles +system.iocache.WriteLineReq_miss_latency::total 13825092479 # number of WriteLineReq miss cycles system.iocache.demand_miss_latency::realview.ethernet 5420000 # number of demand (read+write) miss cycles -system.iocache.demand_miss_latency::realview.ide 1639357105 # number of demand (read+write) miss cycles -system.iocache.demand_miss_latency::total 1644777105 # number of demand (read+write) miss cycles +system.iocache.demand_miss_latency::realview.ide 1641330150 # number of demand (read+write) miss cycles +system.iocache.demand_miss_latency::total 1646750150 # number of demand (read+write) miss cycles system.iocache.overall_miss_latency::realview.ethernet 5420000 # number of overall miss cycles -system.iocache.overall_miss_latency::realview.ide 1639357105 # number of overall miss cycles -system.iocache.overall_miss_latency::total 1644777105 # number of overall miss cycles +system.iocache.overall_miss_latency::realview.ide 1641330150 # number of overall miss cycles +system.iocache.overall_miss_latency::total 1646750150 # number of overall miss cycles system.iocache.ReadReq_accesses::realview.ethernet 37 # number of ReadReq accesses(hits+misses) -system.iocache.ReadReq_accesses::realview.ide 8847 # number of ReadReq accesses(hits+misses) -system.iocache.ReadReq_accesses::total 8884 # number of ReadReq accesses(hits+misses) +system.iocache.ReadReq_accesses::realview.ide 8840 # number of ReadReq accesses(hits+misses) +system.iocache.ReadReq_accesses::total 8877 # number of ReadReq accesses(hits+misses) system.iocache.WriteReq_accesses::realview.ethernet 3 # number of WriteReq accesses(hits+misses) system.iocache.WriteReq_accesses::total 3 # number of WriteReq accesses(hits+misses) system.iocache.WriteLineReq_accesses::realview.ide 106664 # number of WriteLineReq accesses(hits+misses) system.iocache.WriteLineReq_accesses::total 106664 # number of WriteLineReq accesses(hits+misses) system.iocache.demand_accesses::realview.ethernet 40 # number of demand (read+write) accesses -system.iocache.demand_accesses::realview.ide 8847 # number of demand (read+write) accesses -system.iocache.demand_accesses::total 8887 # number of demand (read+write) accesses +system.iocache.demand_accesses::realview.ide 8840 # number of demand (read+write) accesses +system.iocache.demand_accesses::total 8880 # number of demand (read+write) accesses system.iocache.overall_accesses::realview.ethernet 40 # number of overall (read+write) accesses -system.iocache.overall_accesses::realview.ide 8847 # number of overall (read+write) accesses -system.iocache.overall_accesses::total 8887 # number of overall (read+write) accesses +system.iocache.overall_accesses::realview.ide 8840 # number of overall (read+write) accesses +system.iocache.overall_accesses::total 8880 # number of overall (read+write) accesses system.iocache.ReadReq_miss_rate::realview.ethernet 1 # miss rate for ReadReq accesses system.iocache.ReadReq_miss_rate::realview.ide 1 # miss rate for ReadReq accesses system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses @@ -1382,54 +1382,54 @@ system.iocache.overall_miss_rate::realview.ethernet 1 system.iocache.overall_miss_rate::realview.ide 1 # miss rate for overall accesses system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses system.iocache.ReadReq_avg_miss_latency::realview.ethernet 137000 # average ReadReq miss latency -system.iocache.ReadReq_avg_miss_latency::realview.ide 185300.904826 # average ReadReq miss latency -system.iocache.ReadReq_avg_miss_latency::total 185099.741670 # average ReadReq miss latency +system.iocache.ReadReq_avg_miss_latency::realview.ide 185670.831448 # average ReadReq miss latency +system.iocache.ReadReq_avg_miss_latency::total 185467.967782 # average ReadReq miss latency system.iocache.WriteReq_avg_miss_latency::realview.ethernet 117000 # average WriteReq miss latency system.iocache.WriteReq_avg_miss_latency::total 117000 # average WriteReq miss latency -system.iocache.WriteLineReq_avg_miss_latency::realview.ide 129595.411470 # average WriteLineReq miss latency -system.iocache.WriteLineReq_avg_miss_latency::total 129595.411470 # average WriteLineReq miss latency +system.iocache.WriteLineReq_avg_miss_latency::realview.ide 129613.482328 # average WriteLineReq miss latency +system.iocache.WriteLineReq_avg_miss_latency::total 129613.482328 # average WriteLineReq miss latency system.iocache.demand_avg_miss_latency::realview.ethernet 135500 # average overall miss latency -system.iocache.demand_avg_miss_latency::realview.ide 185300.904826 # average overall miss latency -system.iocache.demand_avg_miss_latency::total 185076.753123 # average overall miss latency +system.iocache.demand_avg_miss_latency::realview.ide 185670.831448 # average overall miss latency +system.iocache.demand_avg_miss_latency::total 185444.836712 # average overall miss latency system.iocache.overall_avg_miss_latency::realview.ethernet 135500 # average overall miss latency -system.iocache.overall_avg_miss_latency::realview.ide 185300.904826 # average overall miss latency -system.iocache.overall_avg_miss_latency::total 185076.753123 # average overall miss latency -system.iocache.blocked_cycles::no_mshrs 32638 # number of cycles access was blocked +system.iocache.overall_avg_miss_latency::realview.ide 185670.831448 # average overall miss latency +system.iocache.overall_avg_miss_latency::total 185444.836712 # average overall miss latency +system.iocache.blocked_cycles::no_mshrs 32333 # number of cycles access was blocked system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.iocache.blocked::no_mshrs 3399 # number of cycles access was blocked +system.iocache.blocked::no_mshrs 3346 # number of cycles access was blocked system.iocache.blocked::no_targets 0 # number of cycles access was blocked -system.iocache.avg_blocked_cycles::no_mshrs 9.602236 # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_mshrs 9.663180 # average number of cycles each access was blocked system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.iocache.fast_writes 0 # number of fast writes performed system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 106631 # number of writebacks system.iocache.writebacks::total 106631 # number of writebacks system.iocache.ReadReq_mshr_misses::realview.ethernet 37 # number of ReadReq MSHR misses -system.iocache.ReadReq_mshr_misses::realview.ide 8847 # number of ReadReq MSHR misses -system.iocache.ReadReq_mshr_misses::total 8884 # number of ReadReq MSHR misses +system.iocache.ReadReq_mshr_misses::realview.ide 8840 # number of ReadReq MSHR misses +system.iocache.ReadReq_mshr_misses::total 8877 # number of ReadReq MSHR misses system.iocache.WriteReq_mshr_misses::realview.ethernet 3 # number of WriteReq MSHR misses system.iocache.WriteReq_mshr_misses::total 3 # number of WriteReq MSHR misses system.iocache.WriteLineReq_mshr_misses::realview.ide 106664 # number of WriteLineReq MSHR misses system.iocache.WriteLineReq_mshr_misses::total 106664 # number of WriteLineReq MSHR misses system.iocache.demand_mshr_misses::realview.ethernet 40 # number of demand (read+write) MSHR misses -system.iocache.demand_mshr_misses::realview.ide 8847 # number of demand (read+write) MSHR misses -system.iocache.demand_mshr_misses::total 8887 # number of demand (read+write) MSHR misses +system.iocache.demand_mshr_misses::realview.ide 8840 # number of demand (read+write) MSHR misses +system.iocache.demand_mshr_misses::total 8880 # number of demand (read+write) MSHR misses system.iocache.overall_mshr_misses::realview.ethernet 40 # number of overall MSHR misses -system.iocache.overall_mshr_misses::realview.ide 8847 # number of overall MSHR misses -system.iocache.overall_mshr_misses::total 8887 # number of overall MSHR misses +system.iocache.overall_mshr_misses::realview.ide 8840 # number of overall MSHR misses +system.iocache.overall_mshr_misses::total 8880 # number of overall MSHR misses system.iocache.ReadReq_mshr_miss_latency::realview.ethernet 3219000 # number of ReadReq MSHR miss cycles -system.iocache.ReadReq_mshr_miss_latency::realview.ide 1197007105 # number of ReadReq MSHR miss cycles -system.iocache.ReadReq_mshr_miss_latency::total 1200226105 # number of ReadReq MSHR miss cycles +system.iocache.ReadReq_mshr_miss_latency::realview.ide 1199330150 # number of ReadReq MSHR miss cycles +system.iocache.ReadReq_mshr_miss_latency::total 1202549150 # number of ReadReq MSHR miss cycles system.iocache.WriteReq_mshr_miss_latency::realview.ethernet 201000 # number of WriteReq MSHR miss cycles system.iocache.WriteReq_mshr_miss_latency::total 201000 # number of WriteReq MSHR miss cycles -system.iocache.WriteLineReq_mshr_miss_latency::realview.ide 8489964969 # number of WriteLineReq MSHR miss cycles -system.iocache.WriteLineReq_mshr_miss_latency::total 8489964969 # number of WriteLineReq MSHR miss cycles +system.iocache.WriteLineReq_mshr_miss_latency::realview.ide 8491892479 # number of WriteLineReq MSHR miss cycles +system.iocache.WriteLineReq_mshr_miss_latency::total 8491892479 # number of WriteLineReq MSHR miss cycles system.iocache.demand_mshr_miss_latency::realview.ethernet 3420000 # number of demand (read+write) MSHR miss cycles -system.iocache.demand_mshr_miss_latency::realview.ide 1197007105 # number of demand (read+write) MSHR miss cycles -system.iocache.demand_mshr_miss_latency::total 1200427105 # number of demand (read+write) MSHR miss cycles +system.iocache.demand_mshr_miss_latency::realview.ide 1199330150 # number of demand (read+write) MSHR miss cycles +system.iocache.demand_mshr_miss_latency::total 1202750150 # number of demand (read+write) MSHR miss cycles system.iocache.overall_mshr_miss_latency::realview.ethernet 3420000 # number of overall MSHR miss cycles -system.iocache.overall_mshr_miss_latency::realview.ide 1197007105 # number of overall MSHR miss cycles -system.iocache.overall_mshr_miss_latency::total 1200427105 # number of overall MSHR miss cycles +system.iocache.overall_mshr_miss_latency::realview.ide 1199330150 # number of overall MSHR miss cycles +system.iocache.overall_mshr_miss_latency::total 1202750150 # number of overall MSHR miss cycles system.iocache.ReadReq_mshr_miss_rate::realview.ethernet 1 # mshr miss rate for ReadReq accesses system.iocache.ReadReq_mshr_miss_rate::realview.ide 1 # mshr miss rate for ReadReq accesses system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses @@ -1444,72 +1444,72 @@ system.iocache.overall_mshr_miss_rate::realview.ethernet 1 system.iocache.overall_mshr_miss_rate::realview.ide 1 # mshr miss rate for overall accesses system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses system.iocache.ReadReq_avg_mshr_miss_latency::realview.ethernet 87000 # average ReadReq mshr miss latency -system.iocache.ReadReq_avg_mshr_miss_latency::realview.ide 135300.904826 # average ReadReq mshr miss latency -system.iocache.ReadReq_avg_mshr_miss_latency::total 135099.741670 # average ReadReq mshr miss latency +system.iocache.ReadReq_avg_mshr_miss_latency::realview.ide 135670.831448 # average ReadReq mshr miss latency +system.iocache.ReadReq_avg_mshr_miss_latency::total 135467.967782 # average ReadReq mshr miss latency system.iocache.WriteReq_avg_mshr_miss_latency::realview.ethernet 67000 # average WriteReq mshr miss latency system.iocache.WriteReq_avg_mshr_miss_latency::total 67000 # average WriteReq mshr miss latency -system.iocache.WriteLineReq_avg_mshr_miss_latency::realview.ide 79595.411470 # average WriteLineReq mshr miss latency -system.iocache.WriteLineReq_avg_mshr_miss_latency::total 79595.411470 # average WriteLineReq mshr miss latency +system.iocache.WriteLineReq_avg_mshr_miss_latency::realview.ide 79613.482328 # average WriteLineReq mshr miss latency +system.iocache.WriteLineReq_avg_mshr_miss_latency::total 79613.482328 # average WriteLineReq mshr miss latency system.iocache.demand_avg_mshr_miss_latency::realview.ethernet 85500 # average overall mshr miss latency -system.iocache.demand_avg_mshr_miss_latency::realview.ide 135300.904826 # average overall mshr miss latency -system.iocache.demand_avg_mshr_miss_latency::total 135076.753123 # average overall mshr miss latency +system.iocache.demand_avg_mshr_miss_latency::realview.ide 135670.831448 # average overall mshr miss latency +system.iocache.demand_avg_mshr_miss_latency::total 135444.836712 # average overall mshr miss latency system.iocache.overall_avg_mshr_miss_latency::realview.ethernet 85500 # average overall mshr miss latency -system.iocache.overall_avg_mshr_miss_latency::realview.ide 135300.904826 # average overall mshr miss latency -system.iocache.overall_avg_mshr_miss_latency::total 135076.753123 # average overall mshr miss latency +system.iocache.overall_avg_mshr_miss_latency::realview.ide 135670.831448 # average overall mshr miss latency +system.iocache.overall_avg_mshr_miss_latency::total 135444.836712 # average overall mshr miss latency system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate system.membus.trans_dist::ReadReq 86006 # Transaction distribution -system.membus.trans_dist::ReadResp 529580 # Transaction distribution +system.membus.trans_dist::ReadResp 526484 # Transaction distribution system.membus.trans_dist::WriteReq 33706 # Transaction distribution system.membus.trans_dist::WriteResp 33706 # Transaction distribution -system.membus.trans_dist::Writeback 1371507 # Transaction distribution -system.membus.trans_dist::CleanEvict 234789 # Transaction distribution -system.membus.trans_dist::UpgradeReq 38219 # Transaction distribution -system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution -system.membus.trans_dist::UpgradeResp 38221 # Transaction distribution -system.membus.trans_dist::ReadExReq 1152452 # Transaction distribution -system.membus.trans_dist::ReadExResp 1152452 # Transaction distribution -system.membus.trans_dist::ReadSharedReq 443574 # Transaction distribution +system.membus.trans_dist::Writeback 1366243 # Transaction distribution +system.membus.trans_dist::CleanEvict 236394 # Transaction distribution +system.membus.trans_dist::UpgradeReq 38482 # Transaction distribution +system.membus.trans_dist::SCUpgradeReq 1 # Transaction distribution +system.membus.trans_dist::UpgradeResp 38483 # Transaction distribution +system.membus.trans_dist::ReadExReq 1149637 # Transaction distribution +system.membus.trans_dist::ReadExResp 1149637 # Transaction distribution +system.membus.trans_dist::ReadSharedReq 440478 # Transaction distribution system.membus.trans_dist::InvalidateReq 106664 # Transaction distribution system.membus.trans_dist::InvalidateResp 106664 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 122704 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 32 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 6916 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 4853436 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4983088 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 341164 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.iocache.mem_side::total 341164 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::total 5324252 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 4838609 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4968261 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 340944 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.iocache.mem_side::total 340944 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 5309205 # Packet count per connected master and slave (bytes) system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 155834 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 740 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 13832 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 185854828 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.cpu.l2cache.mem_side::total 186025234 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 7224960 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.iocache.mem_side::total 7224960 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size::total 193250194 # Cumulative packet size per connected master and slave (bytes) -system.membus.snoops 3290 # Total snoops (count) -system.membus.snoop_fanout::samples 3469738 # Request fanout histogram +system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 185140076 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.cpu.l2cache.mem_side::total 185310482 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 7218752 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.iocache.mem_side::total 7218752 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size::total 192529234 # Cumulative packet size per connected master and slave (bytes) +system.membus.snoops 3380 # Total snoops (count) +system.membus.snoop_fanout::samples 3460550 # Request fanout histogram system.membus.snoop_fanout::mean 1 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram -system.membus.snoop_fanout::1 3469738 100.00% 100.00% # Request fanout histogram +system.membus.snoop_fanout::1 3460550 100.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::min_value 1 # Request fanout histogram system.membus.snoop_fanout::max_value 1 # Request fanout histogram -system.membus.snoop_fanout::total 3469738 # Request fanout histogram -system.membus.reqLayer0.occupancy 102307500 # Layer occupancy (ticks) +system.membus.snoop_fanout::total 3460550 # Request fanout histogram +system.membus.reqLayer0.occupancy 102447500 # Layer occupancy (ticks) system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) system.membus.reqLayer1.occupancy 19828 # Layer occupancy (ticks) system.membus.reqLayer1.utilization 0.0 # Layer utilization (%) -system.membus.reqLayer2.occupancy 5483000 # Layer occupancy (ticks) +system.membus.reqLayer2.occupancy 5490500 # Layer occupancy (ticks) system.membus.reqLayer2.utilization 0.0 # Layer utilization (%) -system.membus.reqLayer5.occupancy 9286465077 # Layer occupancy (ticks) +system.membus.reqLayer5.occupancy 9255992894 # Layer occupancy (ticks) system.membus.reqLayer5.utilization 0.0 # Layer utilization (%) -system.membus.respLayer2.occupancy 8797329089 # Layer occupancy (ticks) +system.membus.respLayer2.occupancy 8767241103 # Layer occupancy (ticks) system.membus.respLayer2.utilization 0.0 # Layer utilization (%) -system.membus.respLayer3.occupancy 228468079 # Layer occupancy (ticks) +system.membus.respLayer3.occupancy 228448107 # Layer occupancy (ticks) system.membus.respLayer3.utilization 0.0 # Layer utilization (%) system.realview.ethernet.txBytes 966 # Bytes Transmitted system.realview.ethernet.txPackets 3 # Number of Packets Transmitted |