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-rw-r--r--tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini397
1 files changed, 380 insertions, 17 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini
index 11768aa62..5e79cd0cc 100644
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-o3-dual/config.ini
@@ -12,23 +12,25 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
atags_addr=134217728
-boot_loader=/work/gem5/dist/binaries/boot_emm.arm64
+boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm64
boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
cache_line_size=64
clk_domain=system.clk_domain
-dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb
+default_p_state=UNDEFINED
+dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb
early_kernel_symbols=false
enable_context_switch_stats_dump=false
eventq_index=0
+exit_on_work_items=false
flags_addr=469827632
gic_cpu_addr=738205696
have_large_asid_64=false
-have_lpae=false
+have_lpae=true
have_security=false
have_virtualization=false
highest_el_is_64=false
init_param=0
-kernel=/work/gem5/dist/binaries/vmlinux.aarch64.20140821
+kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821
kernel_addr_check=true
load_addr_mask=268435455
load_offset=2147483648
@@ -40,12 +42,18 @@ mmap_using_noreserve=false
multi_proc=true
multi_thread=false
num_work_ids=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
panic_on_oops=true
panic_on_panic=true
phys_addr_range_64=40
-readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh
+power_model=Null
+readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
reset_addr_64=0
symbolfile=
+thermal_components=
+thermal_model=Null
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
@@ -58,8 +66,13 @@ system_port=system.membus.slave[1]
[system.bridge]
type=Bridge
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
delay=50000
eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
req_size=16
resp_size=16
@@ -86,7 +99,7 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
eventq_index=0
-image_file=/work/gem5/dist/disks/linaro-minimal-aarch64.img
+image_file=/arm/projectscratch/randd/systems/dist/disks/linaro-minimal-aarch64.img
read_only=true
[system.clk_domain]
@@ -121,6 +134,7 @@ cpu_id=0
decodeToFetchDelay=1
decodeToRenameDelay=2
decodeWidth=3
+default_p_state=UNDEFINED
dispatchWidth=6
do_checkpoint_insts=true
do_quiesce=true
@@ -159,6 +173,10 @@ numPhysIntRegs=128
numROBEntries=40
numRobs=1
numThreads=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
profile=0
progress_interval=0
renameToDecodeDelay=1
@@ -198,8 +216,15 @@ choicePredictorSize=8192
eventq_index=0
globalCtrBits=2
globalPredictorSize=8192
+indirectHashGHR=true
+indirectHashTargets=true
+indirectPathLength=3
+indirectSets=256
+indirectTagSize=16
+indirectWays=2
instShiftAmt=2
numThreads=1
+useIndirect=true
[system.cpu0.dcache]
type=Cache
@@ -208,13 +233,17 @@ addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=6
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -233,8 +262,13 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -257,9 +291,14 @@ walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
[system.cpu0.dstage2_mmu.stage2_tlb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=true
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
[system.cpu0.dtb]
@@ -273,9 +312,14 @@ walker=system.cpu0.dtb.walker
[system.cpu0.dtb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=false
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
port=system.cpu0.toL2Bus.slave[3]
@@ -551,13 +595,17 @@ addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=false
hit_latency=1
is_read_only=true
max_miss_count=0
mshrs=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=1
@@ -576,8 +624,13 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -635,9 +688,14 @@ walker=system.cpu0.istage2_mmu.stage2_tlb.walker
[system.cpu0.istage2_mmu.stage2_tlb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=true
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
[system.cpu0.itb]
@@ -651,9 +709,14 @@ walker=system.cpu0.itb.walker
[system.cpu0.itb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=false
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
port=system.cpu0.toL2Bus.slave[2]
@@ -664,13 +727,17 @@ addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
clusivity=mostly_excl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
hit_latency=12
is_read_only=false
max_miss_count=0
mshrs=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=true
prefetcher=system.cpu0.l2cache.prefetcher
response_latency=12
@@ -688,6 +755,7 @@ mem_side=system.toL2Bus.slave[0]
type=StridePrefetcher
cache_snoop=false
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
degree=8
eventq_index=0
latency=1
@@ -698,6 +766,10 @@ on_inst=true
on_miss=false
on_read=true
on_write=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
queue_filter=true
queue_size=32
queue_squash=true
@@ -714,8 +786,13 @@ type=RandomRepl
assoc=16
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=12
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=1048576
@@ -723,9 +800,15 @@ size=1048576
type=CoherentXBar
children=snoop_filter
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=0
frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
response_latency=1
snoop_filter=system.cpu0.toL2Bus.snoop_filter
snoop_response_latency=1
@@ -770,6 +853,7 @@ cpu_id=1
decodeToFetchDelay=1
decodeToRenameDelay=2
decodeWidth=3
+default_p_state=UNDEFINED
dispatchWidth=6
do_checkpoint_insts=true
do_quiesce=true
@@ -808,6 +892,10 @@ numPhysIntRegs=128
numROBEntries=40
numRobs=1
numThreads=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
profile=0
progress_interval=0
renameToDecodeDelay=1
@@ -847,8 +935,15 @@ choicePredictorSize=8192
eventq_index=0
globalCtrBits=2
globalPredictorSize=8192
+indirectHashGHR=true
+indirectHashTargets=true
+indirectPathLength=3
+indirectSets=256
+indirectTagSize=16
+indirectWays=2
instShiftAmt=2
numThreads=1
+useIndirect=true
[system.cpu1.dcache]
type=Cache
@@ -857,13 +952,17 @@ addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
hit_latency=2
is_read_only=false
max_miss_count=0
mshrs=6
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=2
@@ -882,8 +981,13 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -906,9 +1010,14 @@ walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
[system.cpu1.dstage2_mmu.stage2_tlb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=true
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
[system.cpu1.dtb]
@@ -922,9 +1031,14 @@ walker=system.cpu1.dtb.walker
[system.cpu1.dtb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=false
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
port=system.cpu1.toL2Bus.slave[3]
@@ -1200,13 +1314,17 @@ addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=false
hit_latency=1
is_read_only=true
max_miss_count=0
mshrs=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=1
@@ -1225,8 +1343,13 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=32768
@@ -1284,9 +1407,14 @@ walker=system.cpu1.istage2_mmu.stage2_tlb.walker
[system.cpu1.istage2_mmu.stage2_tlb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=true
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
[system.cpu1.itb]
@@ -1300,9 +1428,14 @@ walker=system.cpu1.itb.walker
[system.cpu1.itb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
is_stage2=false
num_squash_per_cycle=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sys=system
port=system.cpu1.toL2Bus.slave[2]
@@ -1313,13 +1446,17 @@ addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
clusivity=mostly_excl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
hit_latency=12
is_read_only=false
max_miss_count=0
mshrs=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=true
prefetcher=system.cpu1.l2cache.prefetcher
response_latency=12
@@ -1337,6 +1474,7 @@ mem_side=system.toL2Bus.slave[1]
type=StridePrefetcher
cache_snoop=false
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
degree=8
eventq_index=0
latency=1
@@ -1347,6 +1485,10 @@ on_inst=true
on_miss=false
on_read=true
on_write=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
queue_filter=true
queue_size=32
queue_squash=true
@@ -1363,8 +1505,13 @@ type=RandomRepl
assoc=16
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=12
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=1048576
@@ -1372,9 +1519,15 @@ size=1048576
type=CoherentXBar
children=snoop_filter
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=0
frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
response_latency=1
snoop_filter=system.cpu1.toL2Bus.snoop_filter
snoop_response_latency=1
@@ -1419,9 +1572,14 @@ sys=system
[system.iobus]
type=NoncoherentXBar
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=1
frontend_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
response_latency=2
use_default_range=false
width=16
@@ -1435,13 +1593,17 @@ addr_ranges=2147483648:2415919103
assoc=8
clk_domain=system.clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=false
hit_latency=50
is_read_only=false
max_miss_count=0
mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=50
@@ -1460,8 +1622,13 @@ type=LRU
assoc=8
block_size=64
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=50
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=1024
@@ -1472,13 +1639,17 @@ addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
clusivity=mostly_incl
+default_p_state=UNDEFINED
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
hit_latency=20
is_read_only=false
max_miss_count=0
mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
prefetch_on_access=false
prefetcher=Null
response_latency=20
@@ -1497,20 +1668,31 @@ type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
hit_latency=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
sequential_access=false
size=4194304
[system.membus]
type=CoherentXBar
-children=badaddr_responder
+children=badaddr_responder snoop_filter
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=4
frontend_latency=3
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=true
+power_model=Null
response_latency=2
-snoop_filter=Null
+snoop_filter=system.membus.snoop_filter
snoop_response_latency=4
system=system
use_default_range=false
@@ -1522,11 +1704,16 @@ slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.io
[system.membus.badaddr_responder]
type=IsaFake
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=0
pio_latency=100000
pio_size=8
+power_model=Null
ret_bad_addr=true
ret_data16=65535
ret_data32=4294967295
@@ -1537,6 +1724,13 @@ update_data=false
warn_access=warn
pio=system.membus.default
+[system.membus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=1
+max_capacity=8388608
+system=system
+
[system.physmem]
type=DRAMCtrl
IDD0=0.075000
@@ -1571,6 +1765,7 @@ burst_length=8
channels=1
clk_domain=system.clk_domain
conf_table_reported=true
+default_p_state=UNDEFINED
device_bus_width=8
device_rowbuffer_size=1024
device_size=536870912
@@ -1582,7 +1777,11 @@ max_accesses_per_row=16
mem_sched_policy=frfcfs
min_writes_per_switch=16
null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
page_policy=open_adaptive
+power_model=Null
range=2147483648:2415919103
ranks_per_channel=2
read_buffer_size=32
@@ -1625,10 +1824,15 @@ system=system
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470024192
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[18]
@@ -1709,14 +1913,19 @@ VendorID=32902
clk_domain=system.clk_domain
config_latency=20000
ctrl_offset=2
+default_p_state=UNDEFINED
disks=
eventq_index=0
host=system.realview.pci_host
io_shift=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pci_bus=2
pci_dev=0
pci_func=0
pio_latency=30000
+power_model=Null
system=system
dma=system.iobus.slave[2]
pio=system.iobus.master[9]
@@ -1725,13 +1934,18 @@ pio=system.iobus.master[9]
type=Pl111
amba_id=1315089
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
enable_capture=true
eventq_index=0
gic=system.realview.gic
int_num=46
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=471793664
pio_latency=10000
pixel_clock=41667
+power_model=Null
system=system
vnc=system.vncserver
dma=system.iobus.slave[1]
@@ -1741,6 +1955,7 @@ pio=system.iobus.master[5]
type=SubSystem
children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
eventq_index=0
+thermal_domain=Null
[system.realview.dcc.osc_cpu]
type=RealViewOsc
@@ -1811,10 +2026,15 @@ voltage_domain=system.voltage_domain
[system.realview.energy_ctrl]
type=EnergyCtrl
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
dvfs_handler=system.dvfs_handler
eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470286336
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[22]
@@ -1894,17 +2114,22 @@ SubsystemVendorID=32902
VendorID=32902
clk_domain=system.clk_domain
config_latency=20000
+default_p_state=UNDEFINED
eventq_index=0
fetch_comp_delay=10000
fetch_delay=10000
hardware_address=00:90:00:00:00:01
host=system.realview.pci_host
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pci_bus=0
pci_dev=0
pci_func=0
phy_epid=896
phy_pid=680
pio_latency=30000
+power_model=Null
rx_desc_cache_size=64
rx_fifo_size=393216
rx_write_delay=0
@@ -1930,12 +2155,18 @@ type=Pl390
clk_domain=system.clk_domain
cpu_addr=738205696
cpu_pio_delay=10000
+default_p_state=UNDEFINED
dist_addr=738201600
dist_pio_delay=10000
eventq_index=0
+gem5_extensions=true
int_latency=10000
it_lines=128
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
platform=system.realview
+power_model=Null
system=system
pio=system.membus.master[2]
@@ -1943,14 +2174,19 @@ pio=system.membus.master[2]
type=HDLcd
amba_id=1314816
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
enable_capture=true
eventq_index=0
gic=system.realview.gic
int_num=117
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=721420288
pio_latency=10000
pixel_buffer_size=2048
pixel_chunk=32
+power_model=Null
pxl_clk=system.realview.dcc.osc_pxl
system=system
vnc=system.vncserver
@@ -2036,14 +2272,19 @@ VendorID=32902
clk_domain=system.clk_domain
config_latency=20000
ctrl_offset=0
+default_p_state=UNDEFINED
disks=system.cf0
eventq_index=0
host=system.realview.pci_host
io_shift=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=30000
+power_model=Null
system=system
dma=system.iobus.slave[3]
pio=system.iobus.master[23]
@@ -2052,13 +2293,18 @@ pio=system.iobus.master[23]
type=Pl050
amba_id=1314896
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
int_delay=1000000
int_num=44
is_mouse=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470155264
pio_latency=100000
+power_model=Null
system=system
vnc=system.vncserver
pio=system.iobus.master[7]
@@ -2067,13 +2313,18 @@ pio=system.iobus.master[7]
type=Pl050
amba_id=1314896
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
int_delay=1000000
int_num=45
is_mouse=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470220800
pio_latency=100000
+power_model=Null
system=system
vnc=system.vncserver
pio=system.iobus.master[8]
@@ -2081,11 +2332,16 @@ pio=system.iobus.master[8]
[system.realview.l2x0_fake]
type=IsaFake
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=739246080
pio_latency=100000
pio_size=4095
+power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
@@ -2099,11 +2355,16 @@ pio=system.iobus.master[12]
[system.realview.lan_fake]
type=IsaFake
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=436207616
pio_latency=100000
pio_size=65535
+power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
@@ -2117,19 +2378,25 @@ pio=system.iobus.master[19]
[system.realview.local_cpu_timer]
type=CpuLocalTimer
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
int_num_timer=29
int_num_watchdog=30
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=738721792
pio_latency=100000
+power_model=Null
system=system
pio=system.membus.master[4]
[system.realview.mcc]
type=SubSystem
-children=osc_clcd osc_mcc osc_peripheral osc_system_bus
+children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl
eventq_index=0
+thermal_domain=Null
[system.realview.mcc.osc_clcd]
type=RealViewOsc
@@ -2175,14 +2442,29 @@ position=0
site=0
voltage_domain=system.voltage_domain
+[system.realview.mcc.temp_crtl]
+type=RealViewTemperatureSensor
+dcc=0
+device=0
+eventq_index=0
+parent=system.realview.realview_io
+position=0
+site=0
+system=system
+
[system.realview.mmc_fake]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470089728
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[21]
@@ -2191,11 +2473,16 @@ type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
+default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
range=0:67108863
port=system.membus.master[1]
@@ -2205,21 +2492,31 @@ clk_domain=system.clk_domain
conf_base=805306368
conf_device_bits=12
conf_size=268435456
+default_p_state=UNDEFINED
eventq_index=0
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pci_dma_base=0
pci_mem_base=0
pci_pio_base=788529152
platform=system.realview
+power_model=Null
system=system
pio=system.iobus.master[2]
[system.realview.realview_io]
type=RealViewCtrl
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
idreg=35979264
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=469827584
pio_latency=100000
+power_model=Null
proc_id0=335544320
proc_id1=335544320
system=system
@@ -2229,12 +2526,17 @@ pio=system.iobus.master[1]
type=PL031
amba_id=3412017
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
int_delay=100000
int_num=36
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=471269376
pio_latency=100000
+power_model=Null
system=system
time=Thu Jan 1 00:00:00 2009
pio=system.iobus.master[10]
@@ -2243,10 +2545,15 @@ pio=system.iobus.master[10]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=true
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=469893120
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[16]
@@ -2256,12 +2563,17 @@ amba_id=1316868
clk_domain=system.clk_domain
clock0=1000000
clock1=1000000
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
int_num0=34
int_num1=34
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470876160
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[3]
@@ -2271,26 +2583,36 @@ amba_id=1316868
clk_domain=system.clk_domain
clock0=1000000
clock1=1000000
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
int_num0=35
int_num1=35
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470941696
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[4]
[system.realview.uart]
type=Pl011
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
end_on_eot=false
eventq_index=0
gic=system.realview.gic
int_delay=100000
int_num=37
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470351872
pio_latency=100000
platform=system.realview
+power_model=Null
system=system
terminal=system.terminal
pio=system.iobus.master[0]
@@ -2299,10 +2621,15 @@ pio=system.iobus.master[0]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470417408
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[13]
@@ -2310,10 +2637,15 @@ pio=system.iobus.master[13]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470482944
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[14]
@@ -2321,21 +2653,31 @@ pio=system.iobus.master[14]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470548480
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[15]
[system.realview.usb_fake]
type=IsaFake
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
fake_mem=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=452984832
pio_latency=100000
pio_size=131071
+power_model=Null
ret_bad_addr=false
ret_data16=65535
ret_data32=4294967295
@@ -2349,11 +2691,16 @@ pio=system.iobus.master[20]
[system.realview.vgic]
type=VGic
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
gic=system.realview.gic
hv_addr=738213888
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_delay=10000
platform=system.realview
+power_model=Null
ppint=25
system=system
vcpu_addr=738222080
@@ -2364,11 +2711,16 @@ type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=false
+default_p_state=UNDEFINED
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
range=402653184:436207615
port=system.iobus.master[11]
@@ -2376,10 +2728,15 @@ port=system.iobus.master[11]
type=AmbaFake
amba_id=0
clk_domain=system.clk_domain
+default_p_state=UNDEFINED
eventq_index=0
ignore_access=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
pio_addr=470745088
pio_latency=100000
+power_model=Null
system=system
pio=system.iobus.master[17]
@@ -2395,9 +2752,15 @@ port=3456
type=CoherentXBar
children=snoop_filter
clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
eventq_index=0
forward_latency=0
frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
response_latency=1
snoop_filter=system.toL2Bus.snoop_filter
snoop_response_latency=1
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-07 16:38:53 +0000