diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json | 760 |
1 files changed, 511 insertions, 249 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json index 28d4955ee..bad452cca 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/config.json @@ -6,8 +6,9 @@ "mmap_using_noreserve": false, "kernel_addr_check": true, "highest_el_is_64": false, - "kernel": "/work/gem5/dist/binaries/vmlinux.aarch64.20140821", + "kernel": "/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch64.20140821", "iobus": { + "forward_latency": 1, "slave": { "peer": [ "system.bridge.master", @@ -19,8 +20,11 @@ "role": "SLAVE" }, "name": "iobus", - "forward_latency": 1, + "p_state_clk_gate_min": 1000, + "p_state_clk_gate_bins": 20, + "cxx_class": "NoncoherentXBar", "clk_domain": "system.clk_domain", + "power_model": null, "width": 16, "eventq_index": 0, "master": { @@ -55,18 +59,22 @@ "role": "MASTER" }, "response_latency": 2, - "cxx_class": "NoncoherentXBar", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.iobus", "type": "NoncoherentXBar", "use_default_range": false, "frontend_latency": 2 }, "symbolfile": "", - "readfile": "/work/gem5/outgoing/gem5_2/tests/halt.sh", + "readfile": "/work/curdun01/gem5-external.hg/tests/testing/../halt.sh", "have_large_asid_64": false, + "thermal_model": null, "phys_addr_range_64": 40, - "have_lpae": false, + "work_begin_exit_count": 0, + "have_lpae": true, "cxx_class": "LinuxArmSystem", + "work_begin_cpu_id_exit": -1, "load_offset": 2147483648, "vncserver": { "name": "vncserver", @@ -79,9 +87,41 @@ "port": 5900 }, "multi_proc": true, + "bridge": { + "ranges": [ + "788529152:805306367", + "721420288:725614591", + "805306368:1073741823", + "1073741824:1610612735", + "402653184:469762047", + "469762048:536870911" + ], + "slave": { + "peer": "system.membus.master[0]", + "role": "SLAVE" + }, + "name": "bridge", + "p_state_clk_gate_min": 1000, + "p_state_clk_gate_bins": 20, + "cxx_class": "Bridge", + "req_size": 16, + "clk_domain": "system.clk_domain", + "power_model": null, + "delay": 50000, + "eventq_index": 0, + "master": { + "peer": "system.iobus.slave[0]", + "role": "MASTER" + }, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "path": "system.bridge", + "resp_size": 16, + "type": "Bridge" + }, "early_kernel_symbols": false, "panic_on_oops": true, - "dtb_filename": "/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb", + "dtb_filename": "/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch64.20140821.dtb", "panic_on_panic": true, "enable_context_switch_stats_dump": false, "work_begin_ckpt_count": 0, @@ -103,52 +143,64 @@ ], "realview": { "hdlcd": { - "vnc": "system.vncserver", - "pxl_clk": "system.realview.dcc.osc_pxl", - "name": "hdlcd", - "workaround_dma_line_count": true, - "amba_id": 1314816, "pio": { "peer": "system.iobus.master[6]", "role": "SLAVE" }, + "system": "system", + "cxx_class": "HDLcd", + "enable_capture": true, + "pio_addr": 721420288, + "pixel_chunk": 32, "pio_latency": 10000, "clk_domain": "system.clk_domain", - "system": "system", - "gic": "system.realview.gic", "int_num": 117, + "gic": "system.realview.gic", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "eventq_index": 0, + "pxl_clk": "system.realview.dcc.osc_pxl", + "type": "HDLcd", + "vnc": "system.vncserver", + "p_state_clk_gate_min": 1000, + "power_model": null, + "workaround_dma_line_count": true, "pixel_buffer_size": 2048, - "cxx_class": "HDLcd", - "enable_capture": true, "path": "system.realview.hdlcd", - "pio_addr": 721420288, "workaround_swap_rb": true, - "type": "HDLcd", - "pixel_chunk": 32, "dma": { "peer": "system.membus.slave[0]", "role": "MASTER" - } + }, + "name": "hdlcd", + "p_state_clk_gate_bins": 20, + "amba_id": 1314816 }, "mmc_fake": { + "p_state_clk_gate_bins": 20, "name": "mmc_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[21]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": false, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.mmc_fake", "pio_addr": 470089728, "type": "AmbaFake" }, "rtc": { + "p_state_clk_gate_min": 1000, + "p_state_clk_gate_bins": 20, "name": "rtc", "int_delay": 100000, "pio": { @@ -156,31 +208,39 @@ "role": "SLAVE" }, "amba_id": 3412017, - "time": "Thu Jan 1 00:00:00 2009", + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "gic": "system.realview.gic", "int_num": 36, "eventq_index": 0, + "time": "Thu Jan 1 00:00:00 2009", "cxx_class": "PL031", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.rtc", "pio_addr": 471269376, "type": "PL031" }, "watchdog_fake": { + "p_state_clk_gate_bins": 20, "name": "watchdog_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[17]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": false, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.watchdog_fake", "pio_addr": 470745088, "type": "AmbaFake" @@ -188,36 +248,46 @@ "vgic": { "system": "system", "name": "vgic", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.membus.master[3]", "role": "SLAVE" }, + "p_state_clk_gate_bins": 20, + "cxx_class": "VGic", "clk_domain": "system.clk_domain", - "ppint": 25, + "power_model": null, "hv_addr": 738213888, "gic": "system.realview.gic", "platform": "system.realview", "vcpu_addr": 738222080, "eventq_index": 0, - "cxx_class": "VGic", + "ppint": 25, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.vgic", "type": "VGic", "pio_delay": 10000 }, "cxx_class": "RealView", "uart3_fake": { + "p_state_clk_gate_bins": 20, "name": "uart3_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[15]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": false, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.uart3_fake", "pio_addr": 470548480, "type": "AmbaFake" @@ -225,101 +295,126 @@ "realview_io": { "proc_id1": 335544320, "name": "realview_io", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[1]", "role": "SLAVE" }, + "p_state_clk_gate_bins": 20, + "cxx_class": "RealViewCtrl", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", - "eventq_index": 0, - "cxx_class": "RealViewCtrl", "proc_id0": 335544320, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.realview_io", "idreg": 35979264, "type": "RealViewCtrl", "pio_addr": 469827584 }, "l2x0_fake": { - "system": "system", - "ret_data8": 255, - "name": "l2x0_fake", - "warn_access": "", "pio": { "peer": "system.iobus.master[12]", "role": "SLAVE" }, - "ret_bad_addr": false, - "pio_latency": 100000, - "clk_domain": "system.clk_domain", - "fake_mem": false, - "pio_size": 4095, - "ret_data32": 4294967295, - "eventq_index": 0, - "update_data": false, "ret_data64": 18446744073709551615, + "fake_mem": false, + "clk_domain": "system.clk_domain", "cxx_class": "IsaFake", - "path": "system.realview.l2x0_fake", "pio_addr": 739246080, + "update_data": false, + "warn_access": "", + "pio_latency": 100000, + "system": "system", + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "type": "IsaFake", - "ret_data16": 65535 + "p_state_clk_gate_min": 1000, + "power_model": null, + "ret_data32": 4294967295, + "path": "system.realview.l2x0_fake", + "ret_data16": 65535, + "ret_data8": 255, + "name": "l2x0_fake", + "ret_bad_addr": false, + "pio_size": 4095, + "p_state_clk_gate_bins": 20 }, "uart1_fake": { + "p_state_clk_gate_bins": 20, "name": "uart1_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[13]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": false, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.uart1_fake", "pio_addr": 470417408, "type": "AmbaFake" }, "usb_fake": { - "system": "system", - "ret_data8": 255, - "name": "usb_fake", - "warn_access": "", "pio": { "peer": "system.iobus.master[20]", "role": "SLAVE" }, - "ret_bad_addr": false, - "pio_latency": 100000, - "clk_domain": "system.clk_domain", - "fake_mem": false, - "pio_size": 131071, - "ret_data32": 4294967295, - "eventq_index": 0, - "update_data": false, "ret_data64": 18446744073709551615, + "fake_mem": false, + "clk_domain": "system.clk_domain", "cxx_class": "IsaFake", - "path": "system.realview.usb_fake", "pio_addr": 452984832, + "update_data": false, + "warn_access": "", + "pio_latency": 100000, + "system": "system", + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "type": "IsaFake", - "ret_data16": 65535 + "p_state_clk_gate_min": 1000, + "power_model": null, + "ret_data32": 4294967295, + "path": "system.realview.usb_fake", + "ret_data16": 65535, + "ret_data8": 255, + "name": "usb_fake", + "ret_bad_addr": false, + "pio_size": 131071, + "p_state_clk_gate_bins": 20 }, "system": "system", "local_cpu_timer": { "int_num_watchdog": 30, "name": "local_cpu_timer", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.membus.master[4]", "role": "SLAVE" }, - "int_num_timer": 29, + "p_state_clk_gate_bins": 20, + "cxx_class": "CpuLocalTimer", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "gic": "system.realview.gic", + "int_num_timer": 29, "eventq_index": 0, - "cxx_class": "CpuLocalTimer", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.local_cpu_timer", "pio_addr": 738721792, "type": "CpuLocalTimer" @@ -336,40 +431,51 @@ "type": "GenericTimer" }, "gic": { + "gem5_extensions": true, "it_lines": 128, + "dist_pio_delay": 10000, "name": "gic", + "p_state_clk_gate_min": 1000, "dist_addr": 738201600, + "p_state_clk_gate_bins": 20, "cpu_pio_delay": 10000, - "dist_pio_delay": 10000, + "default_p_state": "UNDEFINED", "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "cpu_addr": 738205696, "platform": "system.realview", "int_latency": 10000, "eventq_index": 0, "cxx_class": "Pl390", + "p_state_clk_gate_max": 1000000000000, + "path": "system.realview.gic", "pio": { "peer": "system.membus.master[2]", "role": "SLAVE" }, - "path": "system.realview.gic", "type": "Pl390" }, "timer1": { + "p_state_clk_gate_bins": 20, "name": "timer1", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[4]", "role": "SLAVE" }, "amba_id": 1316868, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "clock0": 1000000, "clock1": 1000000, "gic": "system.realview.gic", "eventq_index": 0, "cxx_class": "Sp804", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.timer1", "int_num0": 35, "int_num1": 35, @@ -377,20 +483,25 @@ "pio_addr": 470941696 }, "timer0": { + "p_state_clk_gate_bins": 20, "name": "timer0", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[3]", "role": "SLAVE" }, "amba_id": 1316868, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "clock0": 1000000, "clock1": 1000000, "gic": "system.realview.gic", "eventq_index": 0, "cxx_class": "Sp804", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.timer0", "int_num0": 34, "int_num1": 34, @@ -398,18 +509,23 @@ "pio_addr": 470876160 }, "uart2_fake": { + "p_state_clk_gate_bins": 20, "name": "uart2_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[14]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": false, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.uart2_fake", "pio_addr": 470482944, "type": "AmbaFake" @@ -417,15 +533,20 @@ "eventq_index": 0, "energy_ctrl": { "name": "energy_ctrl", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[22]", "role": "SLAVE" }, + "p_state_clk_gate_bins": 20, + "cxx_class": "EnergyCtrl", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, - "cxx_class": "EnergyCtrl", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.energy_ctrl", "dvfs_handler": "system.dvfs_handler", "type": "EnergyCtrl", @@ -433,6 +554,8 @@ }, "type": "RealView", "pci_host": { + "p_state_clk_gate_min": 1000, + "default_p_state": "UNDEFINED", "conf_size": 268435456, "name": "pci_host", "conf_device_bits": 12, @@ -440,55 +563,68 @@ "peer": "system.iobus.master[2]", "role": "SLAVE" }, + "p_state_clk_gate_bins": 20, "conf_base": 805306368, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "pci_dma_base": 0, "platform": "system.realview", "eventq_index": 0, "cxx_class": "GenericPciHost", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.pci_host", "pci_pio_base": 788529152, "type": "GenericPciHost", "pci_mem_base": 0 }, "lan_fake": { - "system": "system", - "ret_data8": 255, - "name": "lan_fake", - "warn_access": "", "pio": { "peer": "system.iobus.master[19]", "role": "SLAVE" }, - "ret_bad_addr": false, - "pio_latency": 100000, - "clk_domain": "system.clk_domain", - "fake_mem": false, - "pio_size": 65535, - "ret_data32": 4294967295, - "eventq_index": 0, - "update_data": false, "ret_data64": 18446744073709551615, + "fake_mem": false, + "clk_domain": "system.clk_domain", "cxx_class": "IsaFake", - "path": "system.realview.lan_fake", "pio_addr": 436207616, + "update_data": false, + "warn_access": "", + "pio_latency": 100000, + "system": "system", + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "type": "IsaFake", - "ret_data16": 65535 + "p_state_clk_gate_min": 1000, + "power_model": null, + "ret_data32": 4294967295, + "path": "system.realview.lan_fake", + "ret_data16": 65535, + "ret_data8": 255, + "name": "lan_fake", + "ret_bad_addr": false, + "pio_size": 65535, + "p_state_clk_gate_bins": 20 }, "aaci_fake": { + "p_state_clk_gate_bins": 20, "name": "aaci_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[18]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": false, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.aaci_fake", "pio_addr": 470024192, "type": "AmbaFake" @@ -523,10 +659,6 @@ "freq": 20000, "type": "RealViewOsc" }, - "type": "SubSystem", - "eventq_index": 0, - "cxx_class": "SubSystem", - "path": "system.realview.mcc", "osc_clcd": { "position": 0, "name": "osc_clcd", @@ -541,6 +673,24 @@ "freq": 42105, "type": "RealViewOsc" }, + "thermal_domain": null, + "eventq_index": 0, + "cxx_class": "SubSystem", + "path": "system.realview.mcc", + "temp_crtl": { + "system": "system", + "position": 0, + "name": "temp_crtl", + "parent": "system.realview.realview_io", + "dcc": 0, + "site": 0, + "eventq_index": 0, + "cxx_class": "RealViewTemperatureSensor", + "device": 0, + "path": "system.realview.mcc.temp_crtl", + "type": "RealViewTemperatureSensor" + }, + "type": "SubSystem", "osc_system_bus": { "position": 0, "name": "osc_system_bus", @@ -572,6 +722,7 @@ "freq": 25000, "type": "RealViewOsc" }, + "thermal_domain": null, "osc_sys": { "position": 0, "name": "osc_sys", @@ -652,12 +803,17 @@ "range": "402653184:436207615", "latency": 30000, "name": "vram", + "p_state_clk_gate_min": 1000, "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.clk_domain", + "power_model": null, "latency_var": 0, "bandwidth": "73.000000", "conf_table_reported": false, "cxx_class": "SimpleMemory", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.vram", "null": false, "type": "SimpleMemory", @@ -671,12 +827,17 @@ "range": "0:67108863", "latency": 30000, "name": "nvmem", + "p_state_clk_gate_min": 1000, "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.clk_domain", + "power_model": null, "latency_var": 0, "bandwidth": "73.000000", "conf_table_reported": true, "cxx_class": "SimpleMemory", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.nvmem", "null": false, "type": "SimpleMemory", @@ -687,54 +848,66 @@ "in_addr_map": true }, "clcd": { - "dma": { - "peer": "system.iobus.slave[1]", - "role": "MASTER" - }, - "pixel_clock": 41667, - "vnc": "system.vncserver", - "name": "clcd", "pio": { "peer": "system.iobus.master[5]", "role": "SLAVE" }, - "amba_id": 1315089, + "system": "system", + "cxx_class": "Pl111", + "enable_capture": true, + "pio_addr": 471793664, "pio_latency": 10000, "clk_domain": "system.clk_domain", - "system": "system", - "gic": "system.realview.gic", "int_num": 46, + "gic": "system.realview.gic", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "eventq_index": 0, - "cxx_class": "Pl111", - "enable_capture": true, + "type": "Pl111", + "vnc": "system.vncserver", + "p_state_clk_gate_min": 1000, + "power_model": null, "path": "system.realview.clcd", - "pio_addr": 471793664, - "type": "Pl111" + "dma": { + "peer": "system.iobus.slave[1]", + "role": "MASTER" + }, + "name": "clcd", + "p_state_clk_gate_bins": 20, + "pixel_clock": 41667, + "amba_id": 1315089 }, "name": "realview", "uart": { + "p_state_clk_gate_min": 1000, "terminal": "system.terminal", - "name": "uart", - "int_delay": 100000, - "platform": "system.realview", "pio": { "peer": "system.iobus.master[0]", "role": "SLAVE" }, + "name": "uart", + "int_delay": 100000, + "platform": "system.realview", + "p_state_clk_gate_bins": 20, + "cxx_class": "Pl011", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "gic": "system.realview.gic", "int_num": 37, "eventq_index": 0, "end_on_eot": false, - "cxx_class": "Pl011", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.uart", "pio_addr": 470351872, "type": "Pl011" }, "intrctrl": "system.intrctrl", "kmi1": { + "p_state_clk_gate_min": 1000, + "p_state_clk_gate_bins": 20, "vnc": "system.vncserver", "name": "kmi1", "int_delay": 1000000, @@ -743,19 +916,24 @@ "role": "SLAVE" }, "amba_id": 1314896, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "gic": "system.realview.gic", "int_num": 45, "eventq_index": 0, "is_mouse": true, "cxx_class": "Pl050", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.kmi1", "pio_addr": 470220800, "type": "Pl050" }, "kmi0": { + "p_state_clk_gate_min": 1000, + "p_state_clk_gate_bins": 20, "vnc": "system.vncserver", "name": "kmi0", "int_delay": 1000000, @@ -764,14 +942,17 @@ "role": "SLAVE" }, "amba_id": 1314896, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "gic": "system.realview.gic", "int_num": 44, "eventq_index": 0, "is_mouse": false, "cxx_class": "Pl050", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.kmi0", "pio_addr": 470155264, "type": "Pl050" @@ -793,6 +974,7 @@ "PXCAPDevCapabilities": 0, "MSIXCAPCapId": 0, "BAR3Size": 4, + "power_model": null, "PXCAPCapabilities": 0, "SubsystemID": 0, "PXCAPCapId": 0, @@ -816,8 +998,10 @@ "BAR2LegacyIO": false, "LatencyTimer": 0, "BAR4LegacyIO": false, + "p_state_clk_gate_max": 1000000000000, "PXCAPLinkStatus": 0, "PXCAPDevCap2": 0, + "p_state_clk_gate_min": 1000, "PXCAPDevCtrl": 0, "MSICAPMaskBits": 0, "host": "system.realview.pci_host", @@ -841,6 +1025,7 @@ "name": "cf_ctrl", "PXCAPNextCapability": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", "type": "IdeController", "ctrl_offset": 2, "PXCAPBaseOffset": 0, @@ -872,21 +1057,27 @@ "ProgIF": 133, "BAR1LegacyIO": true, "PMCAPCapabilities": 0, - "ClassCode": 1 + "ClassCode": 1, + "p_state_clk_gate_bins": 20 }, "sp810_fake": { + "p_state_clk_gate_bins": 20, "name": "sp810_fake", + "p_state_clk_gate_min": 1000, "pio": { "peer": "system.iobus.master[16]", "role": "SLAVE" }, "amba_id": 0, "ignore_access": true, + "default_p_state": "UNDEFINED", "pio_latency": 100000, "clk_domain": "system.clk_domain", + "power_model": null, "system": "system", "eventq_index": 0, "cxx_class": "AmbaFake", + "p_state_clk_gate_max": 1000000000000, "path": "system.realview.sp810_fake", "pio_addr": 469893120, "type": "AmbaFake" @@ -910,6 +1101,7 @@ "MSIXCAPCapId": 0, "BAR3Size": 0, "rx_desc_cache_size": 64, + "power_model": null, "PXCAPCapabilities": 0, "SubsystemID": 4104, "PXCAPCapId": 0, @@ -933,8 +1125,10 @@ "BAR2LegacyIO": false, "LatencyTimer": 0, "BAR4LegacyIO": false, + "p_state_clk_gate_max": 1000000000000, "PXCAPLinkStatus": 0, "PXCAPDevCap2": 0, + "p_state_clk_gate_min": 1000, "PXCAPDevCtrl": 0, "MSICAPMaskBits": 0, "host": "system.realview.pci_host", @@ -960,6 +1154,7 @@ "name": "ethernet", "PXCAPNextCapability": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", "type": "IGbE", "tx_fifo_size": 393216, "PXCAPBaseOffset": 0, @@ -996,6 +1191,7 @@ "wb_comp_delay": 10000, "PMCAPCapabilities": 0, "ClassCode": 2, + "p_state_clk_gate_bins": 20, "rx_fifo_size": 393216, "phy_pid": 680 }, @@ -1016,6 +1212,7 @@ "PXCAPDevCapabilities": 0, "MSIXCAPCapId": 0, "BAR3Size": 4, + "power_model": null, "PXCAPCapabilities": 0, "SubsystemID": 0, "PXCAPCapId": 0, @@ -1041,8 +1238,10 @@ "BAR2LegacyIO": false, "LatencyTimer": 0, "BAR4LegacyIO": false, + "p_state_clk_gate_max": 1000000000000, "PXCAPLinkStatus": 0, "PXCAPDevCap2": 0, + "p_state_clk_gate_min": 1000, "PXCAPDevCtrl": 0, "MSICAPMaskBits": 0, "host": "system.realview.pci_host", @@ -1066,6 +1265,7 @@ "name": "ide", "PXCAPNextCapability": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", "type": "IdeController", "ctrl_offset": 0, "PXCAPBaseOffset": 0, @@ -1097,54 +1297,50 @@ "ProgIF": 133, "BAR1LegacyIO": false, "PMCAPCapabilities": 0, - "ClassCode": 1 + "ClassCode": 1, + "p_state_clk_gate_bins": 20 } }, "membus": { - "default": { - "peer": "system.membus.badaddr_responder.pio", - "role": "MASTER" - }, - "slave": { - "peer": [ - "system.realview.hdlcd.dma", - "system.system_port", - "system.cpu.l2cache.mem_side", - "system.iocache.mem_side" - ], - "role": "SLAVE" - }, - "name": "membus", + "point_of_coherency": true, + "system": "system", + "response_latency": 2, + "cxx_class": "CoherentXBar", "badaddr_responder": { - "system": "system", - "ret_data8": 255, - "name": "badaddr_responder", - "warn_access": "warn", "pio": { "peer": "system.membus.default", "role": "SLAVE" }, - "ret_bad_addr": true, - "pio_latency": 100000, - "clk_domain": "system.clk_domain", - "fake_mem": false, - "pio_size": 8, - "ret_data32": 4294967295, - "eventq_index": 0, - "update_data": false, "ret_data64": 18446744073709551615, + "fake_mem": false, + "clk_domain": "system.clk_domain", "cxx_class": "IsaFake", - "path": "system.membus.badaddr_responder", "pio_addr": 0, + "update_data": false, + "warn_access": "warn", + "pio_latency": 100000, + "system": "system", + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "type": "IsaFake", - "ret_data16": 65535 + "p_state_clk_gate_min": 1000, + "power_model": null, + "ret_data32": 4294967295, + "path": "system.membus.badaddr_responder", + "ret_data16": 65535, + "ret_data8": 255, + "name": "badaddr_responder", + "ret_bad_addr": true, + "pio_size": 8, + "p_state_clk_gate_bins": 20 }, - "snoop_filter": null, "forward_latency": 4, "clk_domain": "system.clk_domain", - "system": "system", "width": 16, "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "master": { "peer": [ "system.bridge.slave", @@ -1156,16 +1352,34 @@ ], "role": "MASTER" }, - "response_latency": 2, - "cxx_class": "CoherentXBar", + "type": "CoherentXBar", + "frontend_latency": 3, + "slave": { + "peer": [ + "system.realview.hdlcd.dma", + "system.system_port", + "system.cpu.l2cache.mem_side", + "system.iocache.mem_side" + ], + "role": "SLAVE" + }, + "p_state_clk_gate_min": 1000, + "snoop_filter": null, + "power_model": null, "path": "system.membus", "snoop_response_latency": 4, - "type": "CoherentXBar", - "use_default_range": false, - "frontend_latency": 3 + "name": "membus", + "default": { + "peer": "system.membus.badaddr_responder.pio", + "role": "MASTER" + }, + "p_state_clk_gate_bins": 20, + "use_default_range": false }, "multi_thread": false, "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "iocache": { "cpu_side": { "peer": "system.iobus.master[25]", @@ -1173,45 +1387,54 @@ }, "clusivity": "mostly_incl", "prefetcher": null, - "clk_domain": "system.clk_domain", + "system": "system", "write_buffers": 8, "response_latency": 50, "cxx_class": "Cache", "size": 1024, "tags": { "name": "tags", + "p_state_clk_gate_min": 1000, "eventq_index": 0, - "hit_latency": 50, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.clk_domain", + "power_model": null, "sequential_access": false, "assoc": 8, "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, "path": "system.iocache.tags", + "hit_latency": 50, "block_size": 64, "type": "LRU", "size": 1024 }, - "system": "system", + "clk_domain": "system.clk_domain", "max_miss_count": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "mem_side": { "peer": "system.membus.slave[3]", "role": "MASTER" }, "type": "Cache", - "forward_snoops": false, "writeback_clean": false, + "p_state_clk_gate_min": 1000, "hit_latency": 50, "tgts_per_mshr": 12, "demand_mshr_reserve": 1, + "power_model": null, "addr_ranges": [ "2147483648:2415919103" ], "is_read_only": false, "prefetch_on_access": false, "path": "system.iocache", - "name": "iocache", "mshrs": 20, + "name": "iocache", + "p_state_clk_gate_bins": 20, "sequential_access": false, "assoc": 8 }, @@ -1228,33 +1451,7 @@ }, "work_end_exit_count": 0, "type": "LinuxArmSystem", - "bridge": { - "ranges": [ - "788529152:805306367", - "721420288:725614591", - "805306368:1073741823", - "1073741824:1610612735", - "402653184:469762047", - "469762048:536870911" - ], - "slave": { - "peer": "system.membus.master[0]", - "role": "SLAVE" - }, - "name": "bridge", - "req_size": 16, - "clk_domain": "system.clk_domain", - "delay": 50000, - "eventq_index": 0, - "master": { - "peer": "system.iobus.slave[0]", - "role": "MASTER" - }, - "cxx_class": "Bridge", - "path": "system.bridge", - "resp_size": 16, - "type": "Bridge" - }, + "p_state_clk_gate_min": 1000, "voltage_domain": { "name": "voltage_domain", "eventq_index": 0, @@ -1267,17 +1464,26 @@ }, "cache_line_size": 64, "boot_osflags": "earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1", + "system_port": { + "peer": "system.membus.slave[1]", + "role": "MASTER" + }, "physmem": [ { "range": "2147483648:2415919103", "latency": 30000, "name": "physmem", + "p_state_clk_gate_min": 1000, "eventq_index": 0, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.clk_domain", + "power_model": null, "latency_var": 0, "bandwidth": "73.000000", "conf_table_reported": true, "cxx_class": "SimpleMemory", + "p_state_clk_gate_max": 1000000000000, "path": "system.physmem", "null": false, "type": "SimpleMemory", @@ -1299,6 +1505,7 @@ "type": "Terminal", "port": 3456 }, + "power_model": null, "reset_addr_64": 0, "cpu": [ { @@ -1310,12 +1517,17 @@ "eventq_index": 0, "cxx_class": "ArmISA::TLB", "walker": { + "p_state_clk_gate_min": 1000, "name": "walker", "is_stage2": false, + "p_state_clk_gate_bins": 20, + "cxx_class": "ArmISA::TableWalker", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sys": "system", "eventq_index": 0, - "cxx_class": "ArmISA::TableWalker", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.itb.walker", "type": "ArmTableWalker", "port": { @@ -1339,12 +1551,17 @@ "eventq_index": 0, "cxx_class": "ArmISA::TLB", "walker": { + "p_state_clk_gate_min": 1000, "name": "walker", "is_stage2": true, + "p_state_clk_gate_bins": 20, + "cxx_class": "ArmISA::TableWalker", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sys": "system", "eventq_index": 0, - "cxx_class": "ArmISA::TableWalker", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.istage2_mmu.stage2_tlb.walker", "type": "ArmTableWalker", "num_squash_per_cycle": 2 @@ -1358,65 +1575,6 @@ "path": "system.cpu.istage2_mmu", "type": "ArmStage2MMU" }, - "function_trace": false, - "do_checkpoint_insts": true, - "cxx_class": "AtomicSimpleCPU", - "max_loads_all_threads": 0, - "system": "system", - "clk_domain": "system.cpu_clk_domain", - "function_trace_start": 0, - "cpu_id": 0, - "width": 1, - "checker": null, - "eventq_index": 0, - "toL2Bus": { - "slave": { - "peer": [ - "system.cpu.icache.mem_side", - "system.cpu.dcache.mem_side", - "system.cpu.itb.walker.port", - "system.cpu.dtb.walker.port" - ], - "role": "SLAVE" - }, - "name": "toL2Bus", - "snoop_filter": { - "name": "snoop_filter", - "system": "system", - "max_capacity": 8388608, - "eventq_index": 0, - "cxx_class": "SnoopFilter", - "path": "system.cpu.toL2Bus.snoop_filter", - "type": "SnoopFilter", - "lookup_latency": 0 - }, - "forward_latency": 0, - "clk_domain": "system.cpu_clk_domain", - "system": "system", - "width": 32, - "eventq_index": 0, - "master": { - "peer": [ - "system.cpu.l2cache.cpu_side" - ], - "role": "MASTER" - }, - "response_latency": 1, - "cxx_class": "CoherentXBar", - "path": "system.cpu.toL2Bus", - "snoop_response_latency": 1, - "type": "CoherentXBar", - "use_default_range": false, - "frontend_latency": 1 - }, - "do_quiesce": true, - "type": "AtomicSimpleCPU", - "fastmem": false, - "profile": 0, - "icache_port": { - "peer": "system.cpu.icache.cpu_side", - "role": "MASTER" - }, "icache": { "cpu_side": { "peer": "system.cpu.icache_port", @@ -1424,48 +1582,126 @@ }, "clusivity": "mostly_incl", "prefetcher": null, - "clk_domain": "system.cpu_clk_domain", + "system": "system", "write_buffers": 8, "response_latency": 2, "cxx_class": "Cache", "size": 32768, "tags": { "name": "tags", + "p_state_clk_gate_min": 1000, "eventq_index": 0, - "hit_latency": 2, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sequential_access": false, "assoc": 1, "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.icache.tags", + "hit_latency": 2, "block_size": 64, "type": "LRU", "size": 32768 }, - "system": "system", + "clk_domain": "system.cpu_clk_domain", "max_miss_count": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "mem_side": { "peer": "system.cpu.toL2Bus.slave[0]", "role": "MASTER" }, "type": "Cache", - "forward_snoops": true, "writeback_clean": true, + "p_state_clk_gate_min": 1000, "hit_latency": 2, "tgts_per_mshr": 20, "demand_mshr_reserve": 1, + "power_model": null, "addr_ranges": [ "0:18446744073709551615" ], "is_read_only": true, "prefetch_on_access": false, "path": "system.cpu.icache", - "name": "icache", "mshrs": 4, + "name": "icache", + "p_state_clk_gate_bins": 20, "sequential_access": false, "assoc": 1 }, + "function_trace": false, + "do_checkpoint_insts": true, + "cxx_class": "AtomicSimpleCPU", + "max_loads_all_threads": 0, + "system": "system", + "clk_domain": "system.cpu_clk_domain", + "function_trace_start": 0, + "cpu_id": 0, + "width": 1, + "checker": null, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "toL2Bus": { + "point_of_coherency": false, + "system": "system", + "response_latency": 1, + "cxx_class": "CoherentXBar", + "forward_latency": 0, + "clk_domain": "system.cpu_clk_domain", + "width": 32, + "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, + "master": { + "peer": [ + "system.cpu.l2cache.cpu_side" + ], + "role": "MASTER" + }, + "type": "CoherentXBar", + "frontend_latency": 1, + "slave": { + "peer": [ + "system.cpu.icache.mem_side", + "system.cpu.dcache.mem_side", + "system.cpu.itb.walker.port", + "system.cpu.dtb.walker.port" + ], + "role": "SLAVE" + }, + "p_state_clk_gate_min": 1000, + "snoop_filter": { + "name": "snoop_filter", + "system": "system", + "max_capacity": 8388608, + "eventq_index": 0, + "cxx_class": "SnoopFilter", + "path": "system.cpu.toL2Bus.snoop_filter", + "type": "SnoopFilter", + "lookup_latency": 0 + }, + "power_model": null, + "path": "system.cpu.toL2Bus", + "snoop_response_latency": 1, + "name": "toL2Bus", + "p_state_clk_gate_bins": 20, + "use_default_range": false + }, + "do_quiesce": true, + "type": "AtomicSimpleCPU", + "fastmem": false, + "profile": 0, + "icache_port": { + "peer": "system.cpu.icache.cpu_side", + "role": "MASTER" + }, + "p_state_clk_gate_bins": 20, + "p_state_clk_gate_min": 1000, "interrupts": [ { "eventq_index": 0, @@ -1480,6 +1716,7 @@ "role": "MASTER" }, "socket_id": 0, + "power_model": null, "max_insts_all_threads": 0, "dstage2_mmu": { "name": "dstage2_mmu", @@ -1491,12 +1728,17 @@ "eventq_index": 0, "cxx_class": "ArmISA::TLB", "walker": { + "p_state_clk_gate_min": 1000, "name": "walker", "is_stage2": true, + "p_state_clk_gate_bins": 20, + "cxx_class": "ArmISA::TableWalker", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sys": "system", "eventq_index": 0, - "cxx_class": "ArmISA::TableWalker", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.dstage2_mmu.stage2_tlb.walker", "type": "ArmTableWalker", "num_squash_per_cycle": 2 @@ -1517,45 +1759,54 @@ }, "clusivity": "mostly_incl", "prefetcher": null, - "clk_domain": "system.cpu_clk_domain", + "system": "system", "write_buffers": 8, "response_latency": 20, "cxx_class": "Cache", "size": 4194304, "tags": { "name": "tags", + "p_state_clk_gate_min": 1000, "eventq_index": 0, - "hit_latency": 20, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sequential_access": false, "assoc": 8, "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.l2cache.tags", + "hit_latency": 20, "block_size": 64, "type": "LRU", "size": 4194304 }, - "system": "system", + "clk_domain": "system.cpu_clk_domain", "max_miss_count": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "mem_side": { "peer": "system.membus.slave[2]", "role": "MASTER" }, "type": "Cache", - "forward_snoops": true, "writeback_clean": false, + "p_state_clk_gate_min": 1000, "hit_latency": 20, "tgts_per_mshr": 12, "demand_mshr_reserve": 1, + "power_model": null, "addr_ranges": [ "0:18446744073709551615" ], "is_read_only": false, "prefetch_on_access": false, "path": "system.cpu.l2cache", - "name": "l2cache", "mshrs": 20, + "name": "l2cache", + "p_state_clk_gate_bins": 20, "sequential_access": false, "assoc": 8 }, @@ -1570,12 +1821,17 @@ "eventq_index": 0, "cxx_class": "ArmISA::TLB", "walker": { + "p_state_clk_gate_min": 1000, "name": "walker", "is_stage2": false, + "p_state_clk_gate_bins": 20, + "cxx_class": "ArmISA::TableWalker", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sys": "system", "eventq_index": 0, - "cxx_class": "ArmISA::TableWalker", + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.dtb.walker", "type": "ArmTableWalker", "port": { @@ -1600,45 +1856,54 @@ }, "clusivity": "mostly_incl", "prefetcher": null, - "clk_domain": "system.cpu_clk_domain", + "system": "system", "write_buffers": 8, "response_latency": 2, "cxx_class": "Cache", "size": 32768, "tags": { "name": "tags", + "p_state_clk_gate_min": 1000, "eventq_index": 0, - "hit_latency": 2, + "p_state_clk_gate_bins": 20, + "default_p_state": "UNDEFINED", "clk_domain": "system.cpu_clk_domain", + "power_model": null, "sequential_access": false, "assoc": 4, "cxx_class": "LRU", + "p_state_clk_gate_max": 1000000000000, "path": "system.cpu.dcache.tags", + "hit_latency": 2, "block_size": 64, "type": "LRU", "size": 32768 }, - "system": "system", + "clk_domain": "system.cpu_clk_domain", "max_miss_count": 0, "eventq_index": 0, + "default_p_state": "UNDEFINED", + "p_state_clk_gate_max": 1000000000000, "mem_side": { "peer": "system.cpu.toL2Bus.slave[1]", "role": "MASTER" }, "type": "Cache", - "forward_snoops": true, "writeback_clean": false, + "p_state_clk_gate_min": 1000, "hit_latency": 2, "tgts_per_mshr": 20, "demand_mshr_reserve": 1, + "power_model": null, "addr_ranges": [ "0:18446744073709551615" ], "is_read_only": false, "prefetch_on_access": false, "path": "system.cpu.dcache", - "name": "dcache", "mshrs": 4, + "name": "dcache", + "p_state_clk_gate_bins": 20, "sequential_access": false, "assoc": 4 }, @@ -1689,7 +1954,7 @@ ], "gic_cpu_addr": 738205696, "work_cpus_ckpt_count": 0, - "work_begin_exit_count": 0, + "thermal_components": [], "machine_type": "VExpress_EMM64", "flags_addr": 469827632, "path": "system", @@ -1720,7 +1985,7 @@ "eventq_index": 0, "cxx_class": "RawDiskImage", "path": "system.cf0.image.child", - "image_file": "/work/gem5/dist/disks/linaro-minimal-aarch64.img", + "image_file": "/arm/projectscratch/randd/systems/dist/disks/linaro-minimal-aarch64.img", "type": "RawDiskImage" }, "path": "system.cf0.image", @@ -1738,10 +2003,7 @@ "mem_mode": "atomic", "name": "system", "init_param": 0, - "system_port": { - "peer": "system.membus.slave[1]", - "role": "MASTER" - }, + "p_state_clk_gate_bins": 20, "load_addr_mask": 268435455, "work_item_id": -1, "intrctrl": { @@ -1759,11 +2021,11 @@ "system.realview.nvmem", "system.realview.vram" ], - "work_begin_cpu_id_exit": -1, + "num_work_ids": 16, "boot_loader": [ - "/work/gem5/dist/binaries/boot_emm.arm64" + "/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm64" ], - "num_work_ids": 16 + "exit_on_work_items": false }, "time_sync_period": 100000000000, "eventq_index": 0, |