diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt index e1c9b6ef6..7ab4128ed 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-simple-atomic-checkpoint/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.111153 # Nu sim_ticks 51111152682000 # Number of ticks simulated final_tick 51111152682000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1154147 # Simulator instruction rate (inst/s) -host_op_rate 1356312 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 59914222846 # Simulator tick rate (ticks/s) -host_mem_usage 725376 # Number of bytes of host memory used -host_seconds 853.07 # Real time elapsed on the host +host_inst_rate 549288 # Simulator instruction rate (inst/s) +host_op_rate 645503 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 28514691627 # Simulator tick rate (ticks/s) +host_mem_usage 672288 # Number of bytes of host memory used +host_seconds 1792.45 # Real time elapsed on the host sim_insts 984570519 # Number of instructions simulated sim_ops 1157031967 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -210,9 +210,11 @@ system.cpu.itb.inst_accesses 985174158 # IT system.cpu.itb.hits 985047321 # DTB hits system.cpu.itb.misses 126837 # DTB misses system.cpu.itb.accesses 985174158 # DTB accesses -system.cpu.numCycles 102222325018 # number of cpu cycles simulated +system.cpu.numCycles 102222322140 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.kern.inst.arm 0 # number of arm instructions executed +system.cpu.kern.inst.quiesce 16775 # number of quiesce instructions executed system.cpu.committedInsts 984570519 # Number of instructions committed system.cpu.committedOps 1157031967 # Number of ops (including micro ops) committed system.cpu.num_int_alu_accesses 1060455466 # Number of integer alu accesses @@ -230,8 +232,8 @@ system.cpu.num_cc_register_writes 263829403 # nu system.cpu.num_mem_refs 352465606 # number of memory refs system.cpu.num_load_insts 184180431 # Number of load instructions system.cpu.num_store_insts 168285175 # Number of store instructions -system.cpu.num_idle_cycles 101064646448.926407 # Number of idle cycles -system.cpu.num_busy_cycles 1157678569.073592 # Number of busy cycles +system.cpu.num_idle_cycles 101064643603.520065 # Number of idle cycles +system.cpu.num_busy_cycles 1157678536.479939 # Number of busy cycles system.cpu.not_idle_fraction 0.011325 # Percentage of non-idle cycles system.cpu.idle_fraction 0.988675 # Percentage of idle cycles system.cpu.Branches 220088562 # Number of branches fetched @@ -270,8 +272,6 @@ system.cpu.op_class::MemWrite 168285175 14.54% 100.00% # Cl system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 1157666593 # Class of executed instruction -system.cpu.kern.inst.arm 0 # number of arm instructions executed -system.cpu.kern.inst.quiesce 19653 # number of quiesce instructions executed system.cpu.dcache.tags.replacements 11612141 # number of replacements system.cpu.dcache.tags.tagsinuse 511.999719 # Cycle average of tags in use system.cpu.dcache.tags.total_refs 340776008 # Total number of references to valid blocks. |