diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt')
| -rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt | 3202 |
1 files changed, 1599 insertions, 1603 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt index d09bb714e..8a6768cf2 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/stats.txt @@ -1,158 +1,158 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 51.771727 # Number of seconds simulated -sim_ticks 51771726701500 # Number of ticks simulated -final_tick 51771726701500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 51.799232 # Number of seconds simulated +sim_ticks 51799232151500 # Number of ticks simulated +final_tick 51799232151500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 821234 # Simulator instruction rate (inst/s) -host_op_rate 965096 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 51452236494 # Simulator tick rate (ticks/s) -host_mem_usage 677452 # Number of bytes of host memory used -host_seconds 1006.21 # Real time elapsed on the host -sim_insts 826333887 # Number of instructions simulated -sim_ops 971088679 # Number of ops (including micro ops) simulated +host_inst_rate 1085172 # Simulator instruction rate (inst/s) +host_op_rate 1275227 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 67259328222 # Simulator tick rate (ticks/s) +host_mem_usage 678040 # Number of bytes of host memory used +host_seconds 770.14 # Real time elapsed on the host +sim_insts 835736802 # Number of instructions simulated +sim_ops 982105580 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks -system.physmem.bytes_read::cpu0.dtb.walker 69952 # Number of bytes read from this memory -system.physmem.bytes_read::cpu0.itb.walker 75072 # Number of bytes read from this memory -system.physmem.bytes_read::cpu0.inst 2290776 # Number of bytes read from this memory -system.physmem.bytes_read::cpu0.data 31969648 # Number of bytes read from this memory -system.physmem.bytes_read::cpu1.dtb.walker 59200 # Number of bytes read from this memory -system.physmem.bytes_read::cpu1.itb.walker 65024 # Number of bytes read from this memory -system.physmem.bytes_read::cpu1.inst 2387996 # Number of bytes read from this memory -system.physmem.bytes_read::cpu1.data 32286808 # Number of bytes read from this memory -system.physmem.bytes_read::realview.ide 387264 # Number of bytes read from this memory -system.physmem.bytes_read::total 69591740 # Number of bytes read from this memory -system.physmem.bytes_inst_read::cpu0.inst 2290776 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::cpu1.inst 2387996 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::total 4678772 # Number of instructions bytes read from this memory -system.physmem.bytes_written::writebacks 60611648 # Number of bytes written to this memory +system.physmem.bytes_read::cpu0.dtb.walker 74880 # Number of bytes read from this memory +system.physmem.bytes_read::cpu0.itb.walker 80448 # Number of bytes read from this memory +system.physmem.bytes_read::cpu0.inst 2375384 # Number of bytes read from this memory +system.physmem.bytes_read::cpu0.data 17755184 # Number of bytes read from this memory +system.physmem.bytes_read::cpu1.dtb.walker 76352 # Number of bytes read from this memory +system.physmem.bytes_read::cpu1.itb.walker 77888 # Number of bytes read from this memory +system.physmem.bytes_read::cpu1.inst 2376540 # Number of bytes read from this memory +system.physmem.bytes_read::cpu1.data 17975768 # Number of bytes read from this memory +system.physmem.bytes_read::realview.ide 395840 # Number of bytes read from this memory +system.physmem.bytes_read::total 41188284 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu0.inst 2375384 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::cpu1.inst 2376540 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 4751924 # Number of instructions bytes read from this memory +system.physmem.bytes_written::writebacks 62641792 # Number of bytes written to this memory system.physmem.bytes_written::cpu0.data 15860 # Number of bytes written to this memory system.physmem.bytes_written::cpu1.data 4720 # Number of bytes written to this memory -system.physmem.bytes_written::total 60632228 # Number of bytes written to this memory -system.physmem.num_reads::cpu0.dtb.walker 1093 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu0.itb.walker 1173 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu0.inst 56454 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu0.data 499529 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu1.dtb.walker 925 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu1.itb.walker 1016 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu1.inst 57059 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu1.data 504491 # Number of read requests responded to by this memory -system.physmem.num_reads::realview.ide 6051 # Number of read requests responded to by this memory -system.physmem.num_reads::total 1127791 # Number of read requests responded to by this memory -system.physmem.num_writes::writebacks 947057 # Number of write requests responded to by this memory +system.physmem.bytes_written::total 62662372 # Number of bytes written to this memory +system.physmem.num_reads::cpu0.dtb.walker 1170 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu0.itb.walker 1257 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu0.inst 57776 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu0.data 277428 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu1.dtb.walker 1193 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu1.itb.walker 1217 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu1.inst 56880 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu1.data 280881 # Number of read requests responded to by this memory +system.physmem.num_reads::realview.ide 6185 # Number of read requests responded to by this memory +system.physmem.num_reads::total 683987 # Number of read requests responded to by this memory +system.physmem.num_writes::writebacks 978778 # Number of write requests responded to by this memory system.physmem.num_writes::cpu0.data 1983 # Number of write requests responded to by this memory system.physmem.num_writes::cpu1.data 590 # Number of write requests responded to by this memory -system.physmem.num_writes::total 949630 # Number of write requests responded to by this memory -system.physmem.bw_read::cpu0.dtb.walker 1351 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu0.itb.walker 1450 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu0.inst 44248 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu0.data 617512 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu1.dtb.walker 1143 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu1.itb.walker 1256 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu1.inst 46125 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu1.data 623638 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::realview.ide 7480 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 1344204 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu0.inst 44248 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu1.inst 46125 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 90373 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_write::writebacks 1170748 # Write bandwidth from this memory (bytes/s) +system.physmem.num_writes::total 981351 # Number of write requests responded to by this memory +system.physmem.bw_read::cpu0.dtb.walker 1446 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu0.itb.walker 1553 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu0.inst 45858 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu0.data 342769 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu1.dtb.walker 1474 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu1.itb.walker 1504 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu1.inst 45880 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu1.data 347028 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::realview.ide 7642 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 795152 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu0.inst 45858 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu1.inst 45880 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 91737 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write::writebacks 1209319 # Write bandwidth from this memory (bytes/s) system.physmem.bw_write::cpu0.data 306 # Write bandwidth from this memory (bytes/s) system.physmem.bw_write::cpu1.data 91 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 1171146 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total::writebacks 1170748 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu0.dtb.walker 1351 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu0.itb.walker 1450 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu0.inst 44248 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu0.data 617818 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu1.dtb.walker 1143 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu1.itb.walker 1256 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu1.inst 46125 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu1.data 623729 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::realview.ide 7480 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 2515349 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 1127791 # Number of read requests accepted -system.physmem.writeReqs 949630 # Number of write requests accepted -system.physmem.readBursts 1127791 # Number of DRAM read bursts, including those serviced by the write queue -system.physmem.writeBursts 949630 # Number of DRAM write bursts, including those merged in the write queue -system.physmem.bytesReadDRAM 72133184 # Total number of bytes read from DRAM -system.physmem.bytesReadWrQ 45440 # Total number of bytes read from write queue -system.physmem.bytesWritten 60631936 # Total number of bytes written to DRAM -system.physmem.bytesReadSys 69591740 # Total read bytes from the system interface side -system.physmem.bytesWrittenSys 60632228 # Total written bytes from the system interface side -system.physmem.servicedByWrQ 710 # Number of DRAM read bursts serviced by the write queue -system.physmem.mergedWrBursts 2256 # Number of DRAM write bursts merged with an existing one +system.physmem.bw_write::total 1209716 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::writebacks 1209319 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu0.dtb.walker 1446 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu0.itb.walker 1553 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu0.inst 45858 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu0.data 343075 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu1.dtb.walker 1474 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu1.itb.walker 1504 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu1.inst 45880 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu1.data 347119 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::realview.ide 7642 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 2004869 # Total bandwidth to/from this memory (bytes/s) +system.physmem.readReqs 683987 # Number of read requests accepted +system.physmem.writeReqs 981351 # Number of write requests accepted +system.physmem.readBursts 683987 # Number of DRAM read bursts, including those serviced by the write queue +system.physmem.writeBursts 981351 # Number of DRAM write bursts, including those merged in the write queue +system.physmem.bytesReadDRAM 43730304 # Total number of bytes read from DRAM +system.physmem.bytesReadWrQ 44864 # Total number of bytes read from write queue +system.physmem.bytesWritten 62662336 # Total number of bytes written to DRAM +system.physmem.bytesReadSys 41188284 # Total read bytes from the system interface side +system.physmem.bytesWrittenSys 62662372 # Total written bytes from the system interface side +system.physmem.servicedByWrQ 701 # Number of DRAM read bursts serviced by the write queue +system.physmem.mergedWrBursts 2245 # Number of DRAM write bursts merged with an existing one system.physmem.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write -system.physmem.perBankRdBursts::0 72704 # Per bank write bursts -system.physmem.perBankRdBursts::1 73689 # Per bank write bursts -system.physmem.perBankRdBursts::2 70161 # Per bank write bursts -system.physmem.perBankRdBursts::3 65996 # Per bank write bursts -system.physmem.perBankRdBursts::4 66834 # Per bank write bursts -system.physmem.perBankRdBursts::5 71242 # Per bank write bursts -system.physmem.perBankRdBursts::6 65196 # Per bank write bursts -system.physmem.perBankRdBursts::7 62079 # Per bank write bursts -system.physmem.perBankRdBursts::8 64428 # Per bank write bursts -system.physmem.perBankRdBursts::9 108710 # Per bank write bursts -system.physmem.perBankRdBursts::10 67339 # Per bank write bursts -system.physmem.perBankRdBursts::11 66743 # Per bank write bursts -system.physmem.perBankRdBursts::12 64268 # Per bank write bursts -system.physmem.perBankRdBursts::13 71345 # Per bank write bursts -system.physmem.perBankRdBursts::14 65944 # Per bank write bursts -system.physmem.perBankRdBursts::15 70403 # Per bank write bursts -system.physmem.perBankWrBursts::0 59852 # Per bank write bursts -system.physmem.perBankWrBursts::1 61594 # Per bank write bursts -system.physmem.perBankWrBursts::2 59825 # Per bank write bursts -system.physmem.perBankWrBursts::3 58084 # Per bank write bursts -system.physmem.perBankWrBursts::4 58217 # Per bank write bursts -system.physmem.perBankWrBursts::5 60425 # Per bank write bursts -system.physmem.perBankWrBursts::6 57000 # Per bank write bursts -system.physmem.perBankWrBursts::7 56382 # Per bank write bursts -system.physmem.perBankWrBursts::8 57853 # Per bank write bursts -system.physmem.perBankWrBursts::9 59874 # Per bank write bursts -system.physmem.perBankWrBursts::10 59285 # Per bank write bursts -system.physmem.perBankWrBursts::11 60081 # Per bank write bursts -system.physmem.perBankWrBursts::12 57131 # Per bank write bursts -system.physmem.perBankWrBursts::13 62251 # Per bank write bursts -system.physmem.perBankWrBursts::14 58136 # Per bank write bursts -system.physmem.perBankWrBursts::15 61384 # Per bank write bursts +system.physmem.perBankRdBursts::0 41322 # Per bank write bursts +system.physmem.perBankRdBursts::1 41177 # Per bank write bursts +system.physmem.perBankRdBursts::2 39218 # Per bank write bursts +system.physmem.perBankRdBursts::3 39952 # Per bank write bursts +system.physmem.perBankRdBursts::4 41092 # Per bank write bursts +system.physmem.perBankRdBursts::5 49504 # Per bank write bursts +system.physmem.perBankRdBursts::6 36877 # Per bank write bursts +system.physmem.perBankRdBursts::7 36988 # Per bank write bursts +system.physmem.perBankRdBursts::8 38459 # Per bank write bursts +system.physmem.perBankRdBursts::9 81977 # Per bank write bursts +system.physmem.perBankRdBursts::10 39138 # Per bank write bursts +system.physmem.perBankRdBursts::11 41925 # Per bank write bursts +system.physmem.perBankRdBursts::12 38445 # Per bank write bursts +system.physmem.perBankRdBursts::13 41518 # Per bank write bursts +system.physmem.perBankRdBursts::14 36799 # Per bank write bursts +system.physmem.perBankRdBursts::15 38895 # Per bank write bursts +system.physmem.perBankWrBursts::0 61042 # Per bank write bursts +system.physmem.perBankWrBursts::1 63110 # Per bank write bursts +system.physmem.perBankWrBursts::2 61459 # Per bank write bursts +system.physmem.perBankWrBursts::3 62355 # Per bank write bursts +system.physmem.perBankWrBursts::4 60847 # Per bank write bursts +system.physmem.perBankWrBursts::5 67831 # Per bank write bursts +system.physmem.perBankWrBursts::6 59687 # Per bank write bursts +system.physmem.perBankWrBursts::7 59677 # Per bank write bursts +system.physmem.perBankWrBursts::8 60696 # Per bank write bursts +system.physmem.perBankWrBursts::9 62695 # Per bank write bursts +system.physmem.perBankWrBursts::10 60108 # Per bank write bursts +system.physmem.perBankWrBursts::11 60915 # Per bank write bursts +system.physmem.perBankWrBursts::12 59030 # Per bank write bursts +system.physmem.perBankWrBursts::13 62102 # Per bank write bursts +system.physmem.perBankWrBursts::14 56975 # Per bank write bursts +system.physmem.perBankWrBursts::15 60570 # Per bank write bursts system.physmem.numRdRetry 0 # Number of times read queue was full causing retry -system.physmem.numWrRetry 47 # Number of times write queue was full causing retry -system.physmem.totGap 51771723764500 # Total gap between requests +system.physmem.numWrRetry 35 # Number of times write queue was full causing retry +system.physmem.totGap 51799229214500 # Total gap between requests system.physmem.readPktSize::0 0 # Read request sizes (log2) system.physmem.readPktSize::1 0 # Read request sizes (log2) system.physmem.readPktSize::2 43101 # Read request sizes (log2) system.physmem.readPktSize::3 13 # Read request sizes (log2) system.physmem.readPktSize::4 2 # Read request sizes (log2) system.physmem.readPktSize::5 0 # Read request sizes (log2) -system.physmem.readPktSize::6 1084675 # Read request sizes (log2) +system.physmem.readPktSize::6 640871 # Read request sizes (log2) system.physmem.writePktSize::0 0 # Write request sizes (log2) system.physmem.writePktSize::1 0 # Write request sizes (log2) system.physmem.writePktSize::2 1 # Write request sizes (log2) system.physmem.writePktSize::3 2572 # Write request sizes (log2) system.physmem.writePktSize::4 0 # Write request sizes (log2) system.physmem.writePktSize::5 0 # Write request sizes (log2) -system.physmem.writePktSize::6 947057 # Write request sizes (log2) -system.physmem.rdQLenPdf::0 1101525 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::1 20079 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::2 401 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::3 328 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::4 446 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::5 533 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::6 506 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::7 1087 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::8 624 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::9 265 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::10 323 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::11 167 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::12 159 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::13 114 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::14 122 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::15 103 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::16 94 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::17 89 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::18 68 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::19 48 # What read queue length does an incoming req see +system.physmem.writePktSize::6 978778 # Write request sizes (log2) +system.physmem.rdQLenPdf::0 654776 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::1 22950 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::2 392 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::3 323 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::4 447 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::5 529 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::6 496 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::7 1170 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::8 667 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::9 289 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::10 342 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::11 149 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::12 147 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::13 110 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::14 105 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::15 101 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::16 90 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::17 88 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::18 66 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::19 49 # What read queue length does an incoming req see system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see @@ -165,187 +165,188 @@ system.physmem.rdQLenPdf::28 0 # Wh system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see -system.physmem.wrQLenPdf::0 1567 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::1 1516 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::2 1491 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::3 1477 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::4 1452 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::5 1441 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::6 1422 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::7 1410 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::8 1392 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::9 1376 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::10 1369 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::11 1356 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::12 1334 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::13 1323 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::14 1312 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::15 13771 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::16 18027 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::17 54758 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::18 54058 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::19 55508 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::20 54068 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::21 53991 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::22 55072 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::23 55232 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::24 54714 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::25 55832 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::26 58265 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::27 55672 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::28 55559 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::29 58031 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::30 54737 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::31 53792 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::32 53604 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::33 2557 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::34 827 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::35 727 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::36 552 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::37 468 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::38 458 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::39 425 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::40 332 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::41 365 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::42 264 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::43 267 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::44 310 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::45 303 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::46 257 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::47 308 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::48 190 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::49 276 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::50 316 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::51 191 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::52 258 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::53 172 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::54 202 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::55 150 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::56 171 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::57 227 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::58 136 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::59 140 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::60 127 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::61 210 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::62 116 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::63 143 # What write queue length does an incoming req see -system.physmem.bytesPerActivate::samples 442864 # Bytes accessed per row activation -system.physmem.bytesPerActivate::mean 299.787276 # Bytes accessed per row activation -system.physmem.bytesPerActivate::gmean 172.663870 # Bytes accessed per row activation -system.physmem.bytesPerActivate::stdev 330.837689 # Bytes accessed per row activation -system.physmem.bytesPerActivate::0-127 176801 39.92% 39.92% # Bytes accessed per row activation -system.physmem.bytesPerActivate::128-255 107708 24.32% 64.24% # Bytes accessed per row activation -system.physmem.bytesPerActivate::256-383 38340 8.66% 72.90% # Bytes accessed per row activation -system.physmem.bytesPerActivate::384-511 22096 4.99% 77.89% # Bytes accessed per row activation -system.physmem.bytesPerActivate::512-639 15589 3.52% 81.41% # Bytes accessed per row activation -system.physmem.bytesPerActivate::640-767 11707 2.64% 84.05% # Bytes accessed per row activation -system.physmem.bytesPerActivate::768-895 10190 2.30% 86.35% # Bytes accessed per row activation -system.physmem.bytesPerActivate::896-1023 8599 1.94% 88.30% # Bytes accessed per row activation -system.physmem.bytesPerActivate::1024-1151 51834 11.70% 100.00% # Bytes accessed per row activation -system.physmem.bytesPerActivate::total 442864 # Bytes accessed per row activation -system.physmem.rdPerTurnAround::samples 52780 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::mean 21.354225 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::stdev 295.252681 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::0-2047 52773 99.99% 99.99% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::2048-4095 3 0.01% 99.99% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::6144-8191 2 0.00% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::12288-14335 1 0.00% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::63488-65535 1 0.00% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::total 52780 # Reads before turning the bus around for writes -system.physmem.wrPerTurnAround::samples 52780 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::mean 17.949488 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::gmean 17.151899 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::stdev 8.362849 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::0-3 96 0.18% 0.18% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::4-7 68 0.13% 0.31% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::8-11 65 0.12% 0.43% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::12-15 113 0.21% 0.65% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::16-19 49413 93.62% 94.27% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::20-23 604 1.14% 95.41% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::24-27 382 0.72% 96.14% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::28-31 366 0.69% 96.83% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::32-35 106 0.20% 97.03% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::36-39 120 0.23% 97.26% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::40-43 251 0.48% 97.73% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::44-47 25 0.05% 97.78% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::48-51 347 0.66% 98.44% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::52-55 80 0.15% 98.59% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::56-59 21 0.04% 98.63% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::60-63 55 0.10% 98.73% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::64-67 264 0.50% 99.23% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::68-71 29 0.05% 99.29% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::72-75 20 0.04% 99.33% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::76-79 122 0.23% 99.56% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::80-83 176 0.33% 99.89% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::84-87 2 0.00% 99.90% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::88-91 4 0.01% 99.90% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::96-99 3 0.01% 99.91% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::100-103 1 0.00% 99.91% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::108-111 2 0.00% 99.91% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::112-115 3 0.01% 99.92% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::120-123 1 0.00% 99.92% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::124-127 2 0.00% 99.93% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::128-131 10 0.02% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::132-135 1 0.00% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::136-139 1 0.00% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::140-143 2 0.00% 99.95% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::144-147 11 0.02% 99.97% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::148-151 1 0.00% 99.98% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::156-159 2 0.00% 99.98% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::160-163 4 0.01% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::172-175 1 0.00% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::176-179 5 0.01% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::188-191 1 0.00% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::total 52780 # Writes before turning the bus around for reads -system.physmem.totQLat 13931485499 # Total ticks spent queuing -system.physmem.totMemAccLat 35064254249 # Total ticks spent from burst creation until serviced by the DRAM -system.physmem.totBusLat 5635405000 # Total ticks spent in databus transfers -system.physmem.avgQLat 12360.68 # Average queueing delay per DRAM burst +system.physmem.wrQLenPdf::0 1596 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::1 1526 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::2 1505 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::3 1480 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::4 1461 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::5 1451 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::6 1436 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::7 1423 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::8 1403 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::9 1385 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::10 1368 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::11 1354 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::12 1352 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::13 1337 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::14 1326 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::15 31896 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::16 37595 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::17 53715 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::18 53386 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::19 56244 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::20 54082 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::21 56988 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::22 54298 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::23 54807 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::24 54383 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::25 55346 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::26 57492 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::27 55406 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::28 55164 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::29 56641 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::30 53923 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::31 52610 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::32 52233 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::33 2219 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::34 884 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::35 692 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::36 529 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::37 505 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::38 476 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::39 464 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::40 357 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::41 370 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::42 327 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::43 341 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::44 357 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::45 390 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::46 249 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::47 283 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::48 272 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::49 263 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::50 294 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::51 249 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::52 276 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::53 183 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::54 195 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::55 132 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::56 181 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::57 204 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::58 131 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::59 144 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::60 178 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::61 188 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::62 72 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::63 89 # What write queue length does an incoming req see +system.physmem.bytesPerActivate::samples 437346 # Bytes accessed per row activation +system.physmem.bytesPerActivate::mean 243.268076 # Bytes accessed per row activation +system.physmem.bytesPerActivate::gmean 146.507272 # Bytes accessed per row activation +system.physmem.bytesPerActivate::stdev 286.058540 # Bytes accessed per row activation +system.physmem.bytesPerActivate::0-127 195461 44.69% 44.69% # Bytes accessed per row activation +system.physmem.bytesPerActivate::128-255 115696 26.45% 71.15% # Bytes accessed per row activation +system.physmem.bytesPerActivate::256-383 38501 8.80% 79.95% # Bytes accessed per row activation +system.physmem.bytesPerActivate::384-511 20148 4.61% 84.56% # Bytes accessed per row activation +system.physmem.bytesPerActivate::512-639 13086 2.99% 87.55% # Bytes accessed per row activation +system.physmem.bytesPerActivate::640-767 8742 2.00% 89.55% # Bytes accessed per row activation +system.physmem.bytesPerActivate::768-895 7314 1.67% 91.22% # Bytes accessed per row activation +system.physmem.bytesPerActivate::896-1023 5744 1.31% 92.53% # Bytes accessed per row activation +system.physmem.bytesPerActivate::1024-1151 32654 7.47% 100.00% # Bytes accessed per row activation +system.physmem.bytesPerActivate::total 437346 # Bytes accessed per row activation +system.physmem.rdPerTurnAround::samples 51642 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::mean 13.230801 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::stdev 107.035752 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::0-1023 51638 99.99% 99.99% # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::6144-7167 1 0.00% 99.99% # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::7168-8191 1 0.00% 100.00% # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::12288-13311 1 0.00% 100.00% # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::17408-18431 1 0.00% 100.00% # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::total 51642 # Reads before turning the bus around for writes +system.physmem.wrPerTurnAround::samples 51642 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::mean 18.959355 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::gmean 18.129785 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::stdev 8.514310 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::0-3 120 0.23% 0.23% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::4-7 58 0.11% 0.34% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::8-11 71 0.14% 0.48% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::12-15 110 0.21% 0.70% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::16-19 46610 90.26% 90.95% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::20-23 2201 4.26% 95.21% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::24-27 409 0.79% 96.01% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::28-31 381 0.74% 96.74% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::32-35 125 0.24% 96.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::36-39 97 0.19% 97.17% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::40-43 249 0.48% 97.66% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::44-47 37 0.07% 97.73% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::48-51 313 0.61% 98.33% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::52-55 78 0.15% 98.48% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::56-59 24 0.05% 98.53% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::60-63 64 0.12% 98.65% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::64-67 317 0.61% 99.27% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::68-71 20 0.04% 99.31% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::72-75 23 0.04% 99.35% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::76-79 120 0.23% 99.58% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::80-83 150 0.29% 99.87% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::84-87 1 0.00% 99.88% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::88-91 1 0.00% 99.88% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::92-95 1 0.00% 99.88% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::96-99 1 0.00% 99.88% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::100-103 3 0.01% 99.89% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::104-107 3 0.01% 99.89% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::108-111 3 0.01% 99.90% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::112-115 2 0.00% 99.90% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::124-127 1 0.00% 99.91% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::128-131 12 0.02% 99.93% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::132-135 3 0.01% 99.93% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::136-139 2 0.00% 99.94% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::140-143 4 0.01% 99.95% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::144-147 17 0.03% 99.98% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::156-159 1 0.00% 99.98% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::160-163 3 0.01% 99.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::168-171 1 0.00% 99.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::176-179 4 0.01% 100.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::196-199 1 0.00% 100.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::252-255 1 0.00% 100.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::total 51642 # Writes before turning the bus around for reads +system.physmem.totQLat 9080957107 # Total ticks spent queuing +system.physmem.totMemAccLat 21892569607 # Total ticks spent from burst creation until serviced by the DRAM +system.physmem.totBusLat 3416430000 # Total ticks spent in databus transfers +system.physmem.avgQLat 13290.13 # Average queueing delay per DRAM burst system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst -system.physmem.avgMemAccLat 31110.68 # Average memory access latency per DRAM burst -system.physmem.avgRdBW 1.39 # Average DRAM read bandwidth in MiByte/s -system.physmem.avgWrBW 1.17 # Average achieved write bandwidth in MiByte/s -system.physmem.avgRdBWSys 1.34 # Average system read bandwidth in MiByte/s -system.physmem.avgWrBWSys 1.17 # Average system write bandwidth in MiByte/s +system.physmem.avgMemAccLat 32040.13 # Average memory access latency per DRAM burst +system.physmem.avgRdBW 0.84 # Average DRAM read bandwidth in MiByte/s +system.physmem.avgWrBW 1.21 # Average achieved write bandwidth in MiByte/s +system.physmem.avgRdBWSys 0.80 # Average system read bandwidth in MiByte/s +system.physmem.avgWrBWSys 1.21 # Average system write bandwidth in MiByte/s system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s system.physmem.busUtil 0.02 # Data bus utilization in percentage system.physmem.busUtilRead 0.01 # Data bus utilization in percentage for reads system.physmem.busUtilWrite 0.01 # Data bus utilization in percentage for writes system.physmem.avgRdQLen 1.00 # Average read queue length when enqueuing -system.physmem.avgWrQLen 9.40 # Average write queue length when enqueuing -system.physmem.readRowHits 910554 # Number of row buffer hits during reads -system.physmem.writeRowHits 721036 # Number of row buffer hits during writes -system.physmem.readRowHitRate 80.79 # Row buffer hit rate for reads -system.physmem.writeRowHitRate 76.11 # Row buffer hit rate for writes -system.physmem.avgGap 24921151.64 # Average gap between requests -system.physmem.pageHitRate 78.65 # Row buffer hit rate, read and write combined -system.physmem_0.actEnergy 1716089760 # Energy for activate commands per rank (pJ) -system.physmem_0.preEnergy 936358500 # Energy for precharge commands per rank (pJ) -system.physmem_0.readEnergy 4273627800 # Energy for read commands per rank (pJ) -system.physmem_0.writeEnergy 3054535920 # Energy for write commands per rank (pJ) -system.physmem_0.refreshEnergy 3381477484320 # Energy for refresh commands per rank (pJ) -system.physmem_0.actBackEnergy 1299156215670 # Energy for active background per rank (pJ) -system.physmem_0.preBackEnergy 29923425135750 # Energy for precharge background per rank (pJ) -system.physmem_0.totalEnergy 34614039447720 # Total energy per rank (pJ) -system.physmem_0.averagePower 668.589631 # Core power per rank (mW) -system.physmem_0.memoryStateTime::IDLE 49779697907279 # Time in different power states -system.physmem_0.memoryStateTime::REF 1728771720000 # Time in different power states +system.physmem.avgWrQLen 11.30 # Average write queue length when enqueuing +system.physmem.readRowHits 503634 # Number of row buffer hits during reads +system.physmem.writeRowHits 721404 # Number of row buffer hits during writes +system.physmem.readRowHitRate 73.71 # Row buffer hit rate for reads +system.physmem.writeRowHitRate 73.68 # Row buffer hit rate for writes +system.physmem.avgGap 31104333.90 # Average gap between requests +system.physmem.pageHitRate 73.69 # Row buffer hit rate, read and write combined +system.physmem_0.actEnergy 1696456440 # Energy for activate commands per rank (pJ) +system.physmem_0.preEnergy 925645875 # Energy for precharge commands per rank (pJ) +system.physmem_0.readEnergy 2543814000 # Energy for read commands per rank (pJ) +system.physmem_0.writeEnergy 3214131840 # Energy for write commands per rank (pJ) +system.physmem_0.refreshEnergy 3383273718240 # Energy for refresh commands per rank (pJ) +system.physmem_0.actBackEnergy 1286151175755 # Energy for active background per rank (pJ) +system.physmem_0.preBackEnergy 29951333686500 # Energy for precharge background per rank (pJ) +system.physmem_0.totalEnergy 34629138628650 # Total energy per rank (pJ) +system.physmem_0.averagePower 668.526160 # Core power per rank (mW) +system.physmem_0.memoryStateTime::IDLE 49826371298908 # Time in different power states +system.physmem_0.memoryStateTime::REF 1729690040000 # Time in different power states system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem_0.memoryStateTime::ACT 263256805221 # Time in different power states +system.physmem_0.memoryStateTime::ACT 243166128592 # Time in different power states system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states -system.physmem_1.actEnergy 1631962080 # Energy for activate commands per rank (pJ) -system.physmem_1.preEnergy 890455500 # Energy for precharge commands per rank (pJ) -system.physmem_1.readEnergy 4517588400 # Energy for read commands per rank (pJ) -system.physmem_1.writeEnergy 3084447600 # Energy for write commands per rank (pJ) -system.physmem_1.refreshEnergy 3381477484320 # Energy for refresh commands per rank (pJ) -system.physmem_1.actBackEnergy 1291204023120 # Energy for active background per rank (pJ) -system.physmem_1.preBackEnergy 29930400751500 # Energy for precharge background per rank (pJ) -system.physmem_1.totalEnergy 34613206712520 # Total energy per rank (pJ) -system.physmem_1.averagePower 668.573546 # Core power per rank (mW) -system.physmem_1.memoryStateTime::IDLE 49791314720420 # Time in different power states -system.physmem_1.memoryStateTime::REF 1728771720000 # Time in different power states +system.physmem_1.actEnergy 1609879320 # Energy for activate commands per rank (pJ) +system.physmem_1.preEnergy 878406375 # Energy for precharge commands per rank (pJ) +system.physmem_1.readEnergy 2785777800 # Energy for read commands per rank (pJ) +system.physmem_1.writeEnergy 3130429680 # Energy for write commands per rank (pJ) +system.physmem_1.refreshEnergy 3383273718240 # Energy for refresh commands per rank (pJ) +system.physmem_1.actBackEnergy 1282982007105 # Energy for active background per rank (pJ) +system.physmem_1.preBackEnergy 29954113659000 # Energy for precharge background per rank (pJ) +system.physmem_1.totalEnergy 34628773877520 # Total energy per rank (pJ) +system.physmem_1.averagePower 668.519119 # Core power per rank (mW) +system.physmem_1.memoryStateTime::IDLE 49831003018963 # Time in different power states +system.physmem_1.memoryStateTime::REF 1729690040000 # Time in different power states system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem_1.memoryStateTime::ACT 251640005830 # Time in different power states +system.physmem_1.memoryStateTime::ACT 238538435537 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states system.realview.nvmem.bytes_read::cpu0.inst 96 # Number of bytes read from this memory system.realview.nvmem.bytes_read::cpu0.data 36 # Number of bytes read from this memory @@ -399,69 +400,70 @@ system.cpu0.dstage2_mmu.stage2_tlb.inst_accesses 0 system.cpu0.dstage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu0.dstage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu0.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu0.dtb.walker.walks 115485 # Table walker walks requested -system.cpu0.dtb.walker.walksLong 115485 # Table walker walks initiated with long descriptors -system.cpu0.dtb.walker.walksLongTerminationLevel::Level2 17906 # Level at which table walker walks with long descriptors terminate -system.cpu0.dtb.walker.walksLongTerminationLevel::Level3 83637 # Level at which table walker walks with long descriptors terminate -system.cpu0.dtb.walker.walksSquashedBefore 11 # Table walks squashed before starting -system.cpu0.dtb.walker.walkWaitTime::samples 115474 # Table walker wait (enqueue to first request) latency -system.cpu0.dtb.walker.walkWaitTime::mean 0.346398 # Table walker wait (enqueue to first request) latency -system.cpu0.dtb.walker.walkWaitTime::stdev 89.645919 # Table walker wait (enqueue to first request) latency -system.cpu0.dtb.walker.walkWaitTime::0-2047 115472 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu0.dtb.walker.walkWaitTime::10240-12287 1 0.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu0.dtb.walker.walks 118484 # Table walker walks requested +system.cpu0.dtb.walker.walksLong 118484 # Table walker walks initiated with long descriptors +system.cpu0.dtb.walker.walksLongTerminationLevel::Level2 17724 # Level at which table walker walks with long descriptors terminate +system.cpu0.dtb.walker.walksLongTerminationLevel::Level3 86321 # Level at which table walker walks with long descriptors terminate +system.cpu0.dtb.walker.walksSquashedBefore 9 # Table walks squashed before starting +system.cpu0.dtb.walker.walkWaitTime::samples 118475 # Table walker wait (enqueue to first request) latency +system.cpu0.dtb.walker.walkWaitTime::mean 0.236337 # Table walker wait (enqueue to first request) latency +system.cpu0.dtb.walker.walkWaitTime::stdev 81.347587 # Table walker wait (enqueue to first request) latency +system.cpu0.dtb.walker.walkWaitTime::0-2047 118474 100.00% 100.00% # Table walker wait (enqueue to first request) latency system.cpu0.dtb.walker.walkWaitTime::26624-28671 1 0.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu0.dtb.walker.walkWaitTime::total 115474 # Table walker wait (enqueue to first request) latency -system.cpu0.dtb.walker.walkCompletionTime::samples 101554 # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::mean 25029.885578 # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::gmean 21753.655577 # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::stdev 15864.720522 # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::0-65535 100973 99.43% 99.43% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::65536-131071 8 0.01% 99.44% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::131072-196607 501 0.49% 99.93% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::196608-262143 8 0.01% 99.94% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::262144-327679 30 0.03% 99.97% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::327680-393215 9 0.01% 99.98% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::393216-458751 21 0.02% 100.00% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::458752-524287 3 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkWaitTime::total 118475 # Table walker wait (enqueue to first request) latency +system.cpu0.dtb.walker.walkCompletionTime::samples 104054 # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::mean 25330.679263 # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::gmean 21934.679716 # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::stdev 16178.136591 # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::0-65535 103422 99.39% 99.39% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::65536-131071 1 0.00% 99.39% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::131072-196607 549 0.53% 99.92% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::196608-262143 13 0.01% 99.93% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::262144-327679 39 0.04% 99.97% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::327680-393215 8 0.01% 99.98% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::393216-458751 17 0.02% 100.00% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::458752-524287 2 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::524288-589823 1 0.00% 100.00% # Table walker service (enqueue to completion) latency system.cpu0.dtb.walker.walkCompletionTime::589824-655359 1 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walkCompletionTime::total 101554 # Table walker service (enqueue to completion) latency -system.cpu0.dtb.walker.walksPending::samples -3996350676 # Table walker pending requests distribution -system.cpu0.dtb.walker.walksPending::mean 1.438404 # Table walker pending requests distribution +system.cpu0.dtb.walker.walkCompletionTime::655360-720895 1 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walkCompletionTime::total 104054 # Table walker service (enqueue to completion) latency +system.cpu0.dtb.walker.walksPending::samples -2515798788 # Table walker pending requests distribution +system.cpu0.dtb.walker.walksPending::mean 1.690729 # Table walker pending requests distribution system.cpu0.dtb.walker.walksPending::gmean inf # Table walker pending requests distribution -system.cpu0.dtb.walker.walksPending::0 1752015204 -43.84% -43.84% # Table walker pending requests distribution -system.cpu0.dtb.walker.walksPending::1 -5748365880 143.84% 100.00% # Table walker pending requests distribution -system.cpu0.dtb.walker.walksPending::total -3996350676 # Table walker pending requests distribution -system.cpu0.dtb.walker.walkPageSizes::4K 83637 82.37% 82.37% # Table walker page sizes translated -system.cpu0.dtb.walker.walkPageSizes::2M 17906 17.63% 100.00% # Table walker page sizes translated -system.cpu0.dtb.walker.walkPageSizes::total 101543 # Table walker page sizes translated -system.cpu0.dtb.walker.walkRequestOrigin_Requested::Data 115485 # Table walker requests started/completed, data/inst +system.cpu0.dtb.walker.walksPending::0 1737735704 -69.07% -69.07% # Table walker pending requests distribution +system.cpu0.dtb.walker.walksPending::1 -4253534492 169.07% 100.00% # Table walker pending requests distribution +system.cpu0.dtb.walker.walksPending::total -2515798788 # Table walker pending requests distribution +system.cpu0.dtb.walker.walkPageSizes::4K 86322 82.97% 82.97% # Table walker page sizes translated +system.cpu0.dtb.walker.walkPageSizes::2M 17724 17.03% 100.00% # Table walker page sizes translated +system.cpu0.dtb.walker.walkPageSizes::total 104046 # Table walker page sizes translated +system.cpu0.dtb.walker.walkRequestOrigin_Requested::Data 118484 # Table walker requests started/completed, data/inst system.cpu0.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst -system.cpu0.dtb.walker.walkRequestOrigin_Requested::total 115485 # Table walker requests started/completed, data/inst -system.cpu0.dtb.walker.walkRequestOrigin_Completed::Data 101543 # Table walker requests started/completed, data/inst +system.cpu0.dtb.walker.walkRequestOrigin_Requested::total 118484 # Table walker requests started/completed, data/inst +system.cpu0.dtb.walker.walkRequestOrigin_Completed::Data 104046 # Table walker requests started/completed, data/inst system.cpu0.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst -system.cpu0.dtb.walker.walkRequestOrigin_Completed::total 101543 # Table walker requests started/completed, data/inst -system.cpu0.dtb.walker.walkRequestOrigin::total 217028 # Table walker requests started/completed, data/inst +system.cpu0.dtb.walker.walkRequestOrigin_Completed::total 104046 # Table walker requests started/completed, data/inst +system.cpu0.dtb.walker.walkRequestOrigin::total 222530 # Table walker requests started/completed, data/inst system.cpu0.dtb.inst_hits 0 # ITB inst hits system.cpu0.dtb.inst_misses 0 # ITB inst misses -system.cpu0.dtb.read_hits 77968786 # DTB read hits -system.cpu0.dtb.read_misses 88587 # DTB read misses -system.cpu0.dtb.write_hits 70658355 # DTB write hits -system.cpu0.dtb.write_misses 26898 # DTB write misses -system.cpu0.dtb.flush_tlb 51778 # Number of times complete TLB was flushed +system.cpu0.dtb.read_hits 78608030 # DTB read hits +system.cpu0.dtb.read_misses 90806 # DTB read misses +system.cpu0.dtb.write_hits 71283429 # DTB write hits +system.cpu0.dtb.write_misses 27678 # DTB write misses +system.cpu0.dtb.flush_tlb 51806 # Number of times complete TLB was flushed system.cpu0.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu0.dtb.flush_tlb_mva_asid 18574 # Number of times TLB was flushed by MVA & ASID -system.cpu0.dtb.flush_tlb_asid 509 # Number of times TLB was flushed by ASID -system.cpu0.dtb.flush_entries 67879 # Number of entries that have been flushed from TLB +system.cpu0.dtb.flush_tlb_mva_asid 19521 # Number of times TLB was flushed by MVA & ASID +system.cpu0.dtb.flush_tlb_asid 503 # Number of times TLB was flushed by ASID +system.cpu0.dtb.flush_entries 69055 # Number of entries that have been flushed from TLB system.cpu0.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions -system.cpu0.dtb.prefetch_faults 4111 # Number of TLB faults due to prefetch +system.cpu0.dtb.prefetch_faults 4281 # Number of TLB faults due to prefetch system.cpu0.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu0.dtb.perms_faults 9218 # Number of TLB faults due to permissions restrictions -system.cpu0.dtb.read_accesses 78057373 # DTB read accesses -system.cpu0.dtb.write_accesses 70685253 # DTB write accesses +system.cpu0.dtb.perms_faults 9631 # Number of TLB faults due to permissions restrictions +system.cpu0.dtb.read_accesses 78698836 # DTB read accesses +system.cpu0.dtb.write_accesses 71311107 # DTB write accesses system.cpu0.dtb.inst_accesses 0 # ITB inst accesses -system.cpu0.dtb.hits 148627141 # DTB hits -system.cpu0.dtb.misses 115485 # DTB misses -system.cpu0.dtb.accesses 148742626 # DTB accesses +system.cpu0.dtb.hits 149891459 # DTB hits +system.cpu0.dtb.misses 118484 # DTB misses +system.cpu0.dtb.accesses 150009943 # DTB accesses system.cpu0.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu0.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu0.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -491,281 +493,280 @@ system.cpu0.istage2_mmu.stage2_tlb.inst_accesses 0 system.cpu0.istage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu0.istage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu0.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu0.itb.walker.walks 74042 # Table walker walks requested -system.cpu0.itb.walker.walksLong 74042 # Table walker walks initiated with long descriptors -system.cpu0.itb.walker.walksLongTerminationLevel::Level2 4198 # Level at which table walker walks with long descriptors terminate -system.cpu0.itb.walker.walksLongTerminationLevel::Level3 64736 # Level at which table walker walks with long descriptors terminate -system.cpu0.itb.walker.walkWaitTime::samples 74042 # Table walker wait (enqueue to first request) latency -system.cpu0.itb.walker.walkWaitTime::0 74042 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu0.itb.walker.walkWaitTime::total 74042 # Table walker wait (enqueue to first request) latency -system.cpu0.itb.walker.walkCompletionTime::samples 68934 # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::mean 28581.273392 # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::gmean 25349.599489 # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::stdev 19061.356835 # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::0-65535 68231 98.98% 98.98% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::65536-131071 3 0.00% 98.98% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::131072-196607 610 0.88% 99.87% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::196608-262143 10 0.01% 99.88% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::262144-327679 35 0.05% 99.93% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::327680-393215 20 0.03% 99.96% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walks 76645 # Table walker walks requested +system.cpu0.itb.walker.walksLong 76645 # Table walker walks initiated with long descriptors +system.cpu0.itb.walker.walksLongTerminationLevel::Level2 4248 # Level at which table walker walks with long descriptors terminate +system.cpu0.itb.walker.walksLongTerminationLevel::Level3 67077 # Level at which table walker walks with long descriptors terminate +system.cpu0.itb.walker.walkWaitTime::samples 76645 # Table walker wait (enqueue to first request) latency +system.cpu0.itb.walker.walkWaitTime::0 76645 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu0.itb.walker.walkWaitTime::total 76645 # Table walker wait (enqueue to first request) latency +system.cpu0.itb.walker.walkCompletionTime::samples 71325 # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::mean 28947.290571 # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::gmean 25637.754479 # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::stdev 19237.260354 # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::0-65535 70555 98.92% 98.92% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::65536-131071 2 0.00% 98.92% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::131072-196607 668 0.94% 99.86% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::196608-262143 18 0.03% 99.89% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::262144-327679 42 0.06% 99.94% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::327680-393215 15 0.02% 99.96% # Table walker service (enqueue to completion) latency system.cpu0.itb.walker.walkCompletionTime::393216-458751 21 0.03% 99.99% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::458752-524287 1 0.00% 100.00% # Table walker service (enqueue to completion) latency system.cpu0.itb.walker.walkCompletionTime::524288-589823 2 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::589824-655359 1 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu0.itb.walker.walkCompletionTime::total 68934 # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::589824-655359 2 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu0.itb.walker.walkCompletionTime::total 71325 # Table walker service (enqueue to completion) latency system.cpu0.itb.walker.walksPending::samples 1705681704 # Table walker pending requests distribution system.cpu0.itb.walker.walksPending::0 1705681704 100.00% 100.00% # Table walker pending requests distribution system.cpu0.itb.walker.walksPending::total 1705681704 # Table walker pending requests distribution -system.cpu0.itb.walker.walkPageSizes::4K 64736 93.91% 93.91% # Table walker page sizes translated -system.cpu0.itb.walker.walkPageSizes::2M 4198 6.09% 100.00% # Table walker page sizes translated -system.cpu0.itb.walker.walkPageSizes::total 68934 # Table walker page sizes translated +system.cpu0.itb.walker.walkPageSizes::4K 67077 94.04% 94.04% # Table walker page sizes translated +system.cpu0.itb.walker.walkPageSizes::2M 4248 5.96% 100.00% # Table walker page sizes translated +system.cpu0.itb.walker.walkPageSizes::total 71325 # Table walker page sizes translated system.cpu0.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst -system.cpu0.itb.walker.walkRequestOrigin_Requested::Inst 74042 # Table walker requests started/completed, data/inst -system.cpu0.itb.walker.walkRequestOrigin_Requested::total 74042 # Table walker requests started/completed, data/inst +system.cpu0.itb.walker.walkRequestOrigin_Requested::Inst 76645 # Table walker requests started/completed, data/inst +system.cpu0.itb.walker.walkRequestOrigin_Requested::total 76645 # Table walker requests started/completed, data/inst system.cpu0.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst -system.cpu0.itb.walker.walkRequestOrigin_Completed::Inst 68934 # Table walker requests started/completed, data/inst -system.cpu0.itb.walker.walkRequestOrigin_Completed::total 68934 # Table walker requests started/completed, data/inst -system.cpu0.itb.walker.walkRequestOrigin::total 142976 # Table walker requests started/completed, data/inst -system.cpu0.itb.inst_hits 413989239 # ITB inst hits -system.cpu0.itb.inst_misses 74042 # ITB inst misses +system.cpu0.itb.walker.walkRequestOrigin_Completed::Inst 71325 # Table walker requests started/completed, data/inst +system.cpu0.itb.walker.walkRequestOrigin_Completed::total 71325 # Table walker requests started/completed, data/inst +system.cpu0.itb.walker.walkRequestOrigin::total 147970 # Table walker requests started/completed, data/inst +system.cpu0.itb.inst_hits 417906874 # ITB inst hits +system.cpu0.itb.inst_misses 76645 # ITB inst misses system.cpu0.itb.read_hits 0 # DTB read hits system.cpu0.itb.read_misses 0 # DTB read misses system.cpu0.itb.write_hits 0 # DTB write hits system.cpu0.itb.write_misses 0 # DTB write misses -system.cpu0.itb.flush_tlb 51778 # Number of times complete TLB was flushed +system.cpu0.itb.flush_tlb 51806 # Number of times complete TLB was flushed system.cpu0.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu0.itb.flush_tlb_mva_asid 18574 # Number of times TLB was flushed by MVA & ASID -system.cpu0.itb.flush_tlb_asid 509 # Number of times TLB was flushed by ASID -system.cpu0.itb.flush_entries 49997 # Number of entries that have been flushed from TLB +system.cpu0.itb.flush_tlb_mva_asid 19521 # Number of times TLB was flushed by MVA & ASID +system.cpu0.itb.flush_tlb_asid 503 # Number of times TLB was flushed by ASID +system.cpu0.itb.flush_entries 51690 # Number of entries that have been flushed from TLB system.cpu0.itb.align_faults 0 # Number of TLB faults due to alignment restrictions system.cpu0.itb.prefetch_faults 0 # Number of TLB faults due to prefetch system.cpu0.itb.domain_faults 0 # Number of TLB faults due to domain restrictions system.cpu0.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions system.cpu0.itb.read_accesses 0 # DTB read accesses system.cpu0.itb.write_accesses 0 # DTB write accesses -system.cpu0.itb.inst_accesses 414063281 # ITB inst accesses -system.cpu0.itb.hits 413989239 # DTB hits -system.cpu0.itb.misses 74042 # DTB misses -system.cpu0.itb.accesses 414063281 # DTB accesses -system.cpu0.numCycles 51772399583 # number of cpu cycles simulated +system.cpu0.itb.inst_accesses 417983519 # ITB inst accesses +system.cpu0.itb.hits 417906874 # DTB hits +system.cpu0.itb.misses 76645 # DTB misses +system.cpu0.itb.accesses 417983519 # DTB accesses +system.cpu0.numCycles 51800067955 # number of cpu cycles simulated system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu0.kern.inst.arm 0 # number of arm instructions executed -system.cpu0.kern.inst.quiesce 15959 # number of quiesce instructions executed -system.cpu0.committedInsts 413737178 # Number of instructions committed -system.cpu0.committedOps 486128458 # Number of ops (including micro ops) committed -system.cpu0.num_int_alu_accesses 446921205 # Number of integer alu accesses -system.cpu0.num_fp_alu_accesses 447031 # Number of float alu accesses -system.cpu0.num_func_calls 24805806 # number of times a function call or return occured -system.cpu0.num_conditional_control_insts 62762528 # number of instructions that are conditional controls -system.cpu0.num_int_insts 446921205 # number of integer instructions -system.cpu0.num_fp_insts 447031 # number of float instructions -system.cpu0.num_int_register_reads 646154735 # number of times the integer registers were read -system.cpu0.num_int_register_writes 354190798 # number of times the integer registers were written -system.cpu0.num_fp_register_reads 724381 # number of times the floating registers were read -system.cpu0.num_fp_register_writes 372700 # number of times the floating registers were written -system.cpu0.num_cc_register_reads 107222136 # number of times the CC registers were read -system.cpu0.num_cc_register_writes 106914913 # number of times the CC registers were written -system.cpu0.num_mem_refs 148617421 # number of memory refs -system.cpu0.num_load_insts 77964333 # Number of load instructions -system.cpu0.num_store_insts 70653088 # Number of store instructions -system.cpu0.num_idle_cycles 50228896973.724121 # Number of idle cycles -system.cpu0.num_busy_cycles 1543502609.275879 # Number of busy cycles -system.cpu0.not_idle_fraction 0.029813 # Percentage of non-idle cycles -system.cpu0.idle_fraction 0.970187 # Percentage of idle cycles -system.cpu0.Branches 92293251 # Number of branches fetched -system.cpu0.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction -system.cpu0.op_class::IntAlu 336607156 69.20% 69.20% # Class of executed instruction -system.cpu0.op_class::IntMult 1073484 0.22% 69.42% # Class of executed instruction -system.cpu0.op_class::IntDiv 49277 0.01% 69.43% # Class of executed instruction -system.cpu0.op_class::FloatAdd 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::FloatCmp 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::FloatCvt 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::FloatMult 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::FloatDiv 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::FloatSqrt 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdAdd 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdAddAcc 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdAlu 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdCmp 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdCvt 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdMisc 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdMult 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdMultAcc 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdShift 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdShiftAcc 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdSqrt 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdFloatAdd 8 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdFloatAlu 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdFloatCmp 13 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdFloatCvt 20 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdFloatDiv 0 0.00% 69.43% # Class of executed instruction -system.cpu0.op_class::SimdFloatMisc 55202 0.01% 69.45% # Class of executed instruction -system.cpu0.op_class::SimdFloatMult 0 0.00% 69.45% # Class of executed instruction -system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 69.45% # Class of executed instruction -system.cpu0.op_class::SimdFloatSqrt 0 0.00% 69.45% # Class of executed instruction -system.cpu0.op_class::MemRead 77964333 16.03% 85.47% # Class of executed instruction -system.cpu0.op_class::MemWrite 70653088 14.53% 100.00% # Class of executed instruction +system.cpu0.kern.inst.quiesce 16018 # number of quiesce instructions executed +system.cpu0.committedInsts 417645333 # Number of instructions committed +system.cpu0.committedOps 490761503 # Number of ops (including micro ops) committed +system.cpu0.num_int_alu_accesses 451046619 # Number of integer alu accesses +system.cpu0.num_fp_alu_accesses 435772 # Number of float alu accesses +system.cpu0.num_func_calls 25047272 # number of times a function call or return occured +system.cpu0.num_conditional_control_insts 63386661 # number of instructions that are conditional controls +system.cpu0.num_int_insts 451046619 # number of integer instructions +system.cpu0.num_fp_insts 435772 # number of float instructions +system.cpu0.num_int_register_reads 653989680 # number of times the integer registers were read +system.cpu0.num_int_register_writes 357583746 # number of times the integer registers were written +system.cpu0.num_fp_register_reads 703407 # number of times the floating registers were read +system.cpu0.num_fp_register_writes 366712 # number of times the floating registers were written +system.cpu0.num_cc_register_reads 108509856 # number of times the CC registers were read +system.cpu0.num_cc_register_writes 108205607 # number of times the CC registers were written +system.cpu0.num_mem_refs 149883436 # number of memory refs +system.cpu0.num_load_insts 78604497 # Number of load instructions +system.cpu0.num_store_insts 71278939 # Number of store instructions +system.cpu0.num_idle_cycles 50264779959.264511 # Number of idle cycles +system.cpu0.num_busy_cycles 1535287995.735491 # Number of busy cycles +system.cpu0.not_idle_fraction 0.029639 # Percentage of non-idle cycles +system.cpu0.idle_fraction 0.970361 # Percentage of idle cycles +system.cpu0.Branches 93191056 # Number of branches fetched +system.cpu0.op_class::No_OpClass 1 0.00% 0.00% # Class of executed instruction +system.cpu0.op_class::IntAlu 339970284 69.23% 69.23% # Class of executed instruction +system.cpu0.op_class::IntMult 1088528 0.22% 69.46% # Class of executed instruction +system.cpu0.op_class::IntDiv 48838 0.01% 69.47% # Class of executed instruction +system.cpu0.op_class::FloatAdd 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::FloatCmp 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::FloatCvt 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::FloatMult 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::FloatDiv 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::FloatSqrt 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdAdd 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdAddAcc 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdAlu 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdCmp 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdCvt 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdMisc 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdMult 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdMultAcc 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdShift 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdShiftAcc 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdSqrt 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdFloatAdd 4 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdFloatAlu 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdFloatCmp 11 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdFloatCvt 16 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdFloatDiv 0 0.00% 69.47% # Class of executed instruction +system.cpu0.op_class::SimdFloatMisc 53987 0.01% 69.48% # Class of executed instruction +system.cpu0.op_class::SimdFloatMult 0 0.00% 69.48% # Class of executed instruction +system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 69.48% # Class of executed instruction +system.cpu0.op_class::SimdFloatSqrt 0 0.00% 69.48% # Class of executed instruction +system.cpu0.op_class::MemRead 78604497 16.01% 85.48% # Class of executed instruction +system.cpu0.op_class::MemWrite 71278939 14.52% 100.00% # Class of executed instruction system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu0.op_class::total 486402581 # Class of executed instruction -system.cpu0.dcache.tags.replacements 9229396 # number of replacements -system.cpu0.dcache.tags.tagsinuse 511.942744 # Cycle average of tags in use -system.cpu0.dcache.tags.total_refs 287404842 # Total number of references to valid blocks. -system.cpu0.dcache.tags.sampled_refs 9229908 # Sample count of references to valid blocks. -system.cpu0.dcache.tags.avg_refs 31.138430 # Average number of references to valid blocks. +system.cpu0.op_class::total 491045105 # Class of executed instruction +system.cpu0.dcache.tags.replacements 9348690 # number of replacements +system.cpu0.dcache.tags.tagsinuse 511.942765 # Cycle average of tags in use +system.cpu0.dcache.tags.total_refs 290545917 # Total number of references to valid blocks. +system.cpu0.dcache.tags.sampled_refs 9349202 # Sample count of references to valid blocks. +system.cpu0.dcache.tags.avg_refs 31.077082 # Average number of references to valid blocks. system.cpu0.dcache.tags.warmup_cycle 5830459500 # Cycle when the warmup percentage was hit. -system.cpu0.dcache.tags.occ_blocks::cpu0.data 300.933674 # Average occupied blocks per requestor -system.cpu0.dcache.tags.occ_blocks::cpu1.data 211.009070 # Average occupied blocks per requestor -system.cpu0.dcache.tags.occ_percent::cpu0.data 0.587761 # Average percentage of cache occupancy -system.cpu0.dcache.tags.occ_percent::cpu1.data 0.412127 # Average percentage of cache occupancy +system.cpu0.dcache.tags.occ_blocks::cpu0.data 239.060392 # Average occupied blocks per requestor +system.cpu0.dcache.tags.occ_blocks::cpu1.data 272.882373 # Average occupied blocks per requestor +system.cpu0.dcache.tags.occ_percent::cpu0.data 0.466915 # Average percentage of cache occupancy +system.cpu0.dcache.tags.occ_percent::cpu1.data 0.532973 # Average percentage of cache occupancy system.cpu0.dcache.tags.occ_percent::total 0.999888 # Average percentage of cache occupancy system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id system.cpu0.dcache.tags.age_task_id_blocks_1024::0 43 # Occupied blocks per task id -system.cpu0.dcache.tags.age_task_id_blocks_1024::1 374 # Occupied blocks per task id -system.cpu0.dcache.tags.age_task_id_blocks_1024::2 93 # Occupied blocks per task id +system.cpu0.dcache.tags.age_task_id_blocks_1024::1 413 # Occupied blocks per task id +system.cpu0.dcache.tags.age_task_id_blocks_1024::2 54 # Occupied blocks per task id system.cpu0.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu0.dcache.tags.tag_accesses 1196218197 # Number of tag accesses -system.cpu0.dcache.tags.data_accesses 1196218197 # Number of data accesses -system.cpu0.dcache.ReadReq_hits::cpu0.data 73007967 # number of ReadReq hits -system.cpu0.dcache.ReadReq_hits::cpu1.data 72737993 # number of ReadReq hits -system.cpu0.dcache.ReadReq_hits::total 145745960 # number of ReadReq hits -system.cpu0.dcache.WriteReq_hits::cpu0.data 67086341 # number of WriteReq hits -system.cpu0.dcache.WriteReq_hits::cpu1.data 66998346 # number of WriteReq hits -system.cpu0.dcache.WriteReq_hits::total 134084687 # number of WriteReq hits -system.cpu0.dcache.SoftPFReq_hits::cpu0.data 184406 # number of SoftPFReq hits -system.cpu0.dcache.SoftPFReq_hits::cpu1.data 186200 # number of SoftPFReq hits -system.cpu0.dcache.SoftPFReq_hits::total 370606 # number of SoftPFReq hits -system.cpu0.dcache.WriteLineReq_hits::cpu0.data 162812 # number of WriteLineReq hits -system.cpu0.dcache.WriteLineReq_hits::cpu1.data 166437 # number of WriteLineReq hits -system.cpu0.dcache.WriteLineReq_hits::total 329249 # number of WriteLineReq hits -system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 1644610 # number of LoadLockedReq hits -system.cpu0.dcache.LoadLockedReq_hits::cpu1.data 1632284 # number of LoadLockedReq hits -system.cpu0.dcache.LoadLockedReq_hits::total 3276894 # number of LoadLockedReq hits -system.cpu0.dcache.StoreCondReq_hits::cpu0.data 1785360 # number of StoreCondReq hits -system.cpu0.dcache.StoreCondReq_hits::cpu1.data 1770652 # number of StoreCondReq hits -system.cpu0.dcache.StoreCondReq_hits::total 3556012 # number of StoreCondReq hits -system.cpu0.dcache.demand_hits::cpu0.data 140094308 # number of demand (read+write) hits -system.cpu0.dcache.demand_hits::cpu1.data 139736339 # number of demand (read+write) hits -system.cpu0.dcache.demand_hits::total 279830647 # number of demand (read+write) hits -system.cpu0.dcache.overall_hits::cpu0.data 140278714 # number of overall hits -system.cpu0.dcache.overall_hits::cpu1.data 139922539 # number of overall hits -system.cpu0.dcache.overall_hits::total 280201253 # number of overall hits -system.cpu0.dcache.ReadReq_misses::cpu0.data 2418380 # number of ReadReq misses -system.cpu0.dcache.ReadReq_misses::cpu1.data 2397518 # number of ReadReq misses -system.cpu0.dcache.ReadReq_misses::total 4815898 # number of ReadReq misses -system.cpu0.dcache.WriteReq_misses::cpu0.data 985807 # number of WriteReq misses -system.cpu0.dcache.WriteReq_misses::cpu1.data 975481 # number of WriteReq misses -system.cpu0.dcache.WriteReq_misses::total 1961288 # number of WriteReq misses -system.cpu0.dcache.SoftPFReq_misses::cpu0.data 555377 # number of SoftPFReq misses -system.cpu0.dcache.SoftPFReq_misses::cpu1.data 547969 # number of SoftPFReq misses -system.cpu0.dcache.SoftPFReq_misses::total 1103346 # number of SoftPFReq misses -system.cpu0.dcache.WriteLineReq_misses::cpu0.data 614035 # number of WriteLineReq misses -system.cpu0.dcache.WriteLineReq_misses::cpu1.data 608349 # number of WriteLineReq misses -system.cpu0.dcache.WriteLineReq_misses::total 1222384 # number of WriteLineReq misses -system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 141557 # number of LoadLockedReq misses -system.cpu0.dcache.LoadLockedReq_misses::cpu1.data 139184 # number of LoadLockedReq misses -system.cpu0.dcache.LoadLockedReq_misses::total 280741 # number of LoadLockedReq misses +system.cpu0.dcache.tags.tag_accesses 1209380446 # Number of tag accesses +system.cpu0.dcache.tags.data_accesses 1209380446 # Number of data accesses +system.cpu0.dcache.ReadReq_hits::cpu0.data 73565050 # number of ReadReq hits +system.cpu0.dcache.ReadReq_hits::cpu1.data 73675214 # number of ReadReq hits +system.cpu0.dcache.ReadReq_hits::total 147240264 # number of ReadReq hits +system.cpu0.dcache.WriteReq_hits::cpu0.data 67654945 # number of WriteReq hits +system.cpu0.dcache.WriteReq_hits::cpu1.data 67959241 # number of WriteReq hits +system.cpu0.dcache.WriteReq_hits::total 135614186 # number of WriteReq hits +system.cpu0.dcache.SoftPFReq_hits::cpu0.data 188452 # number of SoftPFReq hits +system.cpu0.dcache.SoftPFReq_hits::cpu1.data 185421 # number of SoftPFReq hits +system.cpu0.dcache.SoftPFReq_hits::total 373873 # number of SoftPFReq hits +system.cpu0.dcache.WriteLineReq_hits::cpu0.data 174201 # number of WriteLineReq hits +system.cpu0.dcache.WriteLineReq_hits::cpu1.data 157964 # number of WriteLineReq hits +system.cpu0.dcache.WriteLineReq_hits::total 332165 # number of WriteLineReq hits +system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 1663387 # number of LoadLockedReq hits +system.cpu0.dcache.LoadLockedReq_hits::cpu1.data 1666647 # number of LoadLockedReq hits +system.cpu0.dcache.LoadLockedReq_hits::total 3330034 # number of LoadLockedReq hits +system.cpu0.dcache.StoreCondReq_hits::cpu0.data 1801503 # number of StoreCondReq hits +system.cpu0.dcache.StoreCondReq_hits::cpu1.data 1811825 # number of StoreCondReq hits +system.cpu0.dcache.StoreCondReq_hits::total 3613328 # number of StoreCondReq hits +system.cpu0.dcache.demand_hits::cpu0.data 141219995 # number of demand (read+write) hits +system.cpu0.dcache.demand_hits::cpu1.data 141634455 # number of demand (read+write) hits +system.cpu0.dcache.demand_hits::total 282854450 # number of demand (read+write) hits +system.cpu0.dcache.overall_hits::cpu0.data 141408447 # number of overall hits +system.cpu0.dcache.overall_hits::cpu1.data 141819876 # number of overall hits +system.cpu0.dcache.overall_hits::total 283228323 # number of overall hits +system.cpu0.dcache.ReadReq_misses::cpu0.data 2455322 # number of ReadReq misses +system.cpu0.dcache.ReadReq_misses::cpu1.data 2424347 # number of ReadReq misses +system.cpu0.dcache.ReadReq_misses::total 4879669 # number of ReadReq misses +system.cpu0.dcache.WriteReq_misses::cpu0.data 1010929 # number of WriteReq misses +system.cpu0.dcache.WriteReq_misses::cpu1.data 979195 # number of WriteReq misses +system.cpu0.dcache.WriteReq_misses::total 1990124 # number of WriteReq misses +system.cpu0.dcache.SoftPFReq_misses::cpu0.data 579794 # number of SoftPFReq misses +system.cpu0.dcache.SoftPFReq_misses::cpu1.data 548628 # number of SoftPFReq misses +system.cpu0.dcache.SoftPFReq_misses::total 1128422 # number of SoftPFReq misses +system.cpu0.dcache.WriteLineReq_misses::cpu0.data 615937 # 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number of LoadLockedReq MSHR miss cycles +system.cpu0.dcache.LoadLockedReq_mshr_miss_latency::total 2986892000 # number of LoadLockedReq MSHR miss cycles system.cpu0.dcache.StoreCondReq_mshr_miss_latency::cpu0.data 79000 # number of StoreCondReq MSHR miss cycles system.cpu0.dcache.StoreCondReq_mshr_miss_latency::cpu1.data 81000 # number of StoreCondReq MSHR miss cycles system.cpu0.dcache.StoreCondReq_mshr_miss_latency::total 160000 # number of StoreCondReq MSHR miss cycles -system.cpu0.dcache.demand_mshr_miss_latency::cpu0.data 69561740500 # number of demand (read+write) MSHR miss cycles -system.cpu0.dcache.demand_mshr_miss_latency::cpu1.data 69480319500 # number of demand (read+write) MSHR miss cycles -system.cpu0.dcache.demand_mshr_miss_latency::total 139042060000 # number of demand (read+write) MSHR miss cycles -system.cpu0.dcache.overall_mshr_miss_latency::cpu0.data 80012454500 # number of overall MSHR miss cycles -system.cpu0.dcache.overall_mshr_miss_latency::cpu1.data 79597763500 # number of overall MSHR miss cycles -system.cpu0.dcache.overall_mshr_miss_latency::total 159610218000 # number of overall MSHR miss cycles -system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::cpu0.data 3013571000 # number of ReadReq MSHR uncacheable cycles -system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::cpu1.data 3185791500 # number of ReadReq MSHR uncacheable cycles -system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::total 6199362500 # number of ReadReq MSHR uncacheable cycles -system.cpu0.dcache.WriteReq_mshr_uncacheable_latency::cpu0.data 2991819500 # number of WriteReq MSHR uncacheable cycles -system.cpu0.dcache.WriteReq_mshr_uncacheable_latency::cpu1.data 3225760000 # number of WriteReq MSHR uncacheable cycles -system.cpu0.dcache.WriteReq_mshr_uncacheable_latency::total 6217579500 # number of WriteReq MSHR uncacheable cycles -system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu0.data 6005390500 # number of overall MSHR uncacheable cycles -system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu1.data 6411551500 # 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mshr miss rate for SoftPFReq accesses -system.cpu0.dcache.WriteLineReq_mshr_miss_rate::cpu0.data 0.790419 # mshr miss rate for WriteLineReq accesses -system.cpu0.dcache.WriteLineReq_mshr_miss_rate::cpu1.data 0.785183 # mshr miss rate for WriteLineReq accesses -system.cpu0.dcache.WriteLineReq_mshr_miss_rate::total 0.787805 # mshr miss rate for WriteLineReq accesses -system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu0.data 0.060501 # mshr miss rate for LoadLockedReq accesses -system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu1.data 0.059798 # mshr miss rate for LoadLockedReq accesses -system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::total 0.060151 # mshr miss rate for LoadLockedReq accesses +system.cpu0.dcache.demand_mshr_miss_latency::cpu0.data 72358790500 # number of demand (read+write) MSHR miss cycles +system.cpu0.dcache.demand_mshr_miss_latency::cpu1.data 71851840000 # number of demand (read+write) MSHR miss cycles +system.cpu0.dcache.demand_mshr_miss_latency::total 144210630500 # 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number of WriteReq MSHR uncacheable cycles +system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu0.data 6509639500 # number of overall MSHR uncacheable cycles +system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu1.data 5907601500 # number of overall MSHR uncacheable cycles +system.cpu0.dcache.overall_mshr_uncacheable_latency::total 12417241000 # number of overall MSHR uncacheable cycles +system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu0.data 0.032157 # mshr miss rate for ReadReq accesses +system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu1.data 0.031714 # mshr miss rate for ReadReq accesses +system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.031935 # mshr miss rate for ReadReq accesses +system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu0.data 0.014579 # mshr miss rate for WriteReq accesses +system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu1.data 0.014038 # mshr miss rate for WriteReq accesses +system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.014308 # mshr miss rate for WriteReq accesses +system.cpu0.dcache.SoftPFReq_mshr_miss_rate::cpu0.data 0.753572 # mshr miss rate for SoftPFReq accesses +system.cpu0.dcache.SoftPFReq_mshr_miss_rate::cpu1.data 0.746165 # mshr miss rate for SoftPFReq accesses +system.cpu0.dcache.SoftPFReq_mshr_miss_rate::total 0.749953 # mshr miss rate for SoftPFReq accesses +system.cpu0.dcache.WriteLineReq_mshr_miss_rate::cpu0.data 0.779531 # mshr miss rate for WriteLineReq accesses +system.cpu0.dcache.WriteLineReq_mshr_miss_rate::cpu1.data 0.792925 # mshr miss rate for WriteLineReq accesses +system.cpu0.dcache.WriteLineReq_mshr_miss_rate::total 0.786110 # mshr miss rate for WriteLineReq accesses +system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu0.data 0.058121 # mshr miss rate for LoadLockedReq accesses +system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu1.data 0.061914 # mshr miss rate for LoadLockedReq accesses +system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::total 0.060023 # mshr miss rate for LoadLockedReq accesses system.cpu0.dcache.StoreCondReq_mshr_miss_rate::cpu0.data 0.000001 # mshr miss rate for StoreCondReq accesses system.cpu0.dcache.StoreCondReq_mshr_miss_rate::cpu1.data 0.000001 # mshr miss rate for StoreCondReq accesses system.cpu0.dcache.StoreCondReq_mshr_miss_rate::total 0.000001 # mshr miss rate for StoreCondReq accesses -system.cpu0.dcache.demand_mshr_miss_rate::cpu0.data 0.023559 # mshr miss rate for demand accesses -system.cpu0.dcache.demand_mshr_miss_rate::cpu1.data 0.023428 # mshr miss rate for demand accesses -system.cpu0.dcache.demand_mshr_miss_rate::total 0.023494 # mshr miss rate for demand accesses -system.cpu0.dcache.overall_mshr_miss_rate::cpu0.data 0.027282 # mshr miss rate for overall accesses -system.cpu0.dcache.overall_mshr_miss_rate::cpu1.data 0.027112 # mshr miss rate for overall accesses -system.cpu0.dcache.overall_mshr_miss_rate::total 0.027197 # mshr miss rate for overall accesses -system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu0.data 15904.442617 # average ReadReq mshr miss latency -system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu1.data 15934.299038 # average ReadReq mshr miss latency -system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 15919.310409 # average ReadReq mshr miss latency -system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu0.data 32115.607859 # average WriteReq mshr miss latency -system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu1.data 32559.916812 # average WriteReq mshr miss latency -system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 32336.788080 # average WriteReq mshr miss latency -system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu0.data 18849.576229 # average SoftPFReq mshr miss latency -system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu1.data 18492.015536 # average SoftPFReq mshr miss latency -system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::total 18671.980987 # average SoftPFReq mshr miss latency -system.cpu0.dcache.WriteLineReq_avg_mshr_miss_latency::cpu0.data 58245.660264 # average WriteLineReq mshr miss latency -system.cpu0.dcache.WriteLineReq_avg_mshr_miss_latency::cpu1.data 59610.038810 # average WriteLineReq mshr miss latency -system.cpu0.dcache.WriteLineReq_avg_mshr_miss_latency::total 58924.676288 # average WriteLineReq mshr miss latency -system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu0.data 13717.297157 # average LoadLockedReq mshr miss latency -system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu1.data 13911.385713 # average LoadLockedReq mshr miss latency -system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::total 13813.374144 # average LoadLockedReq mshr miss latency +system.cpu0.dcache.demand_mshr_miss_rate::cpu0.data 0.023815 # mshr miss rate for demand accesses +system.cpu0.dcache.demand_mshr_miss_rate::cpu1.data 0.023312 # mshr miss rate for demand accesses +system.cpu0.dcache.demand_mshr_miss_rate::total 0.023563 # mshr miss rate for demand accesses +system.cpu0.dcache.overall_mshr_miss_rate::cpu0.data 0.027669 # mshr miss rate for overall accesses +system.cpu0.dcache.overall_mshr_miss_rate::cpu1.data 0.026952 # mshr miss rate for overall accesses +system.cpu0.dcache.overall_mshr_miss_rate::total 0.027310 # mshr miss rate for overall accesses +system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu0.data 16118.940424 # average ReadReq mshr miss latency +system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu1.data 15946.282062 # average ReadReq mshr miss latency +system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 16033.164972 # average ReadReq mshr miss latency +system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu0.data 32918.787684 # average WriteReq mshr miss latency +system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu1.data 34477.794942 # average WriteReq mshr miss latency +system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 33685.100619 # average WriteReq mshr miss latency +system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu0.data 18503.015914 # average SoftPFReq mshr miss latency +system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::cpu1.data 19184.461278 # average SoftPFReq mshr miss latency +system.cpu0.dcache.SoftPFReq_avg_mshr_miss_latency::total 18834.300950 # average SoftPFReq mshr miss latency +system.cpu0.dcache.WriteLineReq_avg_mshr_miss_latency::cpu0.data 38122.623742 # average WriteLineReq mshr miss latency +system.cpu0.dcache.WriteLineReq_avg_mshr_miss_latency::cpu1.data 38839.284209 # average WriteLineReq mshr miss latency +system.cpu0.dcache.WriteLineReq_avg_mshr_miss_latency::total 38477.705303 # average WriteLineReq mshr miss latency +system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu0.data 13901.900698 # average LoadLockedReq mshr miss latency +system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu1.data 13638.545843 # average LoadLockedReq mshr miss latency +system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::total 13765.684553 # average LoadLockedReq mshr miss latency system.cpu0.dcache.StoreCondReq_avg_mshr_miss_latency::cpu0.data 79000 # average StoreCondReq mshr miss latency system.cpu0.dcache.StoreCondReq_avg_mshr_miss_latency::cpu1.data 81000 # average StoreCondReq mshr miss latency system.cpu0.dcache.StoreCondReq_avg_mshr_miss_latency::total 80000 # average StoreCondReq mshr miss latency -system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 20576.323947 # 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average WriteReq mshr uncacheable latency -system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu1.data 189873.447525 # average WriteReq mshr uncacheable latency -system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::total 184459.592963 # average WriteReq mshr uncacheable latency -system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 180798.124398 # average overall mshr uncacheable latency -system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 187521.613875 # average overall mshr uncacheable latency -system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 184208.494667 # average overall mshr uncacheable latency +system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 20999.900600 # average overall mshr miss latency +system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu1.data 21250.421449 # average overall mshr miss latency +system.cpu0.dcache.demand_avg_mshr_miss_latency::total 21123.977990 # average overall mshr miss latency +system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu0.data 20640.729941 # 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number of ReadReq MSHR uncacheable cycles system.cpu0.icache.overall_mshr_uncacheable_latency::cpu0.inst 2780591500 # number of overall MSHR uncacheable cycles system.cpu0.icache.overall_mshr_uncacheable_latency::cpu1.inst 2656208000 # number of overall MSHR uncacheable cycles system.cpu0.icache.overall_mshr_uncacheable_latency::total 5436799500 # number of overall MSHR uncacheable cycles -system.cpu0.icache.ReadReq_mshr_miss_rate::cpu0.inst 0.016200 # mshr miss rate for ReadReq accesses -system.cpu0.icache.ReadReq_mshr_miss_rate::cpu1.inst 0.016151 # mshr miss rate for ReadReq accesses -system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.016175 # mshr miss rate for ReadReq accesses -system.cpu0.icache.demand_mshr_miss_rate::cpu0.inst 0.016200 # mshr miss rate for demand accesses -system.cpu0.icache.demand_mshr_miss_rate::cpu1.inst 0.016151 # mshr miss rate for demand accesses -system.cpu0.icache.demand_mshr_miss_rate::total 0.016175 # mshr miss rate for demand accesses -system.cpu0.icache.overall_mshr_miss_rate::cpu0.inst 0.016200 # mshr miss rate for overall accesses -system.cpu0.icache.overall_mshr_miss_rate::cpu1.inst 0.016151 # mshr miss rate for overall accesses -system.cpu0.icache.overall_mshr_miss_rate::total 0.016175 # mshr miss rate for overall accesses -system.cpu0.icache.ReadReq_avg_mshr_miss_latency::cpu0.inst 12644.367522 # average ReadReq mshr miss latency -system.cpu0.icache.ReadReq_avg_mshr_miss_latency::cpu1.inst 12676.533398 # average ReadReq mshr miss latency -system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 12660.404379 # average ReadReq mshr miss latency -system.cpu0.icache.demand_avg_mshr_miss_latency::cpu0.inst 12644.367522 # average overall mshr miss latency -system.cpu0.icache.demand_avg_mshr_miss_latency::cpu1.inst 12676.533398 # average overall mshr miss latency -system.cpu0.icache.demand_avg_mshr_miss_latency::total 12660.404379 # average overall mshr miss latency -system.cpu0.icache.overall_avg_mshr_miss_latency::cpu0.inst 12644.367522 # average overall mshr miss latency -system.cpu0.icache.overall_avg_mshr_miss_latency::cpu1.inst 12676.533398 # average overall mshr miss latency -system.cpu0.icache.overall_avg_mshr_miss_latency::total 12660.404379 # average overall mshr miss latency +system.cpu0.icache.ReadReq_mshr_miss_rate::cpu0.inst 0.015978 # mshr miss rate for ReadReq accesses +system.cpu0.icache.ReadReq_mshr_miss_rate::cpu1.inst 0.015859 # mshr miss rate for ReadReq accesses +system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.015918 # mshr miss rate for ReadReq accesses +system.cpu0.icache.demand_mshr_miss_rate::cpu0.inst 0.015978 # mshr miss rate for demand accesses +system.cpu0.icache.demand_mshr_miss_rate::cpu1.inst 0.015859 # mshr miss rate for demand accesses +system.cpu0.icache.demand_mshr_miss_rate::total 0.015918 # mshr miss rate for demand accesses +system.cpu0.icache.overall_mshr_miss_rate::cpu0.inst 0.015978 # mshr miss rate for overall accesses +system.cpu0.icache.overall_mshr_miss_rate::cpu1.inst 0.015859 # mshr miss rate for overall accesses +system.cpu0.icache.overall_mshr_miss_rate::total 0.015918 # mshr miss rate for overall accesses +system.cpu0.icache.ReadReq_avg_mshr_miss_latency::cpu0.inst 12670.540197 # average ReadReq mshr miss latency +system.cpu0.icache.ReadReq_avg_mshr_miss_latency::cpu1.inst 12679.028329 # average ReadReq mshr miss latency +system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 12674.770544 # average ReadReq mshr miss latency +system.cpu0.icache.demand_avg_mshr_miss_latency::cpu0.inst 12670.540197 # average overall mshr miss latency +system.cpu0.icache.demand_avg_mshr_miss_latency::cpu1.inst 12679.028329 # average overall mshr miss latency +system.cpu0.icache.demand_avg_mshr_miss_latency::total 12674.770544 # average overall mshr miss latency +system.cpu0.icache.overall_avg_mshr_miss_latency::cpu0.inst 12670.540197 # average overall mshr miss latency +system.cpu0.icache.overall_avg_mshr_miss_latency::cpu1.inst 12679.028329 # average overall mshr miss latency +system.cpu0.icache.overall_avg_mshr_miss_latency::total 12674.770544 # average overall mshr miss latency system.cpu0.icache.ReadReq_avg_mshr_uncacheable_latency::cpu0.inst 126035.332245 # average ReadReq mshr uncacheable latency system.cpu0.icache.ReadReq_avg_mshr_uncacheable_latency::cpu1.inst 126107.771922 # average ReadReq mshr uncacheable latency system.cpu0.icache.ReadReq_avg_mshr_uncacheable_latency::total 126070.713043 # average ReadReq mshr uncacheable latency @@ -1082,70 +1083,68 @@ system.cpu1.dstage2_mmu.stage2_tlb.inst_accesses 0 system.cpu1.dstage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu1.dstage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu1.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu1.dtb.walker.walks 117928 # Table walker walks requested -system.cpu1.dtb.walker.walksLong 117928 # Table walker walks initiated with long descriptors -system.cpu1.dtb.walker.walksLongTerminationLevel::Level2 18037 # Level at which table walker walks with long descriptors terminate -system.cpu1.dtb.walker.walksLongTerminationLevel::Level3 85683 # Level at which table walker walks with long descriptors terminate -system.cpu1.dtb.walker.walksSquashedBefore 6 # Table walks squashed before starting -system.cpu1.dtb.walker.walkWaitTime::samples 117922 # Table walker wait (enqueue to first request) latency -system.cpu1.dtb.walker.walkWaitTime::0 117922 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu1.dtb.walker.walkWaitTime::total 117922 # Table walker wait (enqueue to first request) latency -system.cpu1.dtb.walker.walkCompletionTime::samples 103726 # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::mean 24721.569327 # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::gmean 21421.072660 # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::stdev 15374.016898 # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::0-32767 68517 66.06% 66.06% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::32768-65535 34673 33.43% 99.48% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::65536-98303 1 0.00% 99.48% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::98304-131071 7 0.01% 99.49% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::131072-163839 395 0.38% 99.87% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::163840-196607 59 0.06% 99.93% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::196608-229375 7 0.01% 99.94% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::229376-262143 7 0.01% 99.94% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::262144-294911 26 0.03% 99.97% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::294912-327679 7 0.01% 99.97% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::327680-360447 2 0.00% 99.98% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::360448-393215 2 0.00% 99.98% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::393216-425983 18 0.02% 100.00% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::425984-458751 5 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walkCompletionTime::total 103726 # Table walker service (enqueue to completion) latency -system.cpu1.dtb.walker.walksPending::samples 7196110108 # Table walker pending requests distribution -system.cpu1.dtb.walker.walksPending::mean 0.793869 # Table walker pending requests distribution -system.cpu1.dtb.walker.walksPending::stdev 0.404526 # Table walker pending requests distribution -system.cpu1.dtb.walker.walksPending::0 1483343204 20.61% 20.61% # Table walker pending requests distribution -system.cpu1.dtb.walker.walksPending::1 5712766904 79.39% 100.00% # Table walker pending requests distribution -system.cpu1.dtb.walker.walksPending::total 7196110108 # Table walker pending requests distribution -system.cpu1.dtb.walker.walkPageSizes::4K 85684 82.61% 82.61% # Table walker page sizes translated -system.cpu1.dtb.walker.walkPageSizes::2M 18037 17.39% 100.00% # Table walker page sizes translated -system.cpu1.dtb.walker.walkPageSizes::total 103721 # Table walker page sizes translated -system.cpu1.dtb.walker.walkRequestOrigin_Requested::Data 117928 # Table walker requests started/completed, data/inst +system.cpu1.dtb.walker.walks 116402 # Table walker walks requested +system.cpu1.dtb.walker.walksLong 116402 # Table walker walks initiated with long descriptors +system.cpu1.dtb.walker.walksLongTerminationLevel::Level2 17438 # Level at which table walker walks with long descriptors terminate +system.cpu1.dtb.walker.walksLongTerminationLevel::Level3 84735 # Level at which table walker walks with long descriptors terminate +system.cpu1.dtb.walker.walksSquashedBefore 8 # Table walks squashed before starting +system.cpu1.dtb.walker.walkWaitTime::samples 116394 # Table walker wait (enqueue to first request) latency +system.cpu1.dtb.walker.walkWaitTime::mean 0.103098 # Table walker wait (enqueue to first request) latency +system.cpu1.dtb.walker.walkWaitTime::stdev 35.173529 # Table walker wait (enqueue to first request) latency +system.cpu1.dtb.walker.walkWaitTime::0-1023 116393 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu1.dtb.walker.walkWaitTime::11264-12287 1 0.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu1.dtb.walker.walkWaitTime::total 116394 # Table walker wait (enqueue to first request) latency +system.cpu1.dtb.walker.walkCompletionTime::samples 102181 # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::mean 25297.388947 # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::gmean 21878.077952 # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::stdev 16308.937968 # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::0-65535 101549 99.38% 99.38% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::65536-131071 2 0.00% 99.38% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::131072-196607 548 0.54% 99.92% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::196608-262143 11 0.01% 99.93% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::262144-327679 41 0.04% 99.97% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::327680-393215 2 0.00% 99.97% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::393216-458751 24 0.02% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::458752-524287 1 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::524288-589823 2 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::589824-655359 1 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walkCompletionTime::total 102181 # Table walker service (enqueue to completion) latency +system.cpu1.dtb.walker.walksPending::samples 344855740 # Table walker pending requests distribution +system.cpu1.dtb.walker.walksPending::mean -3.415840 # Table walker pending requests distribution +system.cpu1.dtb.walker.walksPending::0 1522827704 441.58% 441.58% # Table walker pending requests distribution +system.cpu1.dtb.walker.walksPending::1 -1177971964 -341.58% 100.00% # Table walker pending requests distribution +system.cpu1.dtb.walker.walksPending::total 344855740 # Table walker pending requests distribution +system.cpu1.dtb.walker.walkPageSizes::4K 84735 82.93% 82.93% # Table walker page sizes translated +system.cpu1.dtb.walker.walkPageSizes::2M 17438 17.07% 100.00% # Table walker page sizes translated +system.cpu1.dtb.walker.walkPageSizes::total 102173 # Table walker page sizes translated +system.cpu1.dtb.walker.walkRequestOrigin_Requested::Data 116402 # Table walker requests started/completed, data/inst system.cpu1.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst -system.cpu1.dtb.walker.walkRequestOrigin_Requested::total 117928 # Table walker requests started/completed, data/inst -system.cpu1.dtb.walker.walkRequestOrigin_Completed::Data 103721 # Table walker requests started/completed, data/inst +system.cpu1.dtb.walker.walkRequestOrigin_Requested::total 116402 # Table walker requests started/completed, data/inst +system.cpu1.dtb.walker.walkRequestOrigin_Completed::Data 102173 # Table walker requests started/completed, data/inst system.cpu1.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst -system.cpu1.dtb.walker.walkRequestOrigin_Completed::total 103721 # Table walker requests started/completed, data/inst -system.cpu1.dtb.walker.walkRequestOrigin::total 221649 # Table walker requests started/completed, data/inst +system.cpu1.dtb.walker.walkRequestOrigin_Completed::total 102173 # Table walker requests started/completed, data/inst +system.cpu1.dtb.walker.walkRequestOrigin::total 218575 # Table walker requests started/completed, data/inst system.cpu1.dtb.inst_hits 0 # ITB inst hits system.cpu1.dtb.inst_misses 0 # ITB inst misses -system.cpu1.dtb.read_hits 77658339 # DTB read hits -system.cpu1.dtb.read_misses 91087 # DTB read misses -system.cpu1.dtb.write_hits 70545022 # DTB write hits -system.cpu1.dtb.write_misses 26841 # DTB write misses -system.cpu1.dtb.flush_tlb 51774 # Number of times complete TLB was flushed +system.cpu1.dtb.read_hits 78662844 # DTB read hits +system.cpu1.dtb.read_misses 89684 # DTB read misses +system.cpu1.dtb.write_hits 71537174 # DTB write hits +system.cpu1.dtb.write_misses 26718 # DTB write misses +system.cpu1.dtb.flush_tlb 51800 # Number of times complete TLB was flushed system.cpu1.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu1.dtb.flush_tlb_mva_asid 19088 # Number of times TLB was flushed by MVA & ASID -system.cpu1.dtb.flush_tlb_asid 488 # Number of times TLB was flushed by ASID -system.cpu1.dtb.flush_entries 67576 # Number of entries that have been flushed from TLB +system.cpu1.dtb.flush_tlb_mva_asid 18845 # Number of times TLB was flushed by MVA & ASID +system.cpu1.dtb.flush_tlb_asid 504 # Number of times TLB was flushed by ASID +system.cpu1.dtb.flush_entries 67247 # Number of entries that have been flushed from TLB system.cpu1.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions -system.cpu1.dtb.prefetch_faults 4039 # Number of TLB faults due to prefetch +system.cpu1.dtb.prefetch_faults 3767 # Number of TLB faults due to prefetch system.cpu1.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu1.dtb.perms_faults 9302 # Number of TLB faults due to permissions restrictions -system.cpu1.dtb.read_accesses 77749426 # DTB read accesses -system.cpu1.dtb.write_accesses 70571863 # DTB write accesses +system.cpu1.dtb.perms_faults 9113 # Number of TLB faults due to permissions restrictions +system.cpu1.dtb.read_accesses 78752528 # DTB read accesses +system.cpu1.dtb.write_accesses 71563892 # DTB write accesses system.cpu1.dtb.inst_accesses 0 # ITB inst accesses -system.cpu1.dtb.hits 148203361 # DTB hits -system.cpu1.dtb.misses 117928 # DTB misses -system.cpu1.dtb.accesses 148321289 # DTB accesses +system.cpu1.dtb.hits 150200018 # DTB hits +system.cpu1.dtb.misses 116402 # DTB misses +system.cpu1.dtb.accesses 150316420 # DTB accesses system.cpu1.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu1.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu1.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst @@ -1175,126 +1174,127 @@ system.cpu1.istage2_mmu.stage2_tlb.inst_accesses 0 system.cpu1.istage2_mmu.stage2_tlb.hits 0 # DTB hits system.cpu1.istage2_mmu.stage2_tlb.misses 0 # DTB misses system.cpu1.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu1.itb.walker.walks 75461 # Table walker walks requested -system.cpu1.itb.walker.walksLong 75461 # Table walker walks initiated with long descriptors -system.cpu1.itb.walker.walksLongTerminationLevel::Level2 4165 # Level at which table walker walks with long descriptors terminate -system.cpu1.itb.walker.walksLongTerminationLevel::Level3 66112 # Level at which table walker walks with long descriptors terminate -system.cpu1.itb.walker.walkWaitTime::samples 75461 # Table walker wait (enqueue to first request) latency -system.cpu1.itb.walker.walkWaitTime::0 75461 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu1.itb.walker.walkWaitTime::total 75461 # Table walker wait (enqueue to first request) latency -system.cpu1.itb.walker.walkCompletionTime::samples 70277 # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::mean 28243.080951 # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::gmean 25107.153761 # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::stdev 18108.319299 # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::0-65535 69604 99.04% 99.04% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::65536-131071 2 0.00% 99.05% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::131072-196607 599 0.85% 99.90% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::196608-262143 10 0.01% 99.91% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::262144-327679 30 0.04% 99.95% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::327680-393215 11 0.02% 99.97% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::393216-458751 15 0.02% 99.99% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::458752-524287 2 0.00% 99.99% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::524288-589823 3 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::589824-655359 1 0.00% 100.00% # Table walker service (enqueue to completion) latency -system.cpu1.itb.walker.walkCompletionTime::total 70277 # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walks 74223 # Table walker walks requested +system.cpu1.itb.walker.walksLong 74223 # Table walker walks initiated with long descriptors +system.cpu1.itb.walker.walksLongTerminationLevel::Level2 4163 # Level at which table walker walks with long descriptors terminate +system.cpu1.itb.walker.walksLongTerminationLevel::Level3 64958 # Level at which table walker walks with long descriptors terminate +system.cpu1.itb.walker.walkWaitTime::samples 74223 # Table walker wait (enqueue to first request) latency +system.cpu1.itb.walker.walkWaitTime::0 74223 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu1.itb.walker.walkWaitTime::total 74223 # Table walker wait (enqueue to first request) latency +system.cpu1.itb.walker.walkCompletionTime::samples 69121 # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::mean 28935.417601 # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::gmean 25541.870805 # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::stdev 19930.697059 # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::0-65535 68364 98.90% 98.90% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::65536-131071 4 0.01% 98.91% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::131072-196607 655 0.95% 99.86% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::196608-262143 17 0.02% 99.88% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::262144-327679 38 0.05% 99.94% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::327680-393215 14 0.02% 99.96% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::393216-458751 18 0.03% 99.98% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::458752-524287 3 0.00% 99.99% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::524288-589823 5 0.01% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::589824-655359 2 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::655360-720895 1 0.00% 100.00% # Table walker service (enqueue to completion) latency +system.cpu1.itb.walker.walkCompletionTime::total 69121 # Table walker service (enqueue to completion) latency system.cpu1.itb.walker.walksPending::samples 1449734704 # Table walker pending requests distribution system.cpu1.itb.walker.walksPending::0 1449734704 100.00% 100.00% # Table walker pending requests distribution system.cpu1.itb.walker.walksPending::total 1449734704 # Table walker pending requests distribution -system.cpu1.itb.walker.walkPageSizes::4K 66112 94.07% 94.07% # Table walker page sizes translated -system.cpu1.itb.walker.walkPageSizes::2M 4165 5.93% 100.00% # Table walker page sizes translated -system.cpu1.itb.walker.walkPageSizes::total 70277 # Table walker page sizes translated +system.cpu1.itb.walker.walkPageSizes::4K 64958 93.98% 93.98% # Table walker page sizes translated +system.cpu1.itb.walker.walkPageSizes::2M 4163 6.02% 100.00% # Table walker page sizes translated +system.cpu1.itb.walker.walkPageSizes::total 69121 # Table walker page sizes translated system.cpu1.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst -system.cpu1.itb.walker.walkRequestOrigin_Requested::Inst 75461 # Table walker requests started/completed, data/inst -system.cpu1.itb.walker.walkRequestOrigin_Requested::total 75461 # Table walker requests started/completed, data/inst +system.cpu1.itb.walker.walkRequestOrigin_Requested::Inst 74223 # Table walker requests started/completed, data/inst +system.cpu1.itb.walker.walkRequestOrigin_Requested::total 74223 # Table walker requests started/completed, data/inst system.cpu1.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst -system.cpu1.itb.walker.walkRequestOrigin_Completed::Inst 70277 # Table walker requests started/completed, data/inst -system.cpu1.itb.walker.walkRequestOrigin_Completed::total 70277 # Table walker requests started/completed, data/inst -system.cpu1.itb.walker.walkRequestOrigin::total 145738 # Table walker requests started/completed, data/inst -system.cpu1.itb.inst_hits 412855461 # ITB inst hits -system.cpu1.itb.inst_misses 75461 # ITB inst misses +system.cpu1.itb.walker.walkRequestOrigin_Completed::Inst 69121 # Table walker requests started/completed, data/inst +system.cpu1.itb.walker.walkRequestOrigin_Completed::total 69121 # Table walker requests started/completed, data/inst +system.cpu1.itb.walker.walkRequestOrigin::total 143344 # Table walker requests started/completed, data/inst +system.cpu1.itb.inst_hits 418345598 # ITB inst hits +system.cpu1.itb.inst_misses 74223 # ITB inst misses system.cpu1.itb.read_hits 0 # DTB read hits system.cpu1.itb.read_misses 0 # DTB read misses system.cpu1.itb.write_hits 0 # DTB write hits system.cpu1.itb.write_misses 0 # DTB write misses -system.cpu1.itb.flush_tlb 51774 # Number of times complete TLB was flushed +system.cpu1.itb.flush_tlb 51800 # Number of times complete TLB was flushed system.cpu1.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu1.itb.flush_tlb_mva_asid 19088 # Number of times TLB was flushed by MVA & ASID -system.cpu1.itb.flush_tlb_asid 488 # Number of times TLB was flushed by ASID -system.cpu1.itb.flush_entries 50522 # Number of entries that have been flushed from TLB +system.cpu1.itb.flush_tlb_mva_asid 18845 # Number of times TLB was flushed by MVA & ASID +system.cpu1.itb.flush_tlb_asid 504 # Number of times TLB was flushed by ASID +system.cpu1.itb.flush_entries 49961 # Number of entries that have been flushed from TLB system.cpu1.itb.align_faults 0 # Number of TLB faults due to alignment restrictions system.cpu1.itb.prefetch_faults 0 # Number of TLB faults due to prefetch system.cpu1.itb.domain_faults 0 # Number of TLB faults due to domain restrictions system.cpu1.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions system.cpu1.itb.read_accesses 0 # DTB read accesses system.cpu1.itb.write_accesses 0 # DTB write accesses -system.cpu1.itb.inst_accesses 412930922 # ITB inst accesses -system.cpu1.itb.hits 412855461 # DTB hits -system.cpu1.itb.misses 75461 # DTB misses -system.cpu1.itb.accesses 412930922 # DTB accesses -system.cpu1.numCycles 51771053820 # number of cpu cycles simulated +system.cpu1.itb.inst_accesses 418419821 # ITB inst accesses +system.cpu1.itb.hits 418345598 # DTB hits +system.cpu1.itb.misses 74223 # DTB misses +system.cpu1.itb.accesses 418419821 # DTB accesses +system.cpu1.numCycles 51798396348 # number of cpu cycles simulated system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu1.kern.inst.arm 0 # number of arm instructions executed system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed -system.cpu1.committedInsts 412596709 # Number of instructions committed -system.cpu1.committedOps 484960221 # Number of ops (including micro ops) committed -system.cpu1.num_int_alu_accesses 445873459 # Number of integer alu accesses -system.cpu1.num_fp_alu_accesses 452061 # Number of float alu accesses -system.cpu1.num_func_calls 24841157 # number of times a function call or return occured -system.cpu1.num_conditional_control_insts 62479389 # number of instructions that are conditional controls -system.cpu1.num_int_insts 445873459 # number of integer instructions -system.cpu1.num_fp_insts 452061 # number of float instructions -system.cpu1.num_int_register_reads 645239510 # number of times the integer registers were read -system.cpu1.num_int_register_writes 353339457 # number of times the integer registers were written -system.cpu1.num_fp_register_reads 727891 # number of times the floating registers were read -system.cpu1.num_fp_register_writes 384564 # number of times the floating registers were written -system.cpu1.num_cc_register_reads 106622832 # number of times the CC registers were read -system.cpu1.num_cc_register_writes 106320597 # number of times the CC registers were written -system.cpu1.num_mem_refs 148192340 # number of memory refs -system.cpu1.num_load_insts 77653796 # Number of load instructions -system.cpu1.num_store_insts 70538544 # Number of store instructions -system.cpu1.num_idle_cycles 50233192566.855270 # Number of idle cycles -system.cpu1.num_busy_cycles 1537861253.144726 # Number of busy cycles -system.cpu1.not_idle_fraction 0.029705 # Percentage of non-idle cycles -system.cpu1.idle_fraction 0.970295 # Percentage of idle cycles -system.cpu1.Branches 92059897 # Number of branches fetched -system.cpu1.op_class::No_OpClass 1 0.00% 0.00% # Class of executed instruction -system.cpu1.op_class::IntAlu 335900158 69.22% 69.22% # Class of executed instruction -system.cpu1.op_class::IntMult 1042632 0.21% 69.44% # Class of executed instruction -system.cpu1.op_class::IntDiv 47706 0.01% 69.45% # Class of executed instruction -system.cpu1.op_class::FloatAdd 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::FloatCmp 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::FloatCvt 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::FloatMult 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::FloatDiv 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::FloatSqrt 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdAdd 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdAddAcc 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdAlu 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdCmp 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdCvt 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdMisc 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdMult 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdMultAcc 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdShift 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdShiftAcc 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdSqrt 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdFloatAdd 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdFloatAlu 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdFloatCmp 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdFloatCvt 1 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdFloatDiv 0 0.00% 69.45% # Class of executed instruction -system.cpu1.op_class::SimdFloatMisc 57197 0.01% 69.46% # Class of executed instruction -system.cpu1.op_class::SimdFloatMult 0 0.00% 69.46% # Class of executed instruction -system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 69.46% # Class of executed instruction -system.cpu1.op_class::SimdFloatSqrt 0 0.00% 69.46% # Class of executed instruction -system.cpu1.op_class::MemRead 77653796 16.00% 85.46% # Class of executed instruction -system.cpu1.op_class::MemWrite 70538544 14.54% 100.00% # Class of executed instruction +system.cpu1.committedInsts 418091469 # Number of instructions committed +system.cpu1.committedOps 491344077 # Number of ops (including micro ops) committed +system.cpu1.num_int_alu_accesses 451749452 # Number of integer alu accesses +system.cpu1.num_fp_alu_accesses 464131 # Number of float alu accesses +system.cpu1.num_func_calls 25120971 # number of times a function call or return occured +system.cpu1.num_conditional_control_insts 63413635 # number of instructions that are conditional controls +system.cpu1.num_int_insts 451749452 # number of integer instructions +system.cpu1.num_fp_insts 464131 # number of float instructions +system.cpu1.num_int_register_reads 653305653 # number of times the integer registers were read +system.cpu1.num_int_register_writes 357922313 # number of times the integer registers were written +system.cpu1.num_fp_register_reads 749406 # number of times the floating registers were read +system.cpu1.num_fp_register_writes 392664 # number of times the floating registers were written +system.cpu1.num_cc_register_reads 108141039 # number of times the CC registers were read +system.cpu1.num_cc_register_writes 107840924 # number of times the CC registers were written +system.cpu1.num_mem_refs 150187574 # number of memory refs +system.cpu1.num_load_insts 78657446 # Number of load instructions +system.cpu1.num_store_insts 71530128 # Number of store instructions +system.cpu1.num_idle_cycles 50264307367.295029 # Number of idle cycles +system.cpu1.num_busy_cycles 1534088980.704967 # Number of busy cycles +system.cpu1.not_idle_fraction 0.029617 # Percentage of non-idle cycles +system.cpu1.idle_fraction 0.970383 # Percentage of idle cycles +system.cpu1.Branches 93317418 # Number of branches fetched +system.cpu1.op_class::No_OpClass 0 0.00% 0.00% # Class of executed instruction +system.cpu1.op_class::IntAlu 340283943 69.22% 69.22% # Class of executed instruction +system.cpu1.op_class::IntMult 1041145 0.21% 69.43% # Class of executed instruction +system.cpu1.op_class::IntDiv 48269 0.01% 69.44% # Class of executed instruction +system.cpu1.op_class::FloatAdd 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::FloatCmp 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::FloatCvt 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::FloatMult 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::FloatDiv 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::FloatSqrt 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdAdd 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdAddAcc 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdAlu 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdCmp 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdCvt 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdMisc 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdMult 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdMultAcc 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdShift 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdShiftAcc 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdSqrt 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdFloatAdd 4 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdFloatAlu 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdFloatCmp 2 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdFloatCvt 5 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdFloatDiv 0 0.00% 69.44% # Class of executed instruction +system.cpu1.op_class::SimdFloatMisc 58327 0.01% 69.45% # Class of executed instruction +system.cpu1.op_class::SimdFloatMult 0 0.00% 69.45% # Class of executed instruction +system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 69.45% # Class of executed instruction +system.cpu1.op_class::SimdFloatSqrt 0 0.00% 69.45% # Class of executed instruction +system.cpu1.op_class::MemRead 78657446 16.00% 85.45% # Class of executed instruction +system.cpu1.op_class::MemWrite 71530128 14.55% 100.00% # Class of executed instruction system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu1.op_class::total 485240035 # Class of executed instruction -system.iobus.trans_dist::ReadReq 40316 # Transaction distribution -system.iobus.trans_dist::ReadResp 40316 # Transaction distribution +system.cpu1.op_class::total 491619269 # Class of executed instruction +system.iobus.trans_dist::ReadReq 40338 # Transaction distribution +system.iobus.trans_dist::ReadResp 40338 # Transaction distribution system.iobus.trans_dist::WriteReq 136571 # Transaction distribution system.iobus.trans_dist::WriteResp 136571 # Transaction distribution system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 47822 # Packet count per connected master and slave (bytes) @@ -1311,11 +1311,11 @@ system.iobus.pkt_count_system.bridge.master::system.realview.watchdog_fake.pio system.iobus.pkt_count_system.bridge.master::system.realview.ide.pio 29548 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.bridge.master::system.realview.ethernet.pio 44750 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.bridge.master::total 122704 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 230990 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.realview.ide.dma::total 230990 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 231034 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.realview.ide.dma::total 231034 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.realview.ethernet.dma::system.iocache.cpu_side 80 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.realview.ethernet.dma::total 80 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count::total 353774 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count::total 353818 # Packet count per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.uart.pio 47842 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.realview_io.pio 28 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.pci_host.pio 634 # Cumulative packet size per connected master and slave (bytes) @@ -1330,20 +1330,20 @@ system.iobus.pkt_size_system.bridge.master::system.realview.watchdog_fake.pio system.iobus.pkt_size_system.bridge.master::system.realview.ide.pio 17558 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::system.realview.ethernet.pio 89500 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.bridge.master::total 155834 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 7334392 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.realview.ide.dma::total 7334392 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 7334568 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.realview.ide.dma::total 7334568 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.realview.ethernet.dma::system.iocache.cpu_side 2086 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.realview.ethernet.dma::total 2086 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size::total 7492312 # Cumulative packet size per connected master and slave (bytes) -system.iobus.reqLayer0.occupancy 42146500 # Layer occupancy (ticks) +system.iobus.pkt_size::total 7492488 # Cumulative packet size per connected master and slave (bytes) +system.iobus.reqLayer0.occupancy 42145500 # Layer occupancy (ticks) system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer1.occupancy 11000 # Layer occupancy (ticks) +system.iobus.reqLayer1.occupancy 10500 # Layer occupancy (ticks) system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer2.occupancy 322500 # Layer occupancy (ticks) +system.iobus.reqLayer2.occupancy 323000 # Layer occupancy (ticks) system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer3.occupancy 11000 # Layer occupancy (ticks) system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer4.occupancy 11500 # Layer occupancy (ticks) +system.iobus.reqLayer4.occupancy 11000 # Layer occupancy (ticks) system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer10.occupancy 11000 # Layer occupancy (ticks) system.iobus.reqLayer10.utilization 0.0 # Layer utilization (%) @@ -1353,77 +1353,77 @@ system.iobus.reqLayer14.occupancy 11000 # La system.iobus.reqLayer14.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer15.occupancy 11000 # Layer occupancy (ticks) system.iobus.reqLayer15.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer16.occupancy 16500 # Layer occupancy (ticks) +system.iobus.reqLayer16.occupancy 17000 # Layer occupancy (ticks) system.iobus.reqLayer16.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer17.occupancy 11000 # Layer occupancy (ticks) system.iobus.reqLayer17.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer23.occupancy 25708000 # Layer occupancy (ticks) +system.iobus.reqLayer23.occupancy 25719500 # Layer occupancy (ticks) system.iobus.reqLayer23.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer24.occupancy 38602000 # Layer occupancy (ticks) +system.iobus.reqLayer24.occupancy 38601500 # Layer occupancy (ticks) system.iobus.reqLayer24.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer25.occupancy 566763189 # Layer occupancy (ticks) +system.iobus.reqLayer25.occupancy 566847151 # Layer occupancy (ticks) system.iobus.reqLayer25.utilization 0.0 # Layer utilization (%) system.iobus.respLayer0.occupancy 92800000 # Layer occupancy (ticks) system.iobus.respLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer3.occupancy 147750000 # Layer occupancy (ticks) +system.iobus.respLayer3.occupancy 147794000 # Layer occupancy (ticks) system.iobus.respLayer3.utilization 0.0 # Layer utilization (%) system.iobus.respLayer4.occupancy 170000 # Layer occupancy (ticks) system.iobus.respLayer4.utilization 0.0 # Layer utilization (%) -system.iocache.tags.replacements 115482 # number of replacements -system.iocache.tags.tagsinuse 10.442873 # Cycle average of tags in use +system.iocache.tags.replacements 115499 # number of replacements +system.iocache.tags.tagsinuse 10.451110 # Cycle average of tags in use system.iocache.tags.total_refs 3 # Total number of references to valid blocks. -system.iocache.tags.sampled_refs 115498 # Sample count of references to valid blocks. +system.iocache.tags.sampled_refs 115515 # Sample count of references to valid blocks. system.iocache.tags.avg_refs 0.000026 # Average number of references to valid blocks. -system.iocache.tags.warmup_cycle 13183784926000 # Cycle when the warmup percentage was hit. -system.iocache.tags.occ_blocks::realview.ethernet 5.854402 # Average occupied blocks per requestor -system.iocache.tags.occ_blocks::realview.ide 4.588472 # Average occupied blocks per requestor -system.iocache.tags.occ_percent::realview.ethernet 0.365900 # Average percentage of cache occupancy -system.iocache.tags.occ_percent::realview.ide 0.286779 # Average percentage of cache occupancy -system.iocache.tags.occ_percent::total 0.652680 # Average percentage of cache occupancy +system.iocache.tags.warmup_cycle 13171691140000 # Cycle when the warmup percentage was hit. +system.iocache.tags.occ_blocks::realview.ethernet 3.508460 # Average occupied blocks per requestor +system.iocache.tags.occ_blocks::realview.ide 6.942650 # Average occupied blocks per requestor +system.iocache.tags.occ_percent::realview.ethernet 0.219279 # Average percentage of cache occupancy +system.iocache.tags.occ_percent::realview.ide 0.433916 # Average percentage of cache occupancy +system.iocache.tags.occ_percent::total 0.653194 # Average percentage of cache occupancy system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id -system.iocache.tags.tag_accesses 1039812 # Number of tag accesses -system.iocache.tags.data_accesses 1039812 # Number of data accesses +system.iocache.tags.tag_accesses 1040010 # Number of tag accesses +system.iocache.tags.data_accesses 1040010 # Number of data accesses system.iocache.ReadReq_misses::realview.ethernet 37 # number of ReadReq misses -system.iocache.ReadReq_misses::realview.ide 8831 # number of ReadReq misses -system.iocache.ReadReq_misses::total 8868 # number of ReadReq misses +system.iocache.ReadReq_misses::realview.ide 8853 # number of ReadReq misses +system.iocache.ReadReq_misses::total 8890 # number of ReadReq misses system.iocache.WriteReq_misses::realview.ethernet 3 # number of WriteReq misses system.iocache.WriteReq_misses::total 3 # number of WriteReq misses system.iocache.WriteLineReq_misses::realview.ide 106664 # number of WriteLineReq misses system.iocache.WriteLineReq_misses::total 106664 # number of WriteLineReq misses system.iocache.demand_misses::realview.ethernet 40 # number of demand (read+write) misses -system.iocache.demand_misses::realview.ide 8831 # number of demand (read+write) misses -system.iocache.demand_misses::total 8871 # number of demand (read+write) misses +system.iocache.demand_misses::realview.ide 8853 # number of demand (read+write) misses +system.iocache.demand_misses::total 8893 # number of demand (read+write) misses system.iocache.overall_misses::realview.ethernet 40 # number of overall misses -system.iocache.overall_misses::realview.ide 8831 # number of overall misses -system.iocache.overall_misses::total 8871 # number of overall misses -system.iocache.ReadReq_miss_latency::realview.ethernet 5070000 # number of ReadReq miss cycles -system.iocache.ReadReq_miss_latency::realview.ide 1624550168 # number of ReadReq miss cycles -system.iocache.ReadReq_miss_latency::total 1629620168 # number of ReadReq miss cycles +system.iocache.overall_misses::realview.ide 8853 # number of overall misses +system.iocache.overall_misses::total 8893 # number of overall misses +system.iocache.ReadReq_miss_latency::realview.ethernet 5070500 # number of ReadReq miss cycles +system.iocache.ReadReq_miss_latency::realview.ide 1618419141 # number of ReadReq miss cycles +system.iocache.ReadReq_miss_latency::total 1623489641 # number of ReadReq miss cycles system.iocache.WriteReq_miss_latency::realview.ethernet 351000 # number of WriteReq miss cycles system.iocache.WriteReq_miss_latency::total 351000 # number of WriteReq miss cycles -system.iocache.WriteLineReq_miss_latency::realview.ide 13409547021 # number of WriteLineReq miss cycles -system.iocache.WriteLineReq_miss_latency::total 13409547021 # number of WriteLineReq miss cycles -system.iocache.demand_miss_latency::realview.ethernet 5421000 # number of demand (read+write) miss cycles -system.iocache.demand_miss_latency::realview.ide 1624550168 # number of demand (read+write) miss cycles -system.iocache.demand_miss_latency::total 1629971168 # number of demand (read+write) miss cycles -system.iocache.overall_miss_latency::realview.ethernet 5421000 # number of overall miss cycles -system.iocache.overall_miss_latency::realview.ide 1624550168 # number of overall miss cycles -system.iocache.overall_miss_latency::total 1629971168 # number of overall miss cycles +system.iocache.WriteLineReq_miss_latency::realview.ide 13411968510 # number of WriteLineReq miss cycles +system.iocache.WriteLineReq_miss_latency::total 13411968510 # number of WriteLineReq miss cycles +system.iocache.demand_miss_latency::realview.ethernet 5421500 # number of demand (read+write) miss cycles +system.iocache.demand_miss_latency::realview.ide 1618419141 # number of demand (read+write) miss cycles +system.iocache.demand_miss_latency::total 1623840641 # number of demand (read+write) miss cycles +system.iocache.overall_miss_latency::realview.ethernet 5421500 # number of overall miss cycles +system.iocache.overall_miss_latency::realview.ide 1618419141 # number of overall miss cycles +system.iocache.overall_miss_latency::total 1623840641 # number of overall miss cycles system.iocache.ReadReq_accesses::realview.ethernet 37 # number of ReadReq accesses(hits+misses) -system.iocache.ReadReq_accesses::realview.ide 8831 # number of ReadReq accesses(hits+misses) -system.iocache.ReadReq_accesses::total 8868 # number of ReadReq accesses(hits+misses) +system.iocache.ReadReq_accesses::realview.ide 8853 # number of ReadReq accesses(hits+misses) +system.iocache.ReadReq_accesses::total 8890 # number of ReadReq accesses(hits+misses) system.iocache.WriteReq_accesses::realview.ethernet 3 # number of WriteReq accesses(hits+misses) system.iocache.WriteReq_accesses::total 3 # number of WriteReq accesses(hits+misses) system.iocache.WriteLineReq_accesses::realview.ide 106664 # number of WriteLineReq accesses(hits+misses) system.iocache.WriteLineReq_accesses::total 106664 # number of WriteLineReq accesses(hits+misses) system.iocache.demand_accesses::realview.ethernet 40 # number of demand (read+write) accesses -system.iocache.demand_accesses::realview.ide 8831 # number of demand (read+write) accesses -system.iocache.demand_accesses::total 8871 # number of demand (read+write) accesses +system.iocache.demand_accesses::realview.ide 8853 # number of demand (read+write) accesses +system.iocache.demand_accesses::total 8893 # number of demand (read+write) accesses system.iocache.overall_accesses::realview.ethernet 40 # number of overall (read+write) accesses -system.iocache.overall_accesses::realview.ide 8831 # number of overall (read+write) accesses -system.iocache.overall_accesses::total 8871 # number of overall (read+write) accesses +system.iocache.overall_accesses::realview.ide 8853 # number of overall (read+write) accesses +system.iocache.overall_accesses::total 8893 # number of overall (read+write) accesses system.iocache.ReadReq_miss_rate::realview.ethernet 1 # miss rate for ReadReq accesses system.iocache.ReadReq_miss_rate::realview.ide 1 # miss rate for ReadReq accesses system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses @@ -1437,55 +1437,55 @@ system.iocache.demand_miss_rate::total 1 # mi system.iocache.overall_miss_rate::realview.ethernet 1 # miss rate for overall accesses system.iocache.overall_miss_rate::realview.ide 1 # miss rate for overall accesses system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses -system.iocache.ReadReq_avg_miss_latency::realview.ethernet 137027.027027 # average ReadReq miss latency -system.iocache.ReadReq_avg_miss_latency::realview.ide 183959.932963 # average ReadReq miss latency -system.iocache.ReadReq_avg_miss_latency::total 183764.114569 # average ReadReq miss latency +system.iocache.ReadReq_avg_miss_latency::realview.ethernet 137040.540541 # average ReadReq miss latency +system.iocache.ReadReq_avg_miss_latency::realview.ide 182810.249746 # average ReadReq miss latency +system.iocache.ReadReq_avg_miss_latency::total 182619.757143 # average ReadReq miss latency system.iocache.WriteReq_avg_miss_latency::realview.ethernet 117000 # average WriteReq miss latency system.iocache.WriteReq_avg_miss_latency::total 117000 # average WriteReq miss latency -system.iocache.WriteLineReq_avg_miss_latency::realview.ide 125717.646263 # average WriteLineReq miss latency -system.iocache.WriteLineReq_avg_miss_latency::total 125717.646263 # average WriteLineReq miss latency -system.iocache.demand_avg_miss_latency::realview.ethernet 135525 # average overall miss latency -system.iocache.demand_avg_miss_latency::realview.ide 183959.932963 # average overall miss latency -system.iocache.demand_avg_miss_latency::total 183741.536242 # average overall miss latency -system.iocache.overall_avg_miss_latency::realview.ethernet 135525 # average overall miss latency -system.iocache.overall_avg_miss_latency::realview.ide 183959.932963 # average overall miss latency -system.iocache.overall_avg_miss_latency::total 183741.536242 # average overall miss latency -system.iocache.blocked_cycles::no_mshrs 32143 # number of cycles access was blocked +system.iocache.WriteLineReq_avg_miss_latency::realview.ide 125740.348290 # average WriteLineReq miss latency +system.iocache.WriteLineReq_avg_miss_latency::total 125740.348290 # average WriteLineReq miss latency +system.iocache.demand_avg_miss_latency::realview.ethernet 135537.500000 # average overall miss latency +system.iocache.demand_avg_miss_latency::realview.ide 182810.249746 # average overall miss latency +system.iocache.demand_avg_miss_latency::total 182597.620713 # average overall miss latency +system.iocache.overall_avg_miss_latency::realview.ethernet 135537.500000 # average overall miss latency +system.iocache.overall_avg_miss_latency::realview.ide 182810.249746 # average overall miss latency +system.iocache.overall_avg_miss_latency::total 182597.620713 # average overall miss latency +system.iocache.blocked_cycles::no_mshrs 31642 # number of cycles access was blocked system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.iocache.blocked::no_mshrs 3321 # number of cycles access was blocked +system.iocache.blocked::no_mshrs 3353 # number of cycles access was blocked system.iocache.blocked::no_targets 0 # number of cycles access was blocked -system.iocache.avg_blocked_cycles::no_mshrs 9.678711 # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_mshrs 9.436922 # average number of cycles each access was blocked system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.iocache.fast_writes 0 # number of fast writes performed system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 106631 # number of writebacks system.iocache.writebacks::total 106631 # number of writebacks system.iocache.ReadReq_mshr_misses::realview.ethernet 37 # number of ReadReq MSHR misses -system.iocache.ReadReq_mshr_misses::realview.ide 8831 # number of ReadReq MSHR misses -system.iocache.ReadReq_mshr_misses::total 8868 # number of ReadReq MSHR misses +system.iocache.ReadReq_mshr_misses::realview.ide 8853 # number of ReadReq MSHR misses +system.iocache.ReadReq_mshr_misses::total 8890 # number of ReadReq MSHR misses system.iocache.WriteReq_mshr_misses::realview.ethernet 3 # number of WriteReq MSHR misses system.iocache.WriteReq_mshr_misses::total 3 # number of WriteReq MSHR misses system.iocache.WriteLineReq_mshr_misses::realview.ide 106664 # number of WriteLineReq MSHR misses system.iocache.WriteLineReq_mshr_misses::total 106664 # number of WriteLineReq MSHR misses system.iocache.demand_mshr_misses::realview.ethernet 40 # number of demand (read+write) MSHR misses -system.iocache.demand_mshr_misses::realview.ide 8831 # number of demand (read+write) MSHR misses -system.iocache.demand_mshr_misses::total 8871 # number of demand (read+write) MSHR misses +system.iocache.demand_mshr_misses::realview.ide 8853 # number of demand (read+write) MSHR misses +system.iocache.demand_mshr_misses::total 8893 # number of demand (read+write) MSHR misses system.iocache.overall_mshr_misses::realview.ethernet 40 # number of overall MSHR misses -system.iocache.overall_mshr_misses::realview.ide 8831 # number of overall MSHR misses -system.iocache.overall_mshr_misses::total 8871 # number of overall MSHR misses -system.iocache.ReadReq_mshr_miss_latency::realview.ethernet 3220000 # number of ReadReq MSHR miss cycles -system.iocache.ReadReq_mshr_miss_latency::realview.ide 1183000168 # number of ReadReq MSHR miss cycles -system.iocache.ReadReq_mshr_miss_latency::total 1186220168 # number of ReadReq MSHR miss cycles +system.iocache.overall_mshr_misses::realview.ide 8853 # number of overall MSHR misses +system.iocache.overall_mshr_misses::total 8893 # number of overall MSHR misses +system.iocache.ReadReq_mshr_miss_latency::realview.ethernet 3220500 # number of ReadReq MSHR miss cycles +system.iocache.ReadReq_mshr_miss_latency::realview.ide 1175769141 # number of ReadReq MSHR miss cycles +system.iocache.ReadReq_mshr_miss_latency::total 1178989641 # number of ReadReq MSHR miss cycles system.iocache.WriteReq_mshr_miss_latency::realview.ethernet 201000 # number of WriteReq MSHR miss cycles system.iocache.WriteReq_mshr_miss_latency::total 201000 # number of WriteReq MSHR miss cycles -system.iocache.WriteLineReq_mshr_miss_latency::realview.ide 8071216147 # number of WriteLineReq MSHR miss cycles -system.iocache.WriteLineReq_mshr_miss_latency::total 8071216147 # number of WriteLineReq MSHR miss cycles -system.iocache.demand_mshr_miss_latency::realview.ethernet 3421000 # number of demand (read+write) MSHR miss cycles -system.iocache.demand_mshr_miss_latency::realview.ide 1183000168 # number of demand (read+write) MSHR miss cycles -system.iocache.demand_mshr_miss_latency::total 1186421168 # number of demand (read+write) MSHR miss cycles -system.iocache.overall_mshr_miss_latency::realview.ethernet 3421000 # number of overall MSHR miss cycles -system.iocache.overall_mshr_miss_latency::realview.ide 1183000168 # number of overall MSHR miss cycles -system.iocache.overall_mshr_miss_latency::total 1186421168 # number of overall MSHR miss cycles +system.iocache.WriteLineReq_mshr_miss_latency::realview.ide 8073599158 # number of WriteLineReq MSHR miss cycles +system.iocache.WriteLineReq_mshr_miss_latency::total 8073599158 # number of WriteLineReq MSHR miss cycles +system.iocache.demand_mshr_miss_latency::realview.ethernet 3421500 # number of demand (read+write) MSHR miss cycles +system.iocache.demand_mshr_miss_latency::realview.ide 1175769141 # number of demand (read+write) MSHR miss cycles +system.iocache.demand_mshr_miss_latency::total 1179190641 # number of demand (read+write) MSHR miss cycles +system.iocache.overall_mshr_miss_latency::realview.ethernet 3421500 # number of overall MSHR miss cycles +system.iocache.overall_mshr_miss_latency::realview.ide 1175769141 # number of overall MSHR miss cycles +system.iocache.overall_mshr_miss_latency::total 1179190641 # number of overall MSHR miss cycles system.iocache.ReadReq_mshr_miss_rate::realview.ethernet 1 # mshr miss rate for ReadReq accesses system.iocache.ReadReq_mshr_miss_rate::realview.ide 1 # mshr miss rate for ReadReq accesses system.iocache.ReadReq_mshr_miss_rate::total 1 # mshr miss rate for ReadReq accesses @@ -1499,308 +1499,308 @@ system.iocache.demand_mshr_miss_rate::total 1 # system.iocache.overall_mshr_miss_rate::realview.ethernet 1 # mshr miss rate for overall accesses system.iocache.overall_mshr_miss_rate::realview.ide 1 # mshr miss rate for overall accesses system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses -system.iocache.ReadReq_avg_mshr_miss_latency::realview.ethernet 87027.027027 # average ReadReq mshr miss latency -system.iocache.ReadReq_avg_mshr_miss_latency::realview.ide 133959.932963 # average ReadReq mshr miss latency -system.iocache.ReadReq_avg_mshr_miss_latency::total 133764.114569 # average ReadReq mshr miss latency +system.iocache.ReadReq_avg_mshr_miss_latency::realview.ethernet 87040.540541 # average ReadReq mshr miss latency +system.iocache.ReadReq_avg_mshr_miss_latency::realview.ide 132810.249746 # average ReadReq mshr miss latency +system.iocache.ReadReq_avg_mshr_miss_latency::total 132619.757143 # average ReadReq mshr miss latency system.iocache.WriteReq_avg_mshr_miss_latency::realview.ethernet 67000 # average WriteReq mshr miss latency system.iocache.WriteReq_avg_mshr_miss_latency::total 67000 # average WriteReq mshr miss latency -system.iocache.WriteLineReq_avg_mshr_miss_latency::realview.ide 75669.543117 # average WriteLineReq mshr miss latency -system.iocache.WriteLineReq_avg_mshr_miss_latency::total 75669.543117 # average WriteLineReq mshr miss latency -system.iocache.demand_avg_mshr_miss_latency::realview.ethernet 85525 # average overall mshr miss latency -system.iocache.demand_avg_mshr_miss_latency::realview.ide 133959.932963 # average overall mshr miss latency -system.iocache.demand_avg_mshr_miss_latency::total 133741.536242 # average overall mshr miss latency -system.iocache.overall_avg_mshr_miss_latency::realview.ethernet 85525 # average overall mshr miss latency -system.iocache.overall_avg_mshr_miss_latency::realview.ide 133959.932963 # average overall mshr miss latency -system.iocache.overall_avg_mshr_miss_latency::total 133741.536242 # average overall mshr miss latency +system.iocache.WriteLineReq_avg_mshr_miss_latency::realview.ide 75691.884403 # average WriteLineReq mshr miss latency +system.iocache.WriteLineReq_avg_mshr_miss_latency::total 75691.884403 # average WriteLineReq mshr miss latency +system.iocache.demand_avg_mshr_miss_latency::realview.ethernet 85537.500000 # average overall mshr miss latency +system.iocache.demand_avg_mshr_miss_latency::realview.ide 132810.249746 # average overall mshr miss latency +system.iocache.demand_avg_mshr_miss_latency::total 132597.620713 # average overall mshr miss latency +system.iocache.overall_avg_mshr_miss_latency::realview.ethernet 85537.500000 # average overall mshr miss latency +system.iocache.overall_avg_mshr_miss_latency::realview.ide 132810.249746 # average overall mshr miss latency +system.iocache.overall_avg_mshr_miss_latency::total 132597.620713 # average overall mshr miss latency system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate -system.l2c.tags.replacements 989396 # number of replacements -system.l2c.tags.tagsinuse 65299.098652 # Cycle average of tags in use -system.l2c.tags.total_refs 41673385 # Total number of references to valid blocks. -system.l2c.tags.sampled_refs 1051747 # Sample count of references to valid blocks. -system.l2c.tags.avg_refs 39.623013 # Average number of references to valid blocks. -system.l2c.tags.warmup_cycle 56075802500 # Cycle when the warmup percentage was hit. -system.l2c.tags.occ_blocks::writebacks 37757.667550 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu0.dtb.walker 108.548487 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu0.itb.walker 160.943912 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu0.inst 3976.741383 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu0.data 9619.817220 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu1.dtb.walker 97.192514 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu1.itb.walker 146.379867 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu1.inst 4603.768547 # Average occupied blocks per requestor -system.l2c.tags.occ_blocks::cpu1.data 8828.039172 # Average occupied blocks per requestor -system.l2c.tags.occ_percent::writebacks 0.576136 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu0.dtb.walker 0.001656 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu0.itb.walker 0.002456 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu0.inst 0.060680 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu0.data 0.146787 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu1.dtb.walker 0.001483 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu1.itb.walker 0.002234 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu1.inst 0.070248 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::cpu1.data 0.134705 # Average percentage of cache occupancy -system.l2c.tags.occ_percent::total 0.996385 # Average percentage of cache occupancy -system.l2c.tags.occ_task_id_blocks::1023 252 # Occupied blocks per task id -system.l2c.tags.occ_task_id_blocks::1024 62099 # Occupied blocks per task id -system.l2c.tags.age_task_id_blocks_1023::4 252 # Occupied blocks per task id -system.l2c.tags.age_task_id_blocks_1024::0 36 # Occupied blocks per task id -system.l2c.tags.age_task_id_blocks_1024::1 413 # Occupied blocks per task id -system.l2c.tags.age_task_id_blocks_1024::2 2415 # Occupied blocks per task id -system.l2c.tags.age_task_id_blocks_1024::3 5492 # Occupied blocks per task id -system.l2c.tags.age_task_id_blocks_1024::4 53743 # Occupied blocks per task id -system.l2c.tags.occ_task_id_percent::1023 0.003845 # Percentage of cache occupancy per task id -system.l2c.tags.occ_task_id_percent::1024 0.947556 # Percentage of cache occupancy per task id -system.l2c.tags.tag_accesses 372018005 # Number of tag accesses -system.l2c.tags.data_accesses 372018005 # Number of data accesses -system.l2c.ReadReq_hits::cpu0.dtb.walker 204641 # number of ReadReq hits -system.l2c.ReadReq_hits::cpu0.itb.walker 155167 # number of ReadReq hits -system.l2c.ReadReq_hits::cpu1.dtb.walker 205544 # number of ReadReq hits -system.l2c.ReadReq_hits::cpu1.itb.walker 156704 # number of ReadReq hits -system.l2c.ReadReq_hits::total 722056 # number of ReadReq hits -system.l2c.WritebackDirty_hits::writebacks 7232763 # number of WritebackDirty hits -system.l2c.WritebackDirty_hits::total 7232763 # number of WritebackDirty hits -system.l2c.WritebackClean_hits::writebacks 13372479 # number of WritebackClean hits -system.l2c.WritebackClean_hits::total 13372479 # number of WritebackClean hits -system.l2c.UpgradeReq_hits::cpu0.data 4450 # number of UpgradeReq hits -system.l2c.UpgradeReq_hits::cpu1.data 4428 # number of UpgradeReq hits -system.l2c.UpgradeReq_hits::total 8878 # number of UpgradeReq hits -system.l2c.ReadExReq_hits::cpu0.data 799766 # number of ReadExReq hits -system.l2c.ReadExReq_hits::cpu1.data 788996 # number of ReadExReq hits -system.l2c.ReadExReq_hits::total 1588762 # number of ReadExReq hits -system.l2c.ReadCleanReq_hits::cpu0.inst 6672024 # number of ReadCleanReq hits -system.l2c.ReadCleanReq_hits::cpu1.inst 6632136 # number of ReadCleanReq hits -system.l2c.ReadCleanReq_hits::total 13304160 # number of ReadCleanReq hits -system.l2c.ReadSharedReq_hits::cpu0.data 2959925 # number of ReadSharedReq hits -system.l2c.ReadSharedReq_hits::cpu1.data 2932956 # number of ReadSharedReq hits -system.l2c.ReadSharedReq_hits::total 5892881 # number of ReadSharedReq hits -system.l2c.InvalidateReq_hits::cpu0.data 376779 # number of InvalidateReq hits -system.l2c.InvalidateReq_hits::cpu1.data 366298 # number of InvalidateReq hits -system.l2c.InvalidateReq_hits::total 743077 # number of InvalidateReq hits -system.l2c.demand_hits::cpu0.dtb.walker 204641 # number of demand (read+write) hits -system.l2c.demand_hits::cpu0.itb.walker 155167 # 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number of overall hits -system.l2c.overall_hits::cpu1.inst 6632136 # number of overall hits -system.l2c.overall_hits::cpu1.data 3721952 # number of overall hits -system.l2c.overall_hits::total 21507859 # number of overall hits -system.l2c.ReadReq_misses::cpu0.dtb.walker 1093 # number of ReadReq misses -system.l2c.ReadReq_misses::cpu0.itb.walker 1173 # number of ReadReq misses -system.l2c.ReadReq_misses::cpu1.dtb.walker 925 # number of ReadReq misses -system.l2c.ReadReq_misses::cpu1.itb.walker 1016 # number of ReadReq misses -system.l2c.ReadReq_misses::total 4207 # number of ReadReq misses -system.l2c.UpgradeReq_misses::cpu0.data 16132 # number of UpgradeReq misses -system.l2c.UpgradeReq_misses::cpu1.data 16422 # number of UpgradeReq misses -system.l2c.UpgradeReq_misses::total 32554 # number of UpgradeReq misses +system.l2c.tags.replacements 1026360 # number of replacements +system.l2c.tags.tagsinuse 65258.201118 # Cycle average of tags in use +system.l2c.tags.total_refs 41749797 # Total number of references to valid blocks. +system.l2c.tags.sampled_refs 1088957 # Sample count of references to valid blocks. +system.l2c.tags.avg_refs 38.339252 # Average number of references to valid blocks. +system.l2c.tags.warmup_cycle 12386120500 # Cycle when the warmup percentage was hit. +system.l2c.tags.occ_blocks::writebacks 37949.534950 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu0.dtb.walker 104.286779 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu0.itb.walker 159.329733 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu0.inst 4753.488207 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu0.data 9126.220322 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu1.dtb.walker 118.614839 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu1.itb.walker 183.809686 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu1.inst 3411.314898 # Average occupied blocks per requestor +system.l2c.tags.occ_blocks::cpu1.data 9451.601704 # Average occupied blocks per requestor +system.l2c.tags.occ_percent::writebacks 0.579064 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu0.dtb.walker 0.001591 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu0.itb.walker 0.002431 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu0.inst 0.072532 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu0.data 0.139255 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu1.dtb.walker 0.001810 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu1.itb.walker 0.002805 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu1.inst 0.052053 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::cpu1.data 0.144220 # Average percentage of cache occupancy +system.l2c.tags.occ_percent::total 0.995761 # Average percentage of cache occupancy +system.l2c.tags.occ_task_id_blocks::1023 220 # Occupied blocks per task id +system.l2c.tags.occ_task_id_blocks::1024 62377 # Occupied blocks per task id +system.l2c.tags.age_task_id_blocks_1023::4 220 # Occupied blocks per task id +system.l2c.tags.age_task_id_blocks_1024::0 29 # Occupied blocks per task id +system.l2c.tags.age_task_id_blocks_1024::1 392 # Occupied blocks per task id +system.l2c.tags.age_task_id_blocks_1024::2 2461 # Occupied blocks per task id +system.l2c.tags.age_task_id_blocks_1024::3 5447 # Occupied blocks per task id +system.l2c.tags.age_task_id_blocks_1024::4 54048 # Occupied blocks per task id +system.l2c.tags.occ_task_id_percent::1023 0.003357 # Percentage of cache occupancy per task id +system.l2c.tags.occ_task_id_percent::1024 0.951797 # Percentage of cache occupancy per task id +system.l2c.tags.tag_accesses 372663502 # Number of tag accesses +system.l2c.tags.data_accesses 372663502 # Number of data accesses +system.l2c.ReadReq_hits::cpu0.dtb.walker 212373 # number of ReadReq hits +system.l2c.ReadReq_hits::cpu0.itb.walker 162936 # number of ReadReq hits +system.l2c.ReadReq_hits::cpu1.dtb.walker 207984 # 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average overall mshr miss latency +system.l2c.demand_avg_mshr_miss_latency::cpu1.inst 122573.833654 # average overall mshr miss latency +system.l2c.demand_avg_mshr_miss_latency::cpu1.data 122130.138582 # average overall mshr miss latency +system.l2c.demand_avg_mshr_miss_latency::total 122127.735764 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu0.dtb.walker 125328.205128 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu0.itb.walker 128312.251392 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu0.inst 122043.131661 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu0.data 121991.405875 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu1.dtb.walker 125575.859179 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu1.itb.walker 129240.345111 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu1.inst 122573.833654 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::cpu1.data 122130.138582 # average overall mshr miss latency +system.l2c.overall_avg_mshr_miss_latency::total 122127.735764 # average overall mshr miss latency system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu0.inst 113535.332245 # average ReadReq mshr uncacheable latency -system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 170140.289732 # average ReadReq mshr uncacheable latency +system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 173032.961904 # average ReadReq mshr uncacheable latency system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu1.inst 113607.771922 # average ReadReq mshr uncacheable latency -system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 172675.851645 # average ReadReq mshr uncacheable latency -system.l2c.ReadReq_avg_mshr_uncacheable_latency::total 138953.224862 # average ReadReq mshr uncacheable latency -system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu0.data 167457.710252 # average WriteReq mshr uncacheable latency -system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu1.data 178373.064924 # average WriteReq mshr uncacheable latency -system.l2c.WriteReq_avg_mshr_uncacheable_latency::total 172959.266621 # average WriteReq mshr uncacheable latency +system.l2c.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 169747.690636 # average ReadReq mshr uncacheable latency +system.l2c.ReadReq_avg_mshr_uncacheable_latency::total 138947.871247 # average ReadReq mshr uncacheable latency +system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu0.data 171213.254665 # average WriteReq mshr uncacheable latency +system.l2c.WriteReq_avg_mshr_uncacheable_latency::cpu1.data 174995.577507 # average WriteReq mshr uncacheable latency +system.l2c.WriteReq_avg_mshr_uncacheable_latency::total 172951.199976 # average WriteReq mshr uncacheable latency system.l2c.overall_avg_mshr_uncacheable_latency::cpu0.inst 113535.332245 # average overall mshr uncacheable latency -system.l2c.overall_avg_mshr_uncacheable_latency::cpu0.data 168790.116209 # average overall mshr uncacheable latency +system.l2c.overall_avg_mshr_uncacheable_latency::cpu0.data 172095.345154 # average overall mshr uncacheable latency system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.inst 113607.771922 # average overall mshr uncacheable latency -system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 175506.712293 # average overall mshr uncacheable latency -system.l2c.overall_avg_mshr_uncacheable_latency::total 149323.449318 # average overall mshr uncacheable latency +system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 172283.710845 # average overall mshr uncacheable latency +system.l2c.overall_avg_mshr_uncacheable_latency::total 149317.320740 # average overall mshr uncacheable latency system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate -system.membus.trans_dist::ReadReq 76825 # Transaction distribution -system.membus.trans_dist::ReadResp 376385 # Transaction distribution -system.membus.trans_dist::WriteReq 33707 # Transaction distribution -system.membus.trans_dist::WriteResp 33707 # Transaction distribution -system.membus.trans_dist::WritebackDirty 947057 # Transaction distribution -system.membus.trans_dist::CleanEvict 156816 # Transaction distribution -system.membus.trans_dist::UpgradeReq 33121 # Transaction distribution +system.membus.trans_dist::ReadReq 76829 # Transaction distribution +system.membus.trans_dist::ReadResp 386652 # Transaction distribution +system.membus.trans_dist::WriteReq 33709 # Transaction distribution +system.membus.trans_dist::WriteResp 33709 # Transaction distribution +system.membus.trans_dist::WritebackDirty 978778 # Transaction distribution +system.membus.trans_dist::CleanEvict 162070 # Transaction distribution +system.membus.trans_dist::UpgradeReq 33685 # Transaction distribution system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution system.membus.trans_dist::UpgradeResp 7 # Transaction distribution -system.membus.trans_dist::ReadExReq 788585 # Transaction distribution -system.membus.trans_dist::ReadExResp 788585 # Transaction distribution -system.membus.trans_dist::ReadSharedReq 299560 # Transaction distribution -system.membus.trans_dist::InvalidateReq 106664 # Transaction distribution +system.membus.trans_dist::ReadExReq 334406 # Transaction distribution +system.membus.trans_dist::ReadExResp 334406 # Transaction distribution +system.membus.trans_dist::ReadSharedReq 309823 # Transaction distribution +system.membus.trans_dist::InvalidateReq 587971 # Transaction distribution system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 122704 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.l2c.mem_side::system.realview.nvmem.port 58 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.l2c.mem_side::system.realview.gic.pio 6924 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 3270790 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.l2c.mem_side::total 3400476 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 237068 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.iocache.mem_side::total 237068 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::total 3637544 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.l2c.mem_side::system.realview.gic.pio 6936 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 2901743 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.l2c.mem_side::total 3031441 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 237241 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.iocache.mem_side::total 237241 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 3268682 # Packet count per connected master and slave (bytes) system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 155834 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.l2c.mem_side::system.realview.nvmem.port 132 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.l2c.mem_side::system.realview.gic.pio 13848 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 123012320 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.l2c.mem_side::total 123182134 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 7211648 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.iocache.mem_side::total 7211648 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size::total 130393782 # Cumulative packet size per connected master and slave (bytes) -system.membus.snoops 3477 # Total snoops (count) -system.membus.snoop_fanout::samples 2442384 # Request fanout histogram +system.membus.pkt_size_system.l2c.mem_side::system.realview.gic.pio 13872 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 96630432 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.l2c.mem_side::total 96800270 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 7220224 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.iocache.mem_side::total 7220224 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size::total 104020494 # Cumulative packet size per connected master and slave (bytes) +system.membus.snoops 3365 # Total snoops (count) +system.membus.snoop_fanout::samples 2517308 # Request fanout histogram system.membus.snoop_fanout::mean 1 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram -system.membus.snoop_fanout::1 2442384 100.00% 100.00% # Request fanout histogram +system.membus.snoop_fanout::1 2517308 100.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::min_value 1 # Request fanout histogram system.membus.snoop_fanout::max_value 1 # Request fanout histogram -system.membus.snoop_fanout::total 2442384 # Request fanout histogram -system.membus.reqLayer0.occupancy 106884000 # Layer occupancy (ticks) +system.membus.snoop_fanout::total 2517308 # Request fanout histogram +system.membus.reqLayer0.occupancy 106894000 # Layer occupancy (ticks) system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) system.membus.reqLayer1.occupancy 41500 # Layer occupancy (ticks) system.membus.reqLayer1.utilization 0.0 # Layer utilization (%) -system.membus.reqLayer2.occupancy 5641500 # Layer occupancy (ticks) +system.membus.reqLayer2.occupancy 5659000 # Layer occupancy (ticks) system.membus.reqLayer2.utilization 0.0 # Layer utilization (%) -system.membus.reqLayer5.occupancy 6231197843 # Layer occupancy (ticks) +system.membus.reqLayer5.occupancy 6490935886 # Layer occupancy (ticks) system.membus.reqLayer5.utilization 0.0 # Layer utilization (%) -system.membus.respLayer2.occupancy 5914461286 # Layer occupancy (ticks) +system.membus.respLayer2.occupancy 3578419285 # Layer occupancy (ticks) system.membus.respLayer2.utilization 0.0 # Layer utilization (%) -system.membus.respLayer3.occupancy 44673503 # Layer occupancy (ticks) +system.membus.respLayer3.occupancy 44788681 # Layer occupancy (ticks) system.membus.respLayer3.utilization 0.0 # Layer utilization (%) system.realview.dcc.osc_cpu.clock 16667 # Clock period in ticks system.realview.dcc.osc_ddr.clock 25000 # Clock period in ticks @@ -2124,61 +2120,61 @@ system.realview.mcc.osc_clcd.clock 42105 # Cl system.realview.mcc.osc_mcc.clock 20000 # Clock period in ticks system.realview.mcc.osc_peripheral.clock 41667 # Clock period in ticks system.realview.mcc.osc_system_bus.clock 41667 # Clock period in ticks -system.toL2Bus.snoop_filter.tot_requests 45780480 # Total number of requests made to the snoop filter. -system.toL2Bus.snoop_filter.hit_single_requests 23175972 # Number of requests hitting in the snoop filter with a single holder of the requested data. -system.toL2Bus.snoop_filter.hit_multi_requests 1745 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. -system.toL2Bus.snoop_filter.tot_snoops 2220 # Total number of snoops made to the snoop filter. -system.toL2Bus.snoop_filter.hit_single_snoops 2220 # Number of snoops hitting in the snoop filter with a single holder of the requested data. +system.toL2Bus.snoop_filter.tot_requests 45897959 # Total number of requests made to the snoop filter. +system.toL2Bus.snoop_filter.hit_single_requests 23236926 # Number of requests hitting in the snoop filter with a single holder of the requested data. +system.toL2Bus.snoop_filter.hit_multi_requests 1749 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. +system.toL2Bus.snoop_filter.tot_snoops 2692 # Total number of snoops made to the snoop filter. +system.toL2Bus.snoop_filter.hit_single_snoops 2692 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. -system.toL2Bus.trans_dist::ReadReq 1179802 # Transaction distribution -system.toL2Bus.trans_dist::ReadResp 20664144 # Transaction distribution -system.toL2Bus.trans_dist::WriteReq 33707 # Transaction distribution -system.toL2Bus.trans_dist::WriteResp 33707 # Transaction distribution -system.toL2Bus.trans_dist::WritebackDirty 8179867 # Transaction distribution -system.toL2Bus.trans_dist::WritebackClean 13374068 # Transaction distribution -system.toL2Bus.trans_dist::CleanEvict 2154454 # Transaction distribution -system.toL2Bus.trans_dist::UpgradeReq 41435 # Transaction distribution +system.toL2Bus.trans_dist::ReadReq 1189053 # Transaction distribution +system.toL2Bus.trans_dist::ReadResp 20703336 # Transaction distribution +system.toL2Bus.trans_dist::WriteReq 33709 # Transaction distribution +system.toL2Bus.trans_dist::WriteResp 33709 # Transaction distribution +system.toL2Bus.trans_dist::WritebackDirty 8290323 # Transaction distribution +system.toL2Bus.trans_dist::WritebackClean 13311280 # Transaction distribution +system.toL2Bus.trans_dist::CleanEvict 2200261 # Transaction distribution +system.toL2Bus.trans_dist::UpgradeReq 42068 # Transaction distribution system.toL2Bus.trans_dist::SCUpgradeReq 2 # Transaction distribution -system.toL2Bus.trans_dist::UpgradeResp 41437 # Transaction distribution -system.toL2Bus.trans_dist::ReadExReq 1898604 # Transaction distribution -system.toL2Bus.trans_dist::ReadExResp 1898604 # Transaction distribution -system.toL2Bus.trans_dist::ReadCleanReq 13374585 # Transaction distribution -system.toL2Bus.trans_dist::ReadSharedReq 6117809 # Transaction distribution -system.toL2Bus.trans_dist::InvalidateReq 1329048 # Transaction distribution -system.toL2Bus.trans_dist::InvalidateResp 1222384 # Transaction distribution -system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 40209488 # Packet count per connected master and slave (bytes) -system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 27907755 # Packet count per connected master and slave (bytes) -system.toL2Bus.pkt_count_system.cpu0.itb.walker.dma::system.l2c.cpu_side 753930 # Packet count per connected master and slave (bytes) -system.toL2Bus.pkt_count_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 1075310 # Packet count per connected master and slave (bytes) -system.toL2Bus.pkt_count::total 69946483 # Packet count per connected master and slave (bytes) -system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 1712086292 # Cumulative packet size per connected master and slave (bytes) -system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 975622370 # Cumulative packet size per connected master and slave (bytes) -system.toL2Bus.pkt_size_system.cpu0.itb.walker.dma::system.l2c.cpu_side 2512480 # Cumulative packet size per connected master and slave (bytes) -system.toL2Bus.pkt_size_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 3297624 # Cumulative packet size per connected master and slave (bytes) -system.toL2Bus.pkt_size::total 2693518766 # Cumulative packet size per connected master and slave (bytes) -system.toL2Bus.snoops 1597993 # Total snoops (count) -system.toL2Bus.snoop_fanout::samples 25079917 # Request fanout histogram -system.toL2Bus.snoop_fanout::mean 0.021333 # Request fanout histogram -system.toL2Bus.snoop_fanout::stdev 0.144493 # Request fanout histogram +system.toL2Bus.trans_dist::UpgradeResp 42070 # Transaction distribution +system.toL2Bus.trans_dist::ReadExReq 1926802 # Transaction distribution +system.toL2Bus.trans_dist::ReadExResp 1926802 # Transaction distribution +system.toL2Bus.trans_dist::ReadCleanReq 13311797 # Transaction distribution +system.toL2Bus.trans_dist::ReadSharedReq 6210524 # Transaction distribution +system.toL2Bus.trans_dist::InvalidateReq 1327470 # Transaction distribution +system.toL2Bus.trans_dist::InvalidateResp 1220806 # Transaction distribution +system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 40021124 # Packet count per connected master and slave (bytes) +system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 28266989 # Packet count per connected master and slave (bytes) +system.toL2Bus.pkt_count_system.cpu0.itb.walker.dma::system.l2c.cpu_side 766613 # Packet count per connected master and slave (bytes) +system.toL2Bus.pkt_count_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 1091027 # Packet count per connected master and slave (bytes) +system.toL2Bus.pkt_count::total 70145753 # Packet count per connected master and slave (bytes) +system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 1704049428 # Cumulative packet size per connected master and slave (bytes) +system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 988401530 # Cumulative packet size per connected master and slave (bytes) +system.toL2Bus.pkt_size_system.cpu0.itb.walker.dma::system.l2c.cpu_side 2581568 # Cumulative packet size per connected master and slave (bytes) +system.toL2Bus.pkt_size_system.cpu0.dtb.walker.dma::system.l2c.cpu_side 3381760 # Cumulative packet size per connected master and slave (bytes) +system.toL2Bus.pkt_size::total 2698414286 # Cumulative packet size per connected master and slave (bytes) +system.toL2Bus.snoops 1625114 # Total snoops (count) +system.toL2Bus.snoop_fanout::samples 25183319 # Request fanout histogram +system.toL2Bus.snoop_fanout::mean 0.021416 # Request fanout histogram +system.toL2Bus.snoop_fanout::stdev 0.144767 # Request fanout histogram system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -system.toL2Bus.snoop_fanout::0 24544878 97.87% 97.87% # Request fanout histogram -system.toL2Bus.snoop_fanout::1 535039 2.13% 100.00% # Request fanout histogram +system.toL2Bus.snoop_fanout::0 24643989 97.86% 97.86% # Request fanout histogram +system.toL2Bus.snoop_fanout::1 539330 2.14% 100.00% # Request fanout histogram system.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram system.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram -system.toL2Bus.snoop_fanout::total 25079917 # Request fanout histogram -system.toL2Bus.reqLayer0.occupancy 43855145000 # Layer occupancy (ticks) +system.toL2Bus.snoop_fanout::total 25183319 # Request fanout histogram +system.toL2Bus.reqLayer0.occupancy 43932563500 # Layer occupancy (ticks) system.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%) -system.toL2Bus.snoopLayer0.occupancy 1530888 # Layer occupancy (ticks) +system.toL2Bus.snoopLayer0.occupancy 1579898 # Layer occupancy (ticks) system.toL2Bus.snoopLayer0.utilization 0.0 # Layer utilization (%) -system.toL2Bus.respLayer0.occupancy 20105002500 # Layer occupancy (ticks) +system.toL2Bus.respLayer0.occupancy 20010820500 # Layer occupancy (ticks) system.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) -system.toL2Bus.respLayer1.occupancy 12693791976 # Layer occupancy (ticks) +system.toL2Bus.respLayer1.occupancy 12874657982 # Layer occupancy (ticks) system.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.toL2Bus.respLayer2.occupancy 439870000 # Layer occupancy (ticks) +system.toL2Bus.respLayer2.occupancy 443917000 # Layer occupancy (ticks) system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%) -system.toL2Bus.respLayer3.occupancy 663107000 # Layer occupancy (ticks) +system.toL2Bus.respLayer3.occupancy 668307000 # Layer occupancy (ticks) system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%) ---------- End Simulation Statistics ---------- |