diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini')
-rw-r--r-- | tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini index 2f7786e68..6bbe8c080 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini @@ -27,6 +27,7 @@ load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.mem_ctrls +mmap_using_noreserve=false num_work_ids=16 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh smbios_table=system.smbios_table @@ -701,9 +702,11 @@ sys=system type=NoncoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=1 +frontend_latency=2 +response_latency=2 use_default_range=false -width=8 +width=16 default=system.pc.pciconfig.pio master=system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist1.pio system.pc.i_dont_exist2.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.ruby.l1_cntrl0.sequencer.pio_slave_port system.ruby.l1_cntrl1.sequencer.pio_slave_port system.ruby.io_controller.dma_sequencer.slave slave=system.pc.south_bridge.io_apic.int_master system.ruby.l1_cntrl0.sequencer.pio_master_port system.ruby.l1_cntrl0.sequencer.mem_master_port system.ruby.l1_cntrl1.sequencer.pio_master_port system.ruby.l1_cntrl1.sequencer.mem_master_port @@ -735,7 +738,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 @@ -1314,6 +1317,7 @@ pio=system.iobus.master[8] [system.ruby] type=RubySystem children=clk_domain dir_cntrl0 dma_cntrl0 io_controller l1_cntrl0 l1_cntrl1 l2_cntrl0 memctrl_clk_domain network +access_backing_store=false all_instructions=false block_size_bytes=64 clk_domain=system.ruby.clk_domain @@ -1490,7 +1494,6 @@ unit_filter=8 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu_clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 @@ -1583,7 +1586,6 @@ unit_filter=8 [system.ruby.l1_cntrl1.sequencer] type=RubySequencer -access_backing_store=false clk_domain=system.cpu_clk_domain dcache=system.ruby.l1_cntrl1.L1Dcache deadlock_threshold=500000 @@ -1861,7 +1863,6 @@ version= [system.sys_port_proxy] type=RubyPortProxy -access_backing_store=false clk_domain=system.clk_domain eventq_index=0 ruby_system=system.ruby |