diff options
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level')
-rw-r--r-- | tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt | 1848 |
1 files changed, 932 insertions, 916 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt index b728ac0c9..92c4535bc 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt @@ -1,95 +1,95 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 5.300742 # Number of seconds simulated -sim_ticks 5300741898500 # Number of ticks simulated -final_tick 5300741898500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 5.305804 # Number of seconds simulated +sim_ticks 5305803886500 # Number of ticks simulated +final_tick 5305803886500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 268181 # Simulator instruction rate (inst/s) -host_op_rate 514172 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 13311463323 # Simulator tick rate (ticks/s) -host_mem_usage 800056 # Number of bytes of host memory used -host_seconds 398.21 # Real time elapsed on the host -sim_insts 106792132 # Number of instructions simulated -sim_ops 204747982 # Number of ops (including micro ops) simulated +host_inst_rate 199055 # Simulator instruction rate (inst/s) +host_op_rate 381625 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 9885187347 # Simulator tick rate (ticks/s) +host_mem_usage 854320 # Number of bytes of host memory used +host_seconds 536.74 # Real time elapsed on the host +sim_insts 106841423 # Number of instructions simulated +sim_ops 204834575 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks -system.mem_ctrls.bytes_read::ruby.dir_cntrl0 11447360 # Number of bytes read from this memory -system.mem_ctrls.bytes_read::total 11447360 # Number of bytes read from this memory -system.mem_ctrls.bytes_written::ruby.dir_cntrl0 9142976 # Number of bytes written to this memory -system.mem_ctrls.bytes_written::total 9142976 # Number of bytes written to this memory -system.mem_ctrls.num_reads::ruby.dir_cntrl0 178865 # Number of read requests responded to by this memory -system.mem_ctrls.num_reads::total 178865 # Number of read requests responded to by this memory -system.mem_ctrls.num_writes::ruby.dir_cntrl0 142859 # Number of write requests responded to by this memory -system.mem_ctrls.num_writes::total 142859 # Number of write requests responded to by this memory -system.mem_ctrls.bw_read::ruby.dir_cntrl0 2159577 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_read::total 2159577 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::ruby.dir_cntrl0 1724848 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::total 1724848 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_total::ruby.dir_cntrl0 3884425 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.bw_total::total 3884425 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.readReqs 178865 # Number of read requests accepted -system.mem_ctrls.writeReqs 142859 # Number of write requests accepted -system.mem_ctrls.readBursts 178865 # Number of DRAM read bursts, including those serviced by the write queue -system.mem_ctrls.writeBursts 142859 # Number of DRAM write bursts, including those merged in the write queue -system.mem_ctrls.bytesReadDRAM 11390720 # Total number of bytes read from DRAM -system.mem_ctrls.bytesReadWrQ 56640 # Total number of bytes read from write queue -system.mem_ctrls.bytesWritten 9134848 # Total number of bytes written to DRAM -system.mem_ctrls.bytesReadSys 11447360 # Total read bytes from the system interface side -system.mem_ctrls.bytesWrittenSys 9142976 # Total written bytes from the system interface side -system.mem_ctrls.servicedByWrQ 885 # Number of DRAM read bursts serviced by the write queue -system.mem_ctrls.mergedWrBursts 106 # Number of DRAM write bursts merged with an existing one +system.mem_ctrls.bytes_read::ruby.dir_cntrl0 11434048 # Number of bytes read from this memory +system.mem_ctrls.bytes_read::total 11434048 # Number of bytes read from this memory +system.mem_ctrls.bytes_written::ruby.dir_cntrl0 9128256 # Number of bytes written to this memory +system.mem_ctrls.bytes_written::total 9128256 # Number of bytes written to this memory +system.mem_ctrls.num_reads::ruby.dir_cntrl0 178657 # Number of read requests responded to by this memory +system.mem_ctrls.num_reads::total 178657 # Number of read requests responded to by this memory +system.mem_ctrls.num_writes::ruby.dir_cntrl0 142629 # Number of write requests responded to by this memory +system.mem_ctrls.num_writes::total 142629 # Number of write requests responded to by this memory +system.mem_ctrls.bw_read::ruby.dir_cntrl0 2155008 # Total read bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_read::total 2155008 # Total read bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_write::ruby.dir_cntrl0 1720428 # Write bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_write::total 1720428 # Write bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_total::ruby.dir_cntrl0 3875436 # Total bandwidth to/from this memory (bytes/s) +system.mem_ctrls.bw_total::total 3875436 # Total bandwidth to/from this memory (bytes/s) +system.mem_ctrls.readReqs 178657 # Number of read requests accepted +system.mem_ctrls.writeReqs 142629 # Number of write requests accepted +system.mem_ctrls.readBursts 178657 # Number of DRAM read bursts, including those serviced by the write queue +system.mem_ctrls.writeBursts 142629 # Number of DRAM write bursts, including those merged in the write queue +system.mem_ctrls.bytesReadDRAM 11379712 # Total number of bytes read from DRAM +system.mem_ctrls.bytesReadWrQ 54336 # Total number of bytes read from write queue +system.mem_ctrls.bytesWritten 9119680 # Total number of bytes written to DRAM +system.mem_ctrls.bytesReadSys 11434048 # Total read bytes from the system interface side +system.mem_ctrls.bytesWrittenSys 9128256 # Total written bytes from the system interface side +system.mem_ctrls.servicedByWrQ 849 # Number of DRAM read bursts serviced by the write queue +system.mem_ctrls.mergedWrBursts 104 # Number of DRAM write bursts merged with an existing one system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write -system.mem_ctrls.perBankRdBursts::0 11083 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::1 10466 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::2 10673 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::3 10751 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::4 11479 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::5 11934 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::6 10746 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::7 10510 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::8 10984 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::9 10978 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::10 10728 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::11 13966 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::12 10998 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::13 10695 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::14 11146 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::15 10843 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::0 9192 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::1 8887 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::2 8721 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::3 8884 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::4 9584 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::5 9646 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::6 8803 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::7 8544 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::8 8749 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::9 8837 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::10 8942 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::11 8982 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::12 8616 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::13 8535 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::14 8942 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::15 8868 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::0 10773 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::1 10609 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::2 10875 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::3 11019 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::4 11847 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::5 12404 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::6 11308 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::7 10254 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::8 10790 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::9 10382 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::10 10431 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::11 13895 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::12 11043 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::13 10450 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::14 11056 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::15 10672 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::0 8646 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::1 8740 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::2 8909 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::3 9072 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::4 9699 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::5 9645 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::6 8889 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::7 8365 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::8 8684 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::9 8653 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::10 8512 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::11 9107 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::12 8716 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::13 8645 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::14 9206 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::15 9007 # Per bank write bursts system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry -system.mem_ctrls.totGap 5300741764000 # Total gap between requests +system.mem_ctrls.totGap 5305803752000 # Total gap between requests system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2) -system.mem_ctrls.readPktSize::6 178865 # Read request sizes (log2) +system.mem_ctrls.readPktSize::6 178657 # Read request sizes (log2) system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) -system.mem_ctrls.writePktSize::6 142859 # Write request sizes (log2) -system.mem_ctrls.rdQLenPdf::0 177944 # What read queue length does an incoming req see -system.mem_ctrls.rdQLenPdf::1 36 # What read queue length does an incoming req see +system.mem_ctrls.writePktSize::6 142629 # Write request sizes (log2) +system.mem_ctrls.rdQLenPdf::0 177742 # What read queue length does an incoming req see +system.mem_ctrls.rdQLenPdf::1 66 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see @@ -135,38 +135,38 @@ system.mem_ctrls.wrQLenPdf::11 1 # Wh system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::15 2042 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::16 2762 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::17 8528 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::18 9126 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::19 8582 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::20 9159 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::21 9214 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::22 8343 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::23 9016 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::24 9104 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::25 8438 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::26 8502 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::27 8352 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::28 8474 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::29 8065 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::30 8107 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::31 8180 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::32 7958 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::33 136 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::34 116 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::35 100 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::36 96 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::37 84 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::38 72 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::39 61 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::40 49 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::41 32 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::42 21 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::43 11 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::15 2048 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::16 2805 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::17 8516 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::18 9095 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::19 8606 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::20 9164 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::21 9192 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::22 8373 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::23 9017 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::24 9032 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::25 8415 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::26 8498 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::27 8325 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::28 8422 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::29 8038 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::30 8077 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::31 8151 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::32 7943 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::33 129 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::34 121 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::35 110 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::36 90 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::37 88 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::38 71 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::39 56 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::40 51 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::41 36 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::42 23 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::43 13 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::44 5 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::45 2 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::46 1 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see @@ -184,74 +184,73 @@ system.mem_ctrls.wrQLenPdf::60 0 # Wh system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.mem_ctrls.bytesPerActivate::samples 60353 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::mean 340.090865 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::gmean 200.552614 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::stdev 345.449556 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::0-127 20341 33.70% 33.70% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::128-255 14451 23.94% 57.65% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::256-383 6322 10.48% 68.12% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::384-511 3381 5.60% 73.72% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::512-639 2729 4.52% 78.25% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::640-767 1822 3.02% 81.27% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::768-895 1379 2.28% 83.55% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::896-1023 1383 2.29% 85.84% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::1024-1151 8545 14.16% 100.00% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::total 60353 # Bytes accessed per row activation -system.mem_ctrls.rdPerTurnAround::samples 7902 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::mean 22.522399 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::stdev 318.068462 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::0-1023 7896 99.92% 99.92% # Reads before turning the bus around for writes +system.mem_ctrls.bytesPerActivate::samples 60600 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::mean 338.272739 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::gmean 199.847297 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::stdev 343.861949 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::0-127 20364 33.60% 33.60% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::128-255 14670 24.21% 57.81% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::256-383 6315 10.42% 68.23% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::384-511 3448 5.69% 73.92% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::512-639 2734 4.51% 78.43% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::640-767 1855 3.06% 81.50% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::768-895 1401 2.31% 83.81% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::896-1023 1433 2.36% 86.17% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::1024-1151 8380 13.83% 100.00% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::total 60600 # Bytes accessed per row activation +system.mem_ctrls.rdPerTurnAround::samples 7887 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::mean 22.539115 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::stdev 318.374099 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::0-1023 7881 99.92% 99.92% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::1024-2047 2 0.03% 99.95% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::2048-3071 2 0.03% 99.97% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::10240-11263 1 0.01% 99.99% # Reads before turning the bus around for writes system.mem_ctrls.rdPerTurnAround::25600-26623 1 0.01% 100.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::total 7902 # Reads before turning the bus around for writes -system.mem_ctrls.wrPerTurnAround::samples 7902 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::mean 18.062769 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::gmean 17.701265 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::stdev 4.160598 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::16 5817 73.61% 73.61% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::17 9 0.11% 73.73% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::18 164 2.08% 75.80% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::19 13 0.16% 75.97% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::20 44 0.56% 76.52% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::21 510 6.45% 82.98% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::22 151 1.91% 84.89% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::23 32 0.40% 85.29% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::24 635 8.04% 93.33% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::25 115 1.46% 94.79% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::26 6 0.08% 94.86% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::27 14 0.18% 95.04% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::28 297 3.76% 98.80% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::29 8 0.10% 98.90% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::30 4 0.05% 98.95% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::31 6 0.08% 99.03% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::32 6 0.08% 99.10% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::33 6 0.08% 99.18% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::34 2 0.03% 99.20% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::35 4 0.05% 99.25% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::36 1 0.01% 99.27% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::37 1 0.01% 99.28% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::38 5 0.06% 99.34% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::39 3 0.04% 99.38% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::40 6 0.08% 99.46% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::41 9 0.11% 99.57% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::42 6 0.08% 99.65% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::43 4 0.05% 99.70% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::44 5 0.06% 99.76% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::45 3 0.04% 99.80% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::46 2 0.03% 99.82% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::48 5 0.06% 99.89% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::51 9 0.11% 100.00% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::total 7902 # Writes before turning the bus around for reads -system.mem_ctrls.totQLat 1958460749 # Total ticks spent queuing -system.mem_ctrls.totMemAccLat 5295585749 # Total ticks spent from burst creation until serviced by the DRAM -system.mem_ctrls.totBusLat 889900000 # Total ticks spent in databus transfers -system.mem_ctrls.avgQLat 11003.82 # Average queueing delay per DRAM burst +system.mem_ctrls.rdPerTurnAround::total 7887 # Reads before turning the bus around for writes +system.mem_ctrls.wrPerTurnAround::samples 7887 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::mean 18.067072 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::gmean 17.711824 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::stdev 4.086646 # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::16 5792 73.44% 73.44% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::17 14 0.18% 73.61% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::18 155 1.97% 75.58% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::19 18 0.23% 75.81% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::20 48 0.61% 76.42% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::21 474 6.01% 82.43% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::22 162 2.05% 84.48% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::23 48 0.61% 85.09% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::24 632 8.01% 93.10% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::25 129 1.64% 94.74% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::26 11 0.14% 94.88% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::27 12 0.15% 95.03% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::28 299 3.79% 98.82% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::29 7 0.09% 98.91% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::30 7 0.09% 99.00% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::31 8 0.10% 99.10% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::32 7 0.09% 99.19% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::33 5 0.06% 99.25% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::34 6 0.08% 99.33% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::35 3 0.04% 99.37% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::36 1 0.01% 99.38% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::37 4 0.05% 99.43% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::38 1 0.01% 99.44% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::39 3 0.04% 99.48% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::40 11 0.14% 99.62% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::41 6 0.08% 99.70% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::42 3 0.04% 99.73% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::43 1 0.01% 99.75% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::44 8 0.10% 99.85% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::45 2 0.03% 99.87% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::48 3 0.04% 99.91% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::51 7 0.09% 100.00% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::total 7887 # Writes before turning the bus around for reads +system.mem_ctrls.totQLat 1946379497 # Total ticks spent queuing +system.mem_ctrls.totMemAccLat 5280279497 # Total ticks spent from burst creation until serviced by the DRAM +system.mem_ctrls.totBusLat 889040000 # Total ticks spent in databus transfers +system.mem_ctrls.avgQLat 10946.52 # Average queueing delay per DRAM burst system.mem_ctrls.avgBusLat 5000.00 # Average bus latency per DRAM burst -system.mem_ctrls.avgMemAccLat 29753.82 # Average memory access latency per DRAM burst -system.mem_ctrls.avgRdBW 2.15 # Average DRAM read bandwidth in MiByte/s +system.mem_ctrls.avgMemAccLat 29696.52 # Average memory access latency per DRAM burst +system.mem_ctrls.avgRdBW 2.14 # Average DRAM read bandwidth in MiByte/s system.mem_ctrls.avgWrBW 1.72 # Average achieved write bandwidth in MiByte/s system.mem_ctrls.avgRdBWSys 2.16 # Average system read bandwidth in MiByte/s system.mem_ctrls.avgWrBWSys 1.72 # Average system write bandwidth in MiByte/s @@ -260,270 +259,275 @@ system.mem_ctrls.busUtil 0.03 # Da system.mem_ctrls.busUtilRead 0.02 # Data bus utilization in percentage for reads system.mem_ctrls.busUtilWrite 0.01 # Data bus utilization in percentage for writes system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing -system.mem_ctrls.avgWrQLen 27.88 # Average write queue length when enqueuing -system.mem_ctrls.readRowHits 142054 # Number of row buffer hits during reads -system.mem_ctrls.writeRowHits 118304 # Number of row buffer hits during writes -system.mem_ctrls.readRowHitRate 79.81 # Row buffer hit rate for reads -system.mem_ctrls.writeRowHitRate 82.87 # Row buffer hit rate for writes -system.mem_ctrls.avgGap 16476053.28 # Average gap between requests -system.mem_ctrls.pageHitRate 81.18 # Row buffer hit rate, read and write combined -system.mem_ctrls.memoryStateTime::IDLE 5045112796500 # Time in different power states -system.mem_ctrls.memoryStateTime::REF 177003320000 # Time in different power states -system.mem_ctrls.memoryStateTime::PRE_PDN 0 # Time in different power states -system.mem_ctrls.memoryStateTime::ACT 78625657500 # Time in different power states -system.mem_ctrls.memoryStateTime::ACT_PDN 0 # Time in different power states -system.mem_ctrls.actEnergy::0 223791120 # Energy for activate commands per rank (pJ) -system.mem_ctrls.actEnergy::1 232477560 # Energy for activate commands per rank (pJ) -system.mem_ctrls.preEnergy::0 122108250 # Energy for precharge commands per rank (pJ) -system.mem_ctrls.preEnergy::1 126847875 # Energy for precharge commands per rank (pJ) -system.mem_ctrls.readEnergy::0 683599800 # Energy for read commands per rank (pJ) -system.mem_ctrls.readEnergy::1 704636400 # Energy for read commands per rank (pJ) -system.mem_ctrls.writeEnergy::0 468251280 # Energy for write commands per rank (pJ) -system.mem_ctrls.writeEnergy::1 456652080 # Energy for write commands per rank (pJ) -system.mem_ctrls.refreshEnergy::0 346218493920 # Energy for refresh commands per rank (pJ) -system.mem_ctrls.refreshEnergy::1 346218493920 # Energy for refresh commands per rank (pJ) -system.mem_ctrls.actBackEnergy::0 148888594485 # Energy for active background per rank (pJ) -system.mem_ctrls.actBackEnergy::1 149563929060 # Energy for active background per rank (pJ) -system.mem_ctrls.preBackEnergy::0 3049839426000 # Energy for precharge background per rank (pJ) -system.mem_ctrls.preBackEnergy::1 3049247027250 # Energy for precharge background per rank (pJ) -system.mem_ctrls.totalEnergy::0 3546444264855 # Total energy per rank (pJ) -system.mem_ctrls.totalEnergy::1 3546550064145 # Total energy per rank (pJ) -system.mem_ctrls.averagePower::0 669.047128 # Core power per rank (mW) -system.mem_ctrls.averagePower::1 669.067087 # Core power per rank (mW) +system.mem_ctrls.avgWrQLen 25.29 # Average write queue length when enqueuing +system.mem_ctrls.readRowHits 141783 # Number of row buffer hits during reads +system.mem_ctrls.writeRowHits 117919 # Number of row buffer hits during writes +system.mem_ctrls.readRowHitRate 79.74 # Row buffer hit rate for reads +system.mem_ctrls.writeRowHitRate 82.74 # Row buffer hit rate for writes +system.mem_ctrls.avgGap 16514270.00 # Average gap between requests +system.mem_ctrls.pageHitRate 81.07 # Row buffer hit rate, read and write combined +system.mem_ctrls_0.actEnergy 229566960 # Energy for activate commands per rank (pJ) +system.mem_ctrls_0.preEnergy 125259750 # Energy for precharge commands per rank (pJ) +system.mem_ctrls_0.readEnergy 694894200 # Energy for read commands per rank (pJ) +system.mem_ctrls_0.writeEnergy 466333200 # Energy for write commands per rank (pJ) +system.mem_ctrls_0.refreshEnergy 346549057920 # Energy for refresh commands per rank (pJ) +system.mem_ctrls_0.actBackEnergy 149180699250 # Energy for active background per rank (pJ) +system.mem_ctrls_0.preBackEnergy 3052619831250 # Energy for precharge background per rank (pJ) +system.mem_ctrls_0.totalEnergy 3549865642530 # Total energy per rank (pJ) +system.mem_ctrls_0.averagePower 669.053779 # Core power per rank (mW) +system.mem_ctrls_0.memoryStateTime::IDLE 5078135564501 # Time in different power states +system.mem_ctrls_0.memoryStateTime::REF 177172320000 # Time in different power states +system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states +system.mem_ctrls_0.memoryStateTime::ACT 50492285499 # Time in different power states +system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states +system.mem_ctrls_1.actEnergy 228569040 # Energy for activate commands per rank (pJ) +system.mem_ctrls_1.preEnergy 124715250 # Energy for precharge commands per rank (pJ) +system.mem_ctrls_1.readEnergy 692000400 # Energy for read commands per rank (pJ) +system.mem_ctrls_1.writeEnergy 457034400 # Energy for write commands per rank (pJ) +system.mem_ctrls_1.refreshEnergy 346549057920 # Energy for refresh commands per rank (pJ) +system.mem_ctrls_1.actBackEnergy 149006937600 # Energy for active background per rank (pJ) +system.mem_ctrls_1.preBackEnergy 3052772253750 # Energy for precharge background per rank (pJ) +system.mem_ctrls_1.totalEnergy 3549830568360 # Total energy per rank (pJ) +system.mem_ctrls_1.averagePower 669.047168 # Core power per rank (mW) +system.mem_ctrls_1.memoryStateTime::IDLE 5078398943499 # Time in different power states +system.mem_ctrls_1.memoryStateTime::REF 177172320000 # Time in different power states +system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states +system.mem_ctrls_1.memoryStateTime::ACT 50232498501 # Time in different power states +system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks -system.cpu0.numCycles 10600620667 # number of cpu cycles simulated +system.cpu0.numCycles 10611607773 # number of cpu cycles simulated system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu0.committedInsts 58326751 # Number of instructions committed -system.cpu0.committedOps 112208544 # Number of ops (including micro ops) committed -system.cpu0.num_int_alu_accesses 105142610 # Number of integer alu accesses +system.cpu0.committedInsts 58312369 # Number of instructions committed +system.cpu0.committedOps 112077158 # Number of ops (including micro ops) committed +system.cpu0.num_int_alu_accesses 105052932 # Number of integer alu accesses system.cpu0.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu0.num_func_calls 999393 # number of times a function call or return occured -system.cpu0.num_conditional_control_insts 9968022 # number of instructions that are conditional controls -system.cpu0.num_int_insts 105142610 # number of integer instructions +system.cpu0.num_func_calls 985826 # number of times a function call or return occured +system.cpu0.num_conditional_control_insts 9959513 # number of instructions that are conditional controls +system.cpu0.num_int_insts 105052932 # number of integer instructions system.cpu0.num_fp_insts 0 # number of float instructions -system.cpu0.num_int_register_reads 198014063 # number of times the integer registers were read -system.cpu0.num_int_register_writes 89363011 # number of times the integer registers were written +system.cpu0.num_int_register_reads 198024346 # number of times the integer registers were read +system.cpu0.num_int_register_writes 89262745 # number of times the integer registers were written system.cpu0.num_fp_register_reads 0 # number of times the floating registers were read system.cpu0.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu0.num_cc_register_reads 60260543 # number of times the CC registers were read -system.cpu0.num_cc_register_writes 43624365 # number of times the CC registers were written -system.cpu0.num_mem_refs 12030075 # number of memory refs -system.cpu0.num_load_insts 7288332 # Number of load instructions -system.cpu0.num_store_insts 4741743 # Number of store instructions -system.cpu0.num_idle_cycles 10084773874.270475 # Number of idle cycles -system.cpu0.num_busy_cycles 515846792.729524 # Number of busy cycles -system.cpu0.not_idle_fraction 0.048662 # Percentage of non-idle cycles -system.cpu0.idle_fraction 0.951338 # Percentage of idle cycles -system.cpu0.Branches 11302630 # Number of branches fetched -system.cpu0.op_class::No_OpClass 132692 0.12% 0.12% # Class of executed instruction -system.cpu0.op_class::IntAlu 99906926 89.04% 89.15% # Class of executed instruction -system.cpu0.op_class::IntMult 87661 0.08% 89.23% # Class of executed instruction -system.cpu0.op_class::IntDiv 51849 0.05% 89.28% # Class of executed instruction -system.cpu0.op_class::FloatAdd 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::FloatCmp 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::FloatCvt 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::FloatMult 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::FloatDiv 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::FloatSqrt 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdAdd 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdAddAcc 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdAlu 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdCmp 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdCvt 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdMisc 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdMult 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdMultAcc 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdShift 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdShiftAcc 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdSqrt 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatAdd 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatAlu 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatCmp 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatCvt 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatDiv 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatMisc 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatMult 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::SimdFloatSqrt 0 0.00% 89.28% # Class of executed instruction -system.cpu0.op_class::MemRead 7288332 6.50% 95.77% # Class of executed instruction -system.cpu0.op_class::MemWrite 4741743 4.23% 100.00% # Class of executed instruction +system.cpu0.num_cc_register_reads 60301130 # number of times the CC registers were read +system.cpu0.num_cc_register_writes 43624803 # number of times the CC registers were written +system.cpu0.num_mem_refs 12143482 # number of memory refs +system.cpu0.num_load_insts 7354533 # Number of load instructions +system.cpu0.num_store_insts 4788949 # Number of store instructions +system.cpu0.num_idle_cycles 10094720432.678099 # Number of idle cycles +system.cpu0.num_busy_cycles 516887340.321903 # Number of busy cycles +system.cpu0.not_idle_fraction 0.048710 # Percentage of non-idle cycles +system.cpu0.idle_fraction 0.951290 # Percentage of idle cycles +system.cpu0.Branches 11277737 # Number of branches fetched +system.cpu0.op_class::No_OpClass 133660 0.12% 0.12% # Class of executed instruction +system.cpu0.op_class::IntAlu 99659673 88.92% 89.04% # Class of executed instruction +system.cpu0.op_class::IntMult 84103 0.08% 89.11% # Class of executed instruction +system.cpu0.op_class::IntDiv 57076 0.05% 89.17% # Class of executed instruction +system.cpu0.op_class::FloatAdd 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::FloatCmp 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::FloatCvt 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::FloatMult 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::FloatDiv 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::FloatSqrt 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdAdd 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdAddAcc 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdAlu 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdCmp 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdCvt 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdMisc 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdMult 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdMultAcc 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdShift 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdShiftAcc 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdSqrt 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatAdd 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatAlu 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatCmp 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatCvt 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatDiv 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatMisc 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatMult 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::SimdFloatSqrt 0 0.00% 89.17% # Class of executed instruction +system.cpu0.op_class::MemRead 7354533 6.56% 95.73% # Class of executed instruction +system.cpu0.op_class::MemWrite 4788949 4.27% 100.00% # Class of executed instruction system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu0.op_class::total 112209203 # Class of executed instruction +system.cpu0.op_class::total 112077994 # Class of executed instruction system.cpu0.kern.inst.arm 0 # number of arm instructions executed system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed system.cpu1.apic_clk_domain.clock 8000 # Clock period in ticks -system.cpu1.numCycles 10601483797 # number of cpu cycles simulated +system.cpu1.numCycles 10608678164 # number of cpu cycles simulated system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu1.committedInsts 48465381 # Number of instructions committed -system.cpu1.committedOps 92539438 # Number of ops (including micro ops) committed -system.cpu1.num_int_alu_accesses 88910462 # Number of integer alu accesses +system.cpu1.committedInsts 48529054 # Number of instructions committed +system.cpu1.committedOps 92757417 # Number of ops (including micro ops) committed +system.cpu1.num_int_alu_accesses 89083939 # Number of integer alu accesses system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu1.num_func_calls 1744945 # number of times a function call or return occured -system.cpu1.num_conditional_control_insts 8275238 # number of instructions that are conditional controls -system.cpu1.num_int_insts 88910462 # number of integer instructions +system.cpu1.num_func_calls 1759211 # number of times a function call or return occured +system.cpu1.num_conditional_control_insts 8292881 # number of instructions that are conditional controls +system.cpu1.num_int_insts 89083939 # number of integer instructions system.cpu1.num_fp_insts 0 # number of float instructions -system.cpu1.num_int_register_reads 172623141 # number of times the integer registers were read -system.cpu1.num_int_register_writes 73500216 # number of times the integer registers were written +system.cpu1.num_int_register_reads 172769101 # number of times the integer registers were read +system.cpu1.num_int_register_writes 73668949 # number of times the integer registers were written system.cpu1.num_fp_register_reads 0 # number of times the floating registers were read system.cpu1.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu1.num_cc_register_reads 51257305 # number of times the CC registers were read -system.cpu1.num_cc_register_writes 33029139 # number of times the CC registers were written -system.cpu1.num_mem_refs 14403882 # number of memory refs -system.cpu1.num_load_insts 9271822 # Number of load instructions -system.cpu1.num_store_insts 5132060 # Number of store instructions -system.cpu1.num_idle_cycles 10262330670.974064 # Number of idle cycles -system.cpu1.num_busy_cycles 339153126.025936 # Number of busy cycles -system.cpu1.not_idle_fraction 0.031991 # Percentage of non-idle cycles -system.cpu1.idle_fraction 0.968009 # Percentage of idle cycles -system.cpu1.Branches 10623766 # Number of branches fetched -system.cpu1.op_class::No_OpClass 173936 0.19% 0.19% # Class of executed instruction -system.cpu1.op_class::IntAlu 77788975 84.06% 84.25% # Class of executed instruction -system.cpu1.op_class::IntMult 96916 0.10% 84.35% # Class of executed instruction -system.cpu1.op_class::IntDiv 76680 0.08% 84.44% # Class of executed instruction -system.cpu1.op_class::FloatAdd 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::FloatCmp 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::FloatCvt 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::FloatMult 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::FloatDiv 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::FloatSqrt 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdAdd 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdAddAcc 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdAlu 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdCmp 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdCvt 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdMisc 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdMult 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdMultAcc 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdShift 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdShiftAcc 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdSqrt 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatAdd 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatAlu 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatCmp 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatCvt 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatDiv 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatMisc 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatMult 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::SimdFloatSqrt 0 0.00% 84.44% # Class of executed instruction -system.cpu1.op_class::MemRead 9271822 10.02% 94.45% # Class of executed instruction -system.cpu1.op_class::MemWrite 5132060 5.55% 100.00% # Class of executed instruction +system.cpu1.num_cc_register_reads 51289512 # number of times the CC registers were read +system.cpu1.num_cc_register_writes 33065409 # number of times the CC registers were written +system.cpu1.num_mem_refs 14308473 # number of memory refs +system.cpu1.num_load_insts 9217545 # Number of load instructions +system.cpu1.num_store_insts 5090928 # Number of store instructions +system.cpu1.num_idle_cycles 10270312186.995054 # Number of idle cycles +system.cpu1.num_busy_cycles 338365977.004946 # Number of busy cycles +system.cpu1.not_idle_fraction 0.031895 # Percentage of non-idle cycles +system.cpu1.idle_fraction 0.968105 # Percentage of idle cycles +system.cpu1.Branches 10658677 # Number of branches fetched +system.cpu1.op_class::No_OpClass 173276 0.19% 0.19% # Class of executed instruction +system.cpu1.op_class::IntAlu 78104057 84.20% 84.39% # Class of executed instruction +system.cpu1.op_class::IntMult 100669 0.11% 84.50% # Class of executed instruction +system.cpu1.op_class::IntDiv 71662 0.08% 84.57% # Class of executed instruction +system.cpu1.op_class::FloatAdd 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::FloatCmp 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::FloatCvt 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::FloatMult 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::FloatDiv 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::FloatSqrt 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdAdd 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdAddAcc 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdAlu 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdCmp 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdCvt 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdMisc 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdMult 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdMultAcc 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdShift 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdShiftAcc 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdSqrt 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatAdd 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatAlu 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatCmp 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatCvt 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatDiv 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatMisc 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatMult 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::SimdFloatSqrt 0 0.00% 84.57% # Class of executed instruction +system.cpu1.op_class::MemRead 9217545 9.94% 94.51% # Class of executed instruction +system.cpu1.op_class::MemWrite 5090928 5.49% 100.00% # Class of executed instruction system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu1.op_class::total 92540389 # Class of executed instruction +system.cpu1.op_class::total 92758137 # Class of executed instruction system.cpu1.kern.inst.arm 0 # number of arm instructions executed system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed -system.iobus.trans_dist::ReadReq 857926 # Transaction distribution -system.iobus.trans_dist::ReadResp 857926 # Transaction distribution -system.iobus.trans_dist::WriteReq 36569 # Transaction distribution -system.iobus.trans_dist::WriteResp 36569 # Transaction distribution -system.iobus.trans_dist::MessageReq 1919 # Transaction distribution -system.iobus.trans_dist::MessageResp 1919 # Transaction distribution +system.iobus.trans_dist::ReadReq 857916 # Transaction distribution +system.iobus.trans_dist::ReadResp 857916 # Transaction distribution +system.iobus.trans_dist::WriteReq 36558 # Transaction distribution +system.iobus.trans_dist::WriteResp 36558 # Transaction distribution +system.iobus.trans_dist::MessageReq 1920 # Transaction distribution +system.iobus.trans_dist::MessageResp 1920 # Transaction distribution system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1700 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 1642 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3342 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 1644 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3344 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 36 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 4780 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 5802 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 88 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 1048 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 82 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 42 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 964 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 78 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 38 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.speaker.pio 934582 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 990 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 966 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.i_dont_exist1.pio 90 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 16892 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 743276 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 296 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 14942 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 743192 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 238 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.pciconfig.pio 2126 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1704360 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1703174 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 16 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 6262 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 5240 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 92 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 316 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 12 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 12 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 400 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 16 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 16 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 31164 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 364 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 348 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.i_dont_exist1.pio 31252 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.com_1.pio 10236 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.com_1.pio 12178 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 200 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 5148 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 85126 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count::total 1792828 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 258 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 5238 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 86270 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count::total 1792788 # Packet count per connected master and slave (bytes) system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl0.sequencer.pio-slave-port 3400 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 3284 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6684 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 3288 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6688 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 18 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 2696 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 3294 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 149 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 524 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 41 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 21 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 482 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 39 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 19 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.speaker.pio 467291 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 1980 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 1932 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.i_dont_exist1.pio 45 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 8446 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1486546 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 592 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 7471 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1486378 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 476 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.pciconfig.pio 4252 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1972617 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1971862 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 8 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 3964 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 3366 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide-pciconf 72 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 158 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 6 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 6 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.keyboard.pio 200 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic1.pio 8 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pic2.pio 8 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.pit.pio 15582 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 728 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.io_apic.pio 696 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.i_dont_exist1.pio 15626 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.com_1.pio 5118 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.com_1.pio 6089 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 400 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 10293 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 51987 # Cumulative packet size per connected master and slave (bytes) -system.iobus.pkt_size::total 2031288 # Cumulative packet size per connected master and slave (bytes) -system.iobus.reqLayer0.occupancy 51000 # Layer occupancy (ticks) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 516 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 10473 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 52670 # Cumulative packet size per connected master and slave (bytes) +system.iobus.pkt_size::total 2031220 # Cumulative packet size per connected master and slave (bytes) +system.iobus.reqLayer0.occupancy 50000 # Layer occupancy (ticks) system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer1.occupancy 6500 # Layer occupancy (ticks) +system.iobus.reqLayer1.occupancy 7500 # Layer occupancy (ticks) system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer2.occupancy 10161500 # Layer occupancy (ticks) +system.iobus.reqLayer2.occupancy 10107000 # Layer occupancy (ticks) system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer3.occupancy 144000 # Layer occupancy (ticks) +system.iobus.reqLayer3.occupancy 145000 # Layer occupancy (ticks) system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer4.occupancy 1080000 # Layer occupancy (ticks) +system.iobus.reqLayer4.occupancy 1059500 # Layer occupancy (ticks) system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer5.occupancy 94000 # Layer occupancy (ticks) +system.iobus.reqLayer5.occupancy 96000 # Layer occupancy (ticks) system.iobus.reqLayer5.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer6.occupancy 59500 # Layer occupancy (ticks) +system.iobus.reqLayer6.occupancy 55000 # Layer occupancy (ticks) system.iobus.reqLayer6.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer7.occupancy 20808000 # Layer occupancy (ticks) +system.iobus.reqLayer7.occupancy 28599000 # Layer occupancy (ticks) system.iobus.reqLayer7.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer8.occupancy 700937500 # Layer occupancy (ticks) system.iobus.reqLayer8.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer9.occupancy 1385500 # Layer occupancy (ticks) +system.iobus.reqLayer9.occupancy 1327000 # Layer occupancy (ticks) system.iobus.reqLayer9.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer10.occupancy 31365000 # Layer occupancy (ticks) +system.iobus.reqLayer10.occupancy 39157000 # Layer occupancy (ticks) system.iobus.reqLayer10.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer12.occupancy 2500 # Layer occupancy (ticks) system.iobus.reqLayer12.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer13.occupancy 23203000 # Layer occupancy (ticks) +system.iobus.reqLayer13.occupancy 23099500 # Layer occupancy (ticks) system.iobus.reqLayer13.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer14.occupancy 9000 # Layer occupancy (ticks) system.iobus.reqLayer14.utilization 0.0 # Layer utilization (%) @@ -531,19 +535,19 @@ system.iobus.reqLayer15.occupancy 9000 # La system.iobus.reqLayer15.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer16.occupancy 12000 # Layer occupancy (ticks) system.iobus.reqLayer16.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer17.occupancy 11000 # Layer occupancy (ticks) +system.iobus.reqLayer17.occupancy 11500 # Layer occupancy (ticks) system.iobus.reqLayer17.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer18.occupancy 469007612 # Layer occupancy (ticks) +system.iobus.reqLayer18.occupancy 469010624 # Layer occupancy (ticks) system.iobus.reqLayer18.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer19.occupancy 8240496 # Layer occupancy (ticks) +system.iobus.reqLayer19.occupancy 8240920 # Layer occupancy (ticks) system.iobus.reqLayer19.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer21.occupancy 1330000 # Layer occupancy (ticks) system.iobus.reqLayer21.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer0.occupancy 2404108 # Layer occupancy (ticks) +system.iobus.respLayer0.occupancy 2415044 # Layer occupancy (ticks) system.iobus.respLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer2.occupancy 2025089500 # Layer occupancy (ticks) +system.iobus.respLayer2.occupancy 2023919000 # Layer occupancy (ticks) system.iobus.respLayer2.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer4.occupancy 59993000 # Layer occupancy (ticks) +system.iobus.respLayer4.occupancy 76513000 # Layer occupancy (ticks) system.iobus.respLayer4.utilization 0.0 # Layer utilization (%) system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). system.pc.south_bridge.ide.disks0.dma_read_bytes 32768 # Number of bytes transfered via DMA reads (not PRD). @@ -560,48 +564,48 @@ system.pc.south_bridge.ide.disks1.dma_write_txs 1 system.ruby.clk_domain.clock 500 # Clock period in ticks system.ruby.delayHist::bucket_size 4 # delay histogram for all message system.ruby.delayHist::max_bucket 39 # delay histogram for all message -system.ruby.delayHist::samples 10900696 # delay histogram for all message -system.ruby.delayHist::mean 0.442840 # delay histogram for all message -system.ruby.delayHist::stdev 1.830682 # delay histogram for all message -system.ruby.delayHist | 10297724 94.47% 94.47% | 1479 0.01% 94.48% | 601064 5.51% 100.00% | 150 0.00% 100.00% | 222 0.00% 100.00% | 14 0.00% 100.00% | 41 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message -system.ruby.delayHist::total 10900696 # delay histogram for all message +system.ruby.delayHist::samples 10911216 # delay histogram for all message +system.ruby.delayHist::mean 0.442136 # delay histogram for all message +system.ruby.delayHist::stdev 1.829254 # delay histogram for all message +system.ruby.delayHist | 10308626 94.48% 94.48% | 1272 0.01% 94.49% | 600907 5.51% 100.00% | 150 0.00% 100.00% | 203 0.00% 100.00% | 20 0.00% 100.00% | 38 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message +system.ruby.delayHist::total 10911216 # delay histogram for all message system.ruby.outstanding_req_hist::bucket_size 1 system.ruby.outstanding_req_hist::max_bucket 9 -system.ruby.outstanding_req_hist::samples 152128630 +system.ruby.outstanding_req_hist::samples 152209035 system.ruby.outstanding_req_hist::mean 1.000112 system.ruby.outstanding_req_hist::gmean 1.000078 -system.ruby.outstanding_req_hist::stdev 0.010605 -system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 152111520 99.99% 99.99% | 17110 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.outstanding_req_hist::total 152128630 +system.ruby.outstanding_req_hist::stdev 0.010600 +system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 152191931 99.99% 99.99% | 17104 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.outstanding_req_hist::total 152209035 system.ruby.latency_hist::bucket_size 256 system.ruby.latency_hist::max_bucket 2559 -system.ruby.latency_hist::samples 152128629 -system.ruby.latency_hist::mean 3.436815 -system.ruby.latency_hist::gmean 3.107877 -system.ruby.latency_hist::stdev 5.781267 -system.ruby.latency_hist | 152119575 99.99% 99.99% | 6193 0.00% 100.00% | 2797 0.00% 100.00% | 28 0.00% 100.00% | 34 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.latency_hist::total 152128629 +system.ruby.latency_hist::samples 152209034 +system.ruby.latency_hist::mean 3.436503 +system.ruby.latency_hist::gmean 3.107893 +system.ruby.latency_hist::stdev 5.762527 +system.ruby.latency_hist | 152200028 99.99% 99.99% | 6260 0.00% 100.00% | 2677 0.00% 100.00% | 43 0.00% 100.00% | 25 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.latency_hist::total 152209034 system.ruby.hit_latency_hist::bucket_size 1 system.ruby.hit_latency_hist::max_bucket 9 -system.ruby.hit_latency_hist::samples 149464039 +system.ruby.hit_latency_hist::samples 149542283 system.ruby.hit_latency_hist::mean 3 system.ruby.hit_latency_hist::gmean 3.000000 -system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 149464039 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.hit_latency_hist::total 149464039 +system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 149542283 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.hit_latency_hist::total 149542283 system.ruby.miss_latency_hist::bucket_size 256 system.ruby.miss_latency_hist::max_bucket 2559 -system.ruby.miss_latency_hist::samples 2664590 -system.ruby.miss_latency_hist::mean 27.938944 -system.ruby.miss_latency_hist::gmean 22.546119 -system.ruby.miss_latency_hist::stdev 36.016044 -system.ruby.miss_latency_hist | 2655536 99.66% 99.66% | 6193 0.23% 99.89% | 2797 0.10% 100.00% | 28 0.00% 100.00% | 34 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.miss_latency_hist::total 2664590 -system.ruby.l1_cntrl0.L1Dcache.demand_hits 10684802 # Number of cache demand hits -system.ruby.l1_cntrl0.L1Dcache.demand_misses 518536 # Number of cache demand misses -system.ruby.l1_cntrl0.L1Dcache.demand_accesses 11203338 # Number of cache demand accesses -system.ruby.l1_cntrl0.L1Icache.demand_hits 67461431 # Number of cache demand hits -system.ruby.l1_cntrl0.L1Icache.demand_misses 317291 # Number of cache demand misses -system.ruby.l1_cntrl0.L1Icache.demand_accesses 67778722 # Number of cache demand accesses +system.ruby.miss_latency_hist::samples 2666751 +system.ruby.miss_latency_hist::mean 27.914090 +system.ruby.miss_latency_hist::gmean 22.539704 +system.ruby.miss_latency_hist::stdev 35.853723 +system.ruby.miss_latency_hist | 2657745 99.66% 99.66% | 6260 0.23% 99.90% | 2677 0.10% 100.00% | 43 0.00% 100.00% | 25 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.miss_latency_hist::total 2666751 +system.ruby.l1_cntrl0.L1Dcache.demand_hits 10785659 # Number of cache demand hits +system.ruby.l1_cntrl0.L1Dcache.demand_misses 531574 # Number of cache demand misses +system.ruby.l1_cntrl0.L1Dcache.demand_accesses 11317233 # Number of cache demand accesses +system.ruby.l1_cntrl0.L1Icache.demand_hits 67530179 # Number of cache demand hits +system.ruby.l1_cntrl0.L1Icache.demand_misses 328872 # Number of cache demand misses +system.ruby.l1_cntrl0.L1Icache.demand_accesses 67859051 # Number of cache demand accesses system.ruby.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed system.ruby.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching system.ruby.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made @@ -611,13 +615,13 @@ system.ruby.l1_cntrl0.prefetcher.hits 0 # nu system.ruby.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched system.ruby.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages system.ruby.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed -system.ruby.l1_cntrl0.fully_busy_cycles 12 # cycles for which number of transistions == max transitions -system.ruby.l1_cntrl1.L1Dcache.demand_hits 13058053 # Number of cache demand hits -system.ruby.l1_cntrl1.L1Dcache.demand_misses 1328322 # Number of cache demand misses -system.ruby.l1_cntrl1.L1Dcache.demand_accesses 14386375 # Number of cache demand accesses -system.ruby.l1_cntrl1.L1Icache.demand_hits 58259753 # Number of cache demand hits -system.ruby.l1_cntrl1.L1Icache.demand_misses 500441 # Number of cache demand misses -system.ruby.l1_cntrl1.L1Icache.demand_accesses 58760194 # Number of cache demand accesses +system.ruby.l1_cntrl0.fully_busy_cycles 15 # cycles for which number of transistions == max transitions +system.ruby.l1_cntrl1.L1Dcache.demand_hits 12972395 # Number of cache demand hits +system.ruby.l1_cntrl1.L1Dcache.demand_misses 1316773 # Number of cache demand misses +system.ruby.l1_cntrl1.L1Dcache.demand_accesses 14289168 # Number of cache demand accesses +system.ruby.l1_cntrl1.L1Icache.demand_hits 58254050 # Number of cache demand hits +system.ruby.l1_cntrl1.L1Icache.demand_misses 489532 # Number of cache demand misses +system.ruby.l1_cntrl1.L1Icache.demand_accesses 58743582 # Number of cache demand accesses system.ruby.l1_cntrl1.prefetcher.miss_observed 0 # number of misses observed system.ruby.l1_cntrl1.prefetcher.allocated_streams 0 # number of streams allocated for prefetching system.ruby.l1_cntrl1.prefetcher.prefetches_requested 0 # number of prefetch requests made @@ -627,601 +631,613 @@ system.ruby.l1_cntrl1.prefetcher.hits 0 # nu system.ruby.l1_cntrl1.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched system.ruby.l1_cntrl1.prefetcher.pages_crossed 0 # number of prefetches across pages system.ruby.l1_cntrl1.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed -system.ruby.l1_cntrl1.fully_busy_cycles 12 # cycles for which number of transistions == max transitions -system.ruby.l2_cntrl0.L2cache.demand_hits 2436707 # Number of cache demand hits -system.ruby.l2_cntrl0.L2cache.demand_misses 227883 # Number of cache demand misses -system.ruby.l2_cntrl0.L2cache.demand_accesses 2664590 # Number of cache demand accesses +system.ruby.l1_cntrl1.fully_busy_cycles 10 # cycles for which number of transistions == max transitions +system.ruby.l2_cntrl0.L2cache.demand_hits 2439158 # Number of cache demand hits +system.ruby.l2_cntrl0.L2cache.demand_misses 227593 # Number of cache demand misses +system.ruby.l2_cntrl0.L2cache.demand_accesses 2666751 # Number of cache demand accesses +system.ruby.l2_cntrl0.fully_busy_cycles 1 # cycles for which number of transistions == max transitions system.ruby.memctrl_clk_domain.clock 1500 # Clock period in ticks -system.ruby.network.routers0.percent_links_utilized 0.029331 -system.ruby.network.routers0.msg_count.Control::0 835827 -system.ruby.network.routers0.msg_count.Request_Control::2 42905 -system.ruby.network.routers0.msg_count.Response_Data::1 863889 -system.ruby.network.routers0.msg_count.Response_Control::1 496114 -system.ruby.network.routers0.msg_count.Response_Control::2 492544 -system.ruby.network.routers0.msg_count.Writeback_Data::0 292440 -system.ruby.network.routers0.msg_count.Writeback_Data::1 167 -system.ruby.network.routers0.msg_count.Writeback_Control::0 162044 -system.ruby.network.routers0.msg_bytes.Control::0 6686616 -system.ruby.network.routers0.msg_bytes.Request_Control::2 343240 -system.ruby.network.routers0.msg_bytes.Response_Data::1 62200008 -system.ruby.network.routers0.msg_bytes.Response_Control::1 3968912 -system.ruby.network.routers0.msg_bytes.Response_Control::2 3940352 -system.ruby.network.routers0.msg_bytes.Writeback_Data::0 21055680 -system.ruby.network.routers0.msg_bytes.Writeback_Data::1 12024 -system.ruby.network.routers0.msg_bytes.Writeback_Control::0 1296352 -system.ruby.network.routers1.percent_links_utilized 0.057975 -system.ruby.network.routers1.msg_count.Control::0 1828763 -system.ruby.network.routers1.msg_count.Request_Control::2 40586 -system.ruby.network.routers1.msg_count.Response_Data::1 1853208 -system.ruby.network.routers1.msg_count.Response_Control::1 1269894 -system.ruby.network.routers1.msg_count.Response_Control::2 1269686 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-system.ruby.network.routers3.msg_count.Response_Data::1 276928 -system.ruby.network.routers3.msg_count.Response_Control::1 131535 -system.ruby.network.routers3.msg_count.Writeback_Control::0 47550 +system.ruby.network.routers0.percent_links_utilized 0.030084 +system.ruby.network.routers0.msg_count.Control::0 860446 +system.ruby.network.routers0.msg_count.Request_Control::2 42982 +system.ruby.network.routers0.msg_count.Response_Data::1 889304 +system.ruby.network.routers0.msg_count.Response_Control::1 509254 +system.ruby.network.routers0.msg_count.Response_Control::2 506406 +system.ruby.network.routers0.msg_count.Writeback_Data::0 297072 +system.ruby.network.routers0.msg_count.Writeback_Data::1 216 +system.ruby.network.routers0.msg_count.Writeback_Control::0 171015 +system.ruby.network.routers0.msg_bytes.Control::0 6883568 +system.ruby.network.routers0.msg_bytes.Request_Control::2 343856 +system.ruby.network.routers0.msg_bytes.Response_Data::1 64029888 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-system.ruby.network.routers4.throttle0.msg_count.Response_Data::1 814 +system.ruby.network.routers4.throttle0.msg_count.Response_Data::1 815 system.ruby.network.routers4.throttle0.msg_count.Writeback_Control::1 46736 -system.ruby.network.routers4.throttle0.msg_bytes.Response_Data::1 58608 +system.ruby.network.routers4.throttle0.msg_bytes.Response_Data::1 58680 system.ruby.network.routers4.throttle0.msg_bytes.Writeback_Control::1 373888 system.ruby.network.routers4.throttle1.link_utilization 0.000224 -system.ruby.network.routers4.throttle1.msg_count.Writeback_Control::0 47550 -system.ruby.network.routers4.throttle1.msg_bytes.Writeback_Control::0 380400 +system.ruby.network.routers4.throttle1.msg_count.Writeback_Control::0 47551 +system.ruby.network.routers4.throttle1.msg_bytes.Writeback_Control::0 380408 system.ruby.network.routers5.throttle0.link_utilization 0 system.ruby.network.routers5.throttle1.link_utilization 0 -system.ruby.network.routers6.throttle0.link_utilization 0.037422 -system.ruby.network.routers6.throttle0.msg_count.Request_Control::2 42905 -system.ruby.network.routers6.throttle0.msg_count.Response_Data::1 823544 -system.ruby.network.routers6.throttle0.msg_count.Response_Control::1 479708 -system.ruby.network.routers6.throttle0.msg_bytes.Request_Control::2 343240 -system.ruby.network.routers6.throttle0.msg_bytes.Response_Data::1 59295168 -system.ruby.network.routers6.throttle0.msg_bytes.Response_Control::1 3837664 -system.ruby.network.routers6.throttle1.link_utilization 0.083305 -system.ruby.network.routers6.throttle1.msg_count.Request_Control::2 40586 -system.ruby.network.routers6.throttle1.msg_count.Response_Data::1 1818878 -system.ruby.network.routers6.throttle1.msg_count.Response_Control::1 1252654 -system.ruby.network.routers6.throttle1.msg_bytes.Request_Control::2 324688 -system.ruby.network.routers6.throttle1.msg_bytes.Response_Data::1 130959216 -system.ruby.network.routers6.throttle1.msg_bytes.Response_Control::1 10021232 -system.ruby.network.routers6.throttle2.link_utilization 0.059790 -system.ruby.network.routers6.throttle2.msg_count.Control::0 2664590 -system.ruby.network.routers6.throttle2.msg_count.Response_Data::1 203618 -system.ruby.network.routers6.throttle2.msg_count.Response_Control::1 125324 -system.ruby.network.routers6.throttle2.msg_count.Response_Control::2 1762230 -system.ruby.network.routers6.throttle2.msg_count.Writeback_Data::0 575354 -system.ruby.network.routers6.throttle2.msg_count.Writeback_Data::1 375 -system.ruby.network.routers6.throttle2.msg_count.Writeback_Control::0 1110930 -system.ruby.network.routers6.throttle2.msg_bytes.Control::0 21316720 -system.ruby.network.routers6.throttle2.msg_bytes.Response_Data::1 14660496 -system.ruby.network.routers6.throttle2.msg_bytes.Response_Control::1 1002592 -system.ruby.network.routers6.throttle2.msg_bytes.Response_Control::2 14097840 -system.ruby.network.routers6.throttle2.msg_bytes.Writeback_Data::0 41425488 -system.ruby.network.routers6.throttle2.msg_bytes.Writeback_Data::1 27000 -system.ruby.network.routers6.throttle2.msg_bytes.Writeback_Control::0 8887440 -system.ruby.network.routers6.throttle3.link_utilization 0.005288 -system.ruby.network.routers6.throttle3.msg_count.Control::0 178413 -system.ruby.network.routers6.throttle3.msg_count.Response_Data::1 97701 -system.ruby.network.routers6.throttle3.msg_count.Response_Control::1 15947 -system.ruby.network.routers6.throttle3.msg_count.Writeback_Control::0 47550 -system.ruby.network.routers6.throttle3.msg_bytes.Control::0 1427304 -system.ruby.network.routers6.throttle3.msg_bytes.Response_Data::1 7034472 -system.ruby.network.routers6.throttle3.msg_bytes.Response_Control::1 127576 -system.ruby.network.routers6.throttle3.msg_bytes.Writeback_Control::0 380400 +system.ruby.network.routers6.throttle0.link_utilization 0.038501 +system.ruby.network.routers6.throttle0.msg_count.Request_Control::2 42982 +system.ruby.network.routers6.throttle0.msg_count.Response_Data::1 848348 +system.ruby.network.routers6.throttle0.msg_count.Response_Control::1 493076 +system.ruby.network.routers6.throttle0.msg_bytes.Request_Control::2 343856 +system.ruby.network.routers6.throttle0.msg_bytes.Response_Data::1 61081056 +system.ruby.network.routers6.throttle0.msg_bytes.Response_Control::1 3944608 +system.ruby.network.routers6.throttle1.link_utilization 0.082209 +system.ruby.network.routers6.throttle1.msg_count.Request_Control::2 40219 +system.ruby.network.routers6.throttle1.msg_count.Response_Data::1 1796151 +system.ruby.network.routers6.throttle1.msg_count.Response_Control::1 1241782 +system.ruby.network.routers6.throttle1.msg_bytes.Request_Control::2 321752 +system.ruby.network.routers6.throttle1.msg_bytes.Response_Data::1 129322872 +system.ruby.network.routers6.throttle1.msg_bytes.Response_Control::1 9934256 +system.ruby.network.routers6.throttle2.link_utilization 0.059751 +system.ruby.network.routers6.throttle2.msg_count.Control::0 2666751 +system.ruby.network.routers6.throttle2.msg_count.Response_Data::1 203534 +system.ruby.network.routers6.throttle2.msg_count.Response_Control::1 124997 +system.ruby.network.routers6.throttle2.msg_count.Response_Control::2 1764444 +system.ruby.network.routers6.throttle2.msg_count.Writeback_Data::0 575124 +system.ruby.network.routers6.throttle2.msg_count.Writeback_Data::1 402 +system.ruby.network.routers6.throttle2.msg_count.Writeback_Control::0 1113406 +system.ruby.network.routers6.throttle2.msg_bytes.Control::0 21334008 +system.ruby.network.routers6.throttle2.msg_bytes.Response_Data::1 14654448 +system.ruby.network.routers6.throttle2.msg_bytes.Response_Control::1 999976 +system.ruby.network.routers6.throttle2.msg_bytes.Response_Control::2 14115552 +system.ruby.network.routers6.throttle2.msg_bytes.Writeback_Data::0 41408928 +system.ruby.network.routers6.throttle2.msg_bytes.Writeback_Data::1 28944 +system.ruby.network.routers6.throttle2.msg_bytes.Writeback_Control::0 8907248 +system.ruby.network.routers6.throttle3.link_utilization 0.005283 +system.ruby.network.routers6.throttle3.msg_count.Control::0 178187 +system.ruby.network.routers6.throttle3.msg_count.Response_Data::1 97745 +system.ruby.network.routers6.throttle3.msg_count.Response_Control::1 15738 +system.ruby.network.routers6.throttle3.msg_count.Writeback_Control::0 47551 +system.ruby.network.routers6.throttle3.msg_bytes.Control::0 1425496 +system.ruby.network.routers6.throttle3.msg_bytes.Response_Data::1 7037640 +system.ruby.network.routers6.throttle3.msg_bytes.Response_Control::1 125904 +system.ruby.network.routers6.throttle3.msg_bytes.Writeback_Control::0 380408 system.ruby.network.routers6.throttle4.link_utilization 0.000255 -system.ruby.network.routers6.throttle4.msg_count.Response_Data::1 814 +system.ruby.network.routers6.throttle4.msg_count.Response_Data::1 815 system.ruby.network.routers6.throttle4.msg_count.Writeback_Control::1 46736 -system.ruby.network.routers6.throttle4.msg_bytes.Response_Data::1 58608 +system.ruby.network.routers6.throttle4.msg_bytes.Response_Data::1 58680 system.ruby.network.routers6.throttle4.msg_bytes.Writeback_Control::1 373888 system.ruby.network.routers6.throttle5.link_utilization 0 system.ruby.delayVCHist.vnet_0::bucket_size 4 # delay histogram for vnet_0 system.ruby.delayVCHist.vnet_0::max_bucket 39 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::samples 6113104 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::mean 0.754972 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::stdev 2.341149 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0 | 5536836 90.57% 90.57% | 424 0.01% 90.58% | 575424 9.41% 99.99% | 146 0.00% 100.00% | 217 0.00% 100.00% | 14 0.00% 100.00% | 41 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::total 6113104 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::samples 6119725 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::mean 0.753707 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::stdev 2.339234 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0 | 5543761 90.59% 90.59% | 388 0.01% 90.59% | 575170 9.40% 99.99% | 147 0.00% 100.00% | 201 0.00% 100.00% | 20 0.00% 100.00% | 38 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::total 6119725 # delay histogram for vnet_0 system.ruby.delayVCHist.vnet_1::bucket_size 2 # delay histogram for vnet_1 system.ruby.delayVCHist.vnet_1::max_bucket 19 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::samples 4704101 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::mean 0.045072 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::stdev 0.595912 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1 | 4676918 99.42% 99.42% | 479 0.01% 99.43% | 405 0.01% 99.44% | 650 0.01% 99.45% | 25495 0.54% 100.00% | 145 0.00% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 2 0.00% 100.00% | 3 0.00% 100.00% # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::total 4704101 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::samples 4708290 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::mean 0.044976 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::stdev 0.595659 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1 | 4681222 99.43% 99.43% | 442 0.01% 99.43% | 339 0.01% 99.44% | 545 0.01% 99.45% | 25596 0.54% 100.00% | 141 0.00% 100.00% | 3 0.00% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% | 1 0.00% 100.00% # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::total 4708290 # delay histogram for vnet_1 system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::samples 83491 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::mean 0.000264 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::stdev 0.022955 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2 | 83480 99.99% 99.99% | 0 0.00% 99.99% | 11 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::total 83491 # delay histogram for vnet_2 -system.ruby.LD.latency_hist::bucket_size 256 -system.ruby.LD.latency_hist::max_bucket 2559 -system.ruby.LD.latency_hist::samples 14918164 -system.ruby.LD.latency_hist::mean 4.885826 -system.ruby.LD.latency_hist::gmean 3.596048 -system.ruby.LD.latency_hist::stdev 9.349489 -system.ruby.LD.latency_hist | 14916026 99.99% 99.99% | 1637 0.01% 100.00% | 485 0.00% 100.00% | 10 0.00% 100.00% | 5 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.latency_hist::total 14918164 +system.ruby.delayVCHist.vnet_2::samples 83201 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::mean 0.000120 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::stdev 0.015504 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2 | 83196 99.99% 99.99% | 0 0.00% 99.99% | 5 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::total 83201 # delay histogram for vnet_2 +system.ruby.LD.latency_hist::bucket_size 128 +system.ruby.LD.latency_hist::max_bucket 1279 +system.ruby.LD.latency_hist::samples 14928118 +system.ruby.LD.latency_hist::mean 4.887199 +system.ruby.LD.latency_hist::gmean 3.596426 +system.ruby.LD.latency_hist::stdev 9.328249 +system.ruby.LD.latency_hist | 14912021 99.89% 99.89% | 13966 0.09% 99.99% | 828 0.01% 99.99% | 820 0.01% 100.00% | 357 0.00% 100.00% | 111 0.00% 100.00% | 2 0.00% 100.00% | 8 0.00% 100.00% | 4 0.00% 100.00% | 1 0.00% 100.00% +system.ruby.LD.latency_hist::total 14928118 system.ruby.LD.hit_latency_hist::bucket_size 1 system.ruby.LD.hit_latency_hist::max_bucket 9 -system.ruby.LD.hit_latency_hist::samples 13527451 +system.ruby.LD.hit_latency_hist::samples 13535758 system.ruby.LD.hit_latency_hist::mean 3 system.ruby.LD.hit_latency_hist::gmean 3.000000 -system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 13527451 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.hit_latency_hist::total 13527451 -system.ruby.LD.miss_latency_hist::bucket_size 256 -system.ruby.LD.miss_latency_hist::max_bucket 2559 -system.ruby.LD.miss_latency_hist::samples 1390713 -system.ruby.LD.miss_latency_hist::mean 23.229241 -system.ruby.LD.miss_latency_hist::gmean 20.959487 -system.ruby.LD.miss_latency_hist::stdev 23.803463 -system.ruby.LD.miss_latency_hist | 1388575 99.85% 99.85% | 1637 0.12% 99.96% | 485 0.03% 100.00% | 10 0.00% 100.00% | 5 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.miss_latency_hist::total 1390713 +system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 13535758 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.hit_latency_hist::total 13535758 +system.ruby.LD.miss_latency_hist::bucket_size 128 +system.ruby.LD.miss_latency_hist::max_bucket 1279 +system.ruby.LD.miss_latency_hist::samples 1392360 +system.ruby.LD.miss_latency_hist::mean 23.233506 +system.ruby.LD.miss_latency_hist::gmean 20.962083 +system.ruby.LD.miss_latency_hist::stdev 23.700852 +system.ruby.LD.miss_latency_hist | 1376263 98.84% 98.84% | 13966 1.00% 99.85% | 828 0.06% 99.91% | 820 0.06% 99.97% | 357 0.03% 99.99% | 111 0.01% 100.00% | 2 0.00% 100.00% | 8 0.00% 100.00% | 4 0.00% 100.00% | 1 0.00% 100.00% +system.ruby.LD.miss_latency_hist::total 1392360 system.ruby.ST.latency_hist::bucket_size 256 system.ruby.ST.latency_hist::max_bucket 2559 -system.ruby.ST.latency_hist::samples 9498200 -system.ruby.ST.latency_hist::mean 5.193739 -system.ruby.ST.latency_hist::gmean 3.303046 -system.ruby.ST.latency_hist::stdev 17.710522 -system.ruby.ST.latency_hist | 9492386 99.94% 99.94% | 3703 0.04% 99.98% | 2069 0.02% 100.00% | 12 0.00% 100.00% | 29 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.latency_hist::total 9498200 +system.ruby.ST.latency_hist::samples 9504180 +system.ruby.ST.latency_hist::mean 5.187204 +system.ruby.ST.latency_hist::gmean 3.302390 +system.ruby.ST.latency_hist::stdev 17.665644 +system.ruby.ST.latency_hist | 9498362 99.94% 99.94% | 3775 0.04% 99.98% | 1993 0.02% 100.00% | 29 0.00% 100.00% | 20 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.latency_hist::total 9504180 system.ruby.ST.hit_latency_hist::bucket_size 1 system.ruby.ST.hit_latency_hist::max_bucket 9 -system.ruby.ST.hit_latency_hist::samples 9146403 +system.ruby.ST.hit_latency_hist::samples 9152723 system.ruby.ST.hit_latency_hist::mean 3 system.ruby.ST.hit_latency_hist::gmean 3.000000 -system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 9146403 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.hit_latency_hist::total 9146403 +system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 9152723 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.hit_latency_hist::total 9152723 system.ruby.ST.miss_latency_hist::bucket_size 256 system.ruby.ST.miss_latency_hist::max_bucket 2559 -system.ruby.ST.miss_latency_hist::samples 351797 -system.ruby.ST.miss_latency_hist::mean 62.228953 -system.ruby.ST.miss_latency_hist::gmean 40.318436 -system.ruby.ST.miss_latency_hist::stdev 71.347621 -system.ruby.ST.miss_latency_hist | 345983 98.35% 98.35% | 3703 1.05% 99.40% | 2069 0.59% 99.99% | 12 0.00% 99.99% | 29 0.01% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.miss_latency_hist::total 351797 +system.ruby.ST.miss_latency_hist::samples 351457 +system.ruby.ST.miss_latency_hist::mean 62.146880 +system.ruby.ST.miss_latency_hist::gmean 40.269218 +system.ruby.ST.miss_latency_hist::stdev 71.205537 +system.ruby.ST.miss_latency_hist | 345639 98.34% 98.34% | 3775 1.07% 99.42% | 1993 0.57% 99.99% | 29 0.01% 99.99% | 20 0.01% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.miss_latency_hist::total 351457 system.ruby.IFETCH.latency_hist::bucket_size 128 system.ruby.IFETCH.latency_hist::max_bucket 1279 -system.ruby.IFETCH.latency_hist::samples 126538916 -system.ruby.IFETCH.latency_hist::mean 3.120095 -system.ruby.IFETCH.latency_hist::gmean 3.036786 -system.ruby.IFETCH.latency_hist::stdev 2.265582 -system.ruby.IFETCH.latency_hist | 126532168 99.99% 99.99% | 5703 0.00% 100.00% | 492 0.00% 100.00% | 323 0.00% 100.00% | 160 0.00% 100.00% | 64 0.00% 100.00% | 0 0.00% 100.00% | 6 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.latency_hist::total 126538916 +system.ruby.IFETCH.latency_hist::samples 126602633 +system.ruby.IFETCH.latency_hist::mean 3.119985 +system.ruby.IFETCH.latency_hist::gmean 3.036795 +system.ruby.IFETCH.latency_hist::stdev 2.244898 +system.ruby.IFETCH.latency_hist | 126595894 99.99% 99.99% | 5742 0.00% 100.00% | 458 0.00% 100.00% | 336 0.00% 100.00% | 141 0.00% 100.00% | 58 0.00% 100.00% | 2 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.latency_hist::total 126602633 system.ruby.IFETCH.hit_latency_hist::bucket_size 1 system.ruby.IFETCH.hit_latency_hist::max_bucket 9 -system.ruby.IFETCH.hit_latency_hist::samples 125721184 +system.ruby.IFETCH.hit_latency_hist::samples 125784229 system.ruby.IFETCH.hit_latency_hist::mean 3 system.ruby.IFETCH.hit_latency_hist::gmean 3.000000 -system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 125721184 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.hit_latency_hist::total 125721184 +system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 125784229 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.hit_latency_hist::total 125784229 system.ruby.IFETCH.miss_latency_hist::bucket_size 128 system.ruby.IFETCH.miss_latency_hist::max_bucket 1279 -system.ruby.IFETCH.miss_latency_hist::samples 817732 -system.ruby.IFETCH.miss_latency_hist::mean 21.583892 -system.ruby.IFETCH.miss_latency_hist::gmean 19.777346 -system.ruby.IFETCH.miss_latency_hist::stdev 21.240290 -system.ruby.IFETCH.miss_latency_hist | 810984 99.17% 99.17% | 5703 0.70% 99.87% | 492 0.06% 99.93% | 323 0.04% 99.97% | 160 0.02% 99.99% | 64 0.01% 100.00% | 0 0.00% 100.00% | 6 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.miss_latency_hist::total 817732 +system.ruby.IFETCH.miss_latency_hist::samples 818404 +system.ruby.IFETCH.miss_latency_hist::mean 21.561079 +system.ruby.IFETCH.miss_latency_hist::gmean 19.774643 +system.ruby.IFETCH.miss_latency_hist::stdev 20.911893 +system.ruby.IFETCH.miss_latency_hist | 811665 99.18% 99.18% | 5742 0.70% 99.88% | 458 0.06% 99.93% | 336 0.04% 99.98% | 141 0.02% 99.99% | 58 0.01% 100.00% | 2 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.miss_latency_hist::total 818404 system.ruby.RMW_Read.latency_hist::bucket_size 128 system.ruby.RMW_Read.latency_hist::max_bucket 1279 -system.ruby.RMW_Read.latency_hist::samples 494265 -system.ruby.RMW_Read.latency_hist::mean 6.023605 -system.ruby.RMW_Read.latency_hist::gmean 3.954302 -system.ruby.RMW_Read.latency_hist::stdev 10.239189 -system.ruby.RMW_Read.latency_hist | 494082 99.96% 99.96% | 137 0.03% 99.99% | 14 0.00% 99.99% | 17 0.00% 100.00% | 10 0.00% 100.00% | 5 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.RMW_Read.latency_hist::total 494265 +system.ruby.RMW_Read.latency_hist::samples 494795 +system.ruby.RMW_Read.latency_hist::mean 6.019475 +system.ruby.RMW_Read.latency_hist::gmean 3.954538 +system.ruby.RMW_Read.latency_hist::stdev 10.125129 +system.ruby.RMW_Read.latency_hist | 494623 99.97% 99.97% | 131 0.03% 99.99% | 11 0.00% 99.99% | 18 0.00% 100.00% | 7 0.00% 100.00% | 5 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.RMW_Read.latency_hist::total 494795 system.ruby.RMW_Read.hit_latency_hist::bucket_size 1 system.ruby.RMW_Read.hit_latency_hist::max_bucket 9 -system.ruby.RMW_Read.hit_latency_hist::samples 428815 +system.ruby.RMW_Read.hit_latency_hist::samples 429248 system.ruby.RMW_Read.hit_latency_hist::mean 3 system.ruby.RMW_Read.hit_latency_hist::gmean 3.000000 -system.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 428815 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.RMW_Read.hit_latency_hist::total 428815 +system.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 429248 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.RMW_Read.hit_latency_hist::total 429248 system.ruby.RMW_Read.miss_latency_hist::bucket_size 128 system.ruby.RMW_Read.miss_latency_hist::max_bucket 1279 -system.ruby.RMW_Read.miss_latency_hist::samples 65450 -system.ruby.RMW_Read.miss_latency_hist::mean 25.833644 -system.ruby.RMW_Read.miss_latency_hist::gmean 24.151736 -system.ruby.RMW_Read.miss_latency_hist::stdev 18.422970 -system.ruby.RMW_Read.miss_latency_hist | 65267 99.72% 99.72% | 137 0.21% 99.93% | 14 0.02% 99.95% | 17 0.03% 99.98% | 10 0.02% 99.99% | 5 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.RMW_Read.miss_latency_hist::total 65450 -system.ruby.Locked_RMW_Read.latency_hist::bucket_size 128 -system.ruby.Locked_RMW_Read.latency_hist::max_bucket 1279 -system.ruby.Locked_RMW_Read.latency_hist::samples 339542 -system.ruby.Locked_RMW_Read.latency_hist::mean 5.330551 -system.ruby.Locked_RMW_Read.latency_hist::gmean 3.775845 -system.ruby.Locked_RMW_Read.latency_hist::stdev 8.064390 -system.ruby.Locked_RMW_Read.latency_hist | 339293 99.93% 99.93% | 238 0.07% 100.00% | 4 0.00% 100.00% | 3 0.00% 100.00% | 1 0.00% 100.00% | 3 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Read.latency_hist::total 339542 +system.ruby.RMW_Read.miss_latency_hist::samples 65547 +system.ruby.RMW_Read.miss_latency_hist::mean 25.793126 +system.ruby.RMW_Read.miss_latency_hist::gmean 24.141988 +system.ruby.RMW_Read.miss_latency_hist::stdev 17.977211 +system.ruby.RMW_Read.miss_latency_hist | 65375 99.74% 99.74% | 131 0.20% 99.94% | 11 0.02% 99.95% | 18 0.03% 99.98% | 7 0.01% 99.99% | 5 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.RMW_Read.miss_latency_hist::total 65547 +system.ruby.Locked_RMW_Read.latency_hist::bucket_size 64 +system.ruby.Locked_RMW_Read.latency_hist::max_bucket 639 +system.ruby.Locked_RMW_Read.latency_hist::samples 339654 +system.ruby.Locked_RMW_Read.latency_hist::mean 5.341447 +system.ruby.Locked_RMW_Read.latency_hist::gmean 3.777860 +system.ruby.Locked_RMW_Read.latency_hist::stdev 8.189753 +system.ruby.Locked_RMW_Read.latency_hist | 339308 99.90% 99.90% | 89 0.03% 99.92% | 236 0.07% 99.99% | 2 0.00% 99.99% | 6 0.00% 100.00% | 3 0.00% 100.00% | 2 0.00% 100.00% | 3 0.00% 100.00% | 2 0.00% 100.00% | 3 0.00% 100.00% +system.ruby.Locked_RMW_Read.latency_hist::total 339654 system.ruby.Locked_RMW_Read.hit_latency_hist::bucket_size 1 system.ruby.Locked_RMW_Read.hit_latency_hist::max_bucket 9 -system.ruby.Locked_RMW_Read.hit_latency_hist::samples 300644 +system.ruby.Locked_RMW_Read.hit_latency_hist::samples 300671 system.ruby.Locked_RMW_Read.hit_latency_hist::mean 3 system.ruby.Locked_RMW_Read.hit_latency_hist::gmean 3.000000 -system.ruby.Locked_RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 300644 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Read.hit_latency_hist::total 300644 -system.ruby.Locked_RMW_Read.miss_latency_hist::bucket_size 128 -system.ruby.Locked_RMW_Read.miss_latency_hist::max_bucket 1279 -system.ruby.Locked_RMW_Read.miss_latency_hist::samples 38898 -system.ruby.Locked_RMW_Read.miss_latency_hist::mean 23.343462 -system.ruby.Locked_RMW_Read.miss_latency_hist::gmean 22.340350 -system.ruby.Locked_RMW_Read.miss_latency_hist::stdev 14.186116 -system.ruby.Locked_RMW_Read.miss_latency_hist | 38649 99.36% 99.36% | 238 0.61% 99.97% | 4 0.01% 99.98% | 3 0.01% 99.99% | 1 0.00% 99.99% | 3 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Read.miss_latency_hist::total 38898 +system.ruby.Locked_RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 300671 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Read.hit_latency_hist::total 300671 +system.ruby.Locked_RMW_Read.miss_latency_hist::bucket_size 64 +system.ruby.Locked_RMW_Read.miss_latency_hist::max_bucket 639 +system.ruby.Locked_RMW_Read.miss_latency_hist::samples 38983 +system.ruby.Locked_RMW_Read.miss_latency_hist::mean 23.400739 +system.ruby.Locked_RMW_Read.miss_latency_hist::gmean 22.361163 +system.ruby.Locked_RMW_Read.miss_latency_hist::stdev 14.695962 +system.ruby.Locked_RMW_Read.miss_latency_hist | 38637 99.11% 99.11% | 89 0.23% 99.34% | 236 0.61% 99.95% | 2 0.01% 99.95% | 6 0.02% 99.97% | 3 0.01% 99.97% | 2 0.01% 99.98% | 3 0.01% 99.99% | 2 0.01% 99.99% | 3 0.01% 100.00% +system.ruby.Locked_RMW_Read.miss_latency_hist::total 38983 system.ruby.Locked_RMW_Write.latency_hist::bucket_size 1 system.ruby.Locked_RMW_Write.latency_hist::max_bucket 9 -system.ruby.Locked_RMW_Write.latency_hist::samples 339542 +system.ruby.Locked_RMW_Write.latency_hist::samples 339654 system.ruby.Locked_RMW_Write.latency_hist::mean 3 system.ruby.Locked_RMW_Write.latency_hist::gmean 3.000000 -system.ruby.Locked_RMW_Write.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339542 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Write.latency_hist::total 339542 +system.ruby.Locked_RMW_Write.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339654 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Write.latency_hist::total 339654 system.ruby.Locked_RMW_Write.hit_latency_hist::bucket_size 1 system.ruby.Locked_RMW_Write.hit_latency_hist::max_bucket 9 -system.ruby.Locked_RMW_Write.hit_latency_hist::samples 339542 +system.ruby.Locked_RMW_Write.hit_latency_hist::samples 339654 system.ruby.Locked_RMW_Write.hit_latency_hist::mean 3 system.ruby.Locked_RMW_Write.hit_latency_hist::gmean 3.000000 -system.ruby.Locked_RMW_Write.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339542 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Write.hit_latency_hist::total 339542 -system.ruby.Directory_Controller.Fetch 178413 0.00% 0.00% -system.ruby.Directory_Controller.Data 97701 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Data 178865 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Ack 142859 0.00% 0.00% -system.ruby.Directory_Controller.DMA_READ 814 0.00% 0.00% +system.ruby.Locked_RMW_Write.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339654 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Write.hit_latency_hist::total 339654 +system.ruby.Directory_Controller.Fetch 178187 0.00% 0.00% +system.ruby.Directory_Controller.Data 97745 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Data 178657 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Ack 142629 0.00% 0.00% +system.ruby.Directory_Controller.DMA_READ 815 0.00% 0.00% system.ruby.Directory_Controller.DMA_WRITE 46736 0.00% 0.00% -system.ruby.Directory_Controller.CleanReplacement 15947 0.00% 0.00% -system.ruby.Directory_Controller.I.Fetch 178413 0.00% 0.00% -system.ruby.Directory_Controller.I.DMA_READ 452 0.00% 0.00% -system.ruby.Directory_Controller.I.DMA_WRITE 45158 0.00% 0.00% -system.ruby.Directory_Controller.ID.Memory_Data 452 0.00% 0.00% -system.ruby.Directory_Controller.ID_W.Memory_Ack 45158 0.00% 0.00% -system.ruby.Directory_Controller.M.Data 95761 0.00% 0.00% -system.ruby.Directory_Controller.M.DMA_READ 362 0.00% 0.00% -system.ruby.Directory_Controller.M.DMA_WRITE 1578 0.00% 0.00% -system.ruby.Directory_Controller.M.CleanReplacement 15947 0.00% 0.00% -system.ruby.Directory_Controller.IM.Memory_Data 178413 0.00% 0.00% -system.ruby.Directory_Controller.MI.Memory_Ack 95761 0.00% 0.00% -system.ruby.Directory_Controller.M_DRD.Data 362 0.00% 0.00% -system.ruby.Directory_Controller.M_DRDI.Memory_Ack 362 0.00% 0.00% -system.ruby.Directory_Controller.M_DWR.Data 1578 0.00% 0.00% -system.ruby.Directory_Controller.M_DWRI.Memory_Ack 1578 0.00% 0.00% -system.ruby.DMA_Controller.ReadRequest | 814 100.00% 100.00% | 0 0.00% 100.00% -system.ruby.DMA_Controller.ReadRequest::total 814 +system.ruby.Directory_Controller.CleanReplacement 15738 0.00% 0.00% +system.ruby.Directory_Controller.I.Fetch 178187 0.00% 0.00% +system.ruby.Directory_Controller.I.DMA_READ 470 0.00% 0.00% +system.ruby.Directory_Controller.I.DMA_WRITE 44884 0.00% 0.00% +system.ruby.Directory_Controller.ID.Memory_Data 470 0.00% 0.00% +system.ruby.Directory_Controller.ID_W.Memory_Ack 44884 0.00% 0.00% +system.ruby.Directory_Controller.M.Data 95548 0.00% 0.00% +system.ruby.Directory_Controller.M.DMA_READ 345 0.00% 0.00% +system.ruby.Directory_Controller.M.DMA_WRITE 1852 0.00% 0.00% +system.ruby.Directory_Controller.M.CleanReplacement 15738 0.00% 0.00% +system.ruby.Directory_Controller.IM.Memory_Data 178187 0.00% 0.00% +system.ruby.Directory_Controller.MI.Memory_Ack 95548 0.00% 0.00% +system.ruby.Directory_Controller.M_DRD.Data 345 0.00% 0.00% +system.ruby.Directory_Controller.M_DRDI.Memory_Ack 345 0.00% 0.00% +system.ruby.Directory_Controller.M_DWR.Data 1852 0.00% 0.00% +system.ruby.Directory_Controller.M_DWRI.Memory_Ack 1852 0.00% 0.00% +system.ruby.DMA_Controller.ReadRequest | 815 100.00% 100.00% | 0 0.00% 100.00% +system.ruby.DMA_Controller.ReadRequest::total 815 system.ruby.DMA_Controller.WriteRequest | 46736 100.00% 100.00% | 0 0.00% 100.00% system.ruby.DMA_Controller.WriteRequest::total 46736 -system.ruby.DMA_Controller.Data | 814 100.00% 100.00% | 0 0.00% 100.00% -system.ruby.DMA_Controller.Data::total 814 +system.ruby.DMA_Controller.Data | 815 100.00% 100.00% | 0 0.00% 100.00% +system.ruby.DMA_Controller.Data::total 815 system.ruby.DMA_Controller.Ack | 46736 100.00% 100.00% | 0 0.00% 100.00% system.ruby.DMA_Controller.Ack::total 46736 -system.ruby.DMA_Controller.READY.ReadRequest | 814 100.00% 100.00% | 0 0.00% 100.00% -system.ruby.DMA_Controller.READY.ReadRequest::total 814 +system.ruby.DMA_Controller.READY.ReadRequest | 815 100.00% 100.00% | 0 0.00% 100.00% +system.ruby.DMA_Controller.READY.ReadRequest::total 815 system.ruby.DMA_Controller.READY.WriteRequest | 46736 100.00% 100.00% | 0 0.00% 100.00% system.ruby.DMA_Controller.READY.WriteRequest::total 46736 -system.ruby.DMA_Controller.BUSY_RD.Data | 814 100.00% 100.00% | 0 0.00% 100.00% -system.ruby.DMA_Controller.BUSY_RD.Data::total 814 +system.ruby.DMA_Controller.BUSY_RD.Data | 815 100.00% 100.00% | 0 0.00% 100.00% +system.ruby.DMA_Controller.BUSY_RD.Data::total 815 system.ruby.DMA_Controller.BUSY_WR.Ack | 46736 100.00% 100.00% | 0 0.00% 100.00% system.ruby.DMA_Controller.BUSY_WR.Ack::total 46736 -system.ruby.L1Cache_Controller.Load | 6037097 40.47% 40.47% | 8881067 59.53% 100.00% -system.ruby.L1Cache_Controller.Load::total 14918164 -system.ruby.L1Cache_Controller.Ifetch | 67778726 53.56% 53.56% | 58760197 46.44% 100.00% -system.ruby.L1Cache_Controller.Ifetch::total 126538923 -system.ruby.L1Cache_Controller.Store | 5166241 48.41% 48.41% | 5505308 51.59% 100.00% -system.ruby.L1Cache_Controller.Store::total 10671549 -system.ruby.L1Cache_Controller.Inv | 16573 48.71% 48.71% | 17448 51.29% 100.00% -system.ruby.L1Cache_Controller.Inv::total 34021 -system.ruby.L1Cache_Controller.L1_Replacement | 807951 30.97% 30.97% | 1801234 69.03% 100.00% -system.ruby.L1Cache_Controller.L1_Replacement::total 2609185 -system.ruby.L1Cache_Controller.Fwd_GETX | 12319 50.77% 50.77% | 11946 49.23% 100.00% -system.ruby.L1Cache_Controller.Fwd_GETX::total 24265 -system.ruby.L1Cache_Controller.Fwd_GETS | 14009 55.59% 55.59% | 11192 44.41% 100.00% -system.ruby.L1Cache_Controller.Fwd_GETS::total 25201 +system.ruby.L1Cache_Controller.Load | 6103954 40.89% 40.89% | 8824164 59.11% 100.00% +system.ruby.L1Cache_Controller.Load::total 14928118 +system.ruby.L1Cache_Controller.Ifetch | 67859054 53.60% 53.60% | 58743585 46.40% 100.00% +system.ruby.L1Cache_Controller.Ifetch::total 126602639 +system.ruby.L1Cache_Controller.Store | 5213279 48.82% 48.82% | 5465004 51.18% 100.00% +system.ruby.L1Cache_Controller.Store::total 10678283 +system.ruby.L1Cache_Controller.Inv | 16394 48.51% 48.51% | 17401 51.49% 100.00% +system.ruby.L1Cache_Controller.Inv::total 33795 +system.ruby.L1Cache_Controller.L1_Replacement | 832783 31.89% 31.89% | 1778531 68.11% 100.00% +system.ruby.L1Cache_Controller.L1_Replacement::total 2611314 +system.ruby.L1Cache_Controller.Fwd_GETX | 12220 50.79% 50.79% | 11839 49.21% 100.00% +system.ruby.L1Cache_Controller.Fwd_GETX::total 24059 +system.ruby.L1Cache_Controller.Fwd_GETS | 14364 56.68% 56.68% | 10979 43.32% 100.00% +system.ruby.L1Cache_Controller.Fwd_GETS::total 25343 system.ruby.L1Cache_Controller.Fwd_GET_INSTR | 4 100.00% 100.00% | 0 0.00% 100.00% system.ruby.L1Cache_Controller.Fwd_GET_INSTR::total 4 -system.ruby.L1Cache_Controller.Data | 658 37.77% 37.77% | 1084 62.23% 100.00% -system.ruby.L1Cache_Controller.Data::total 1742 -system.ruby.L1Cache_Controller.Data_Exclusive | 243874 19.04% 19.04% | 1037006 80.96% 100.00% -system.ruby.L1Cache_Controller.Data_Exclusive::total 1280880 -system.ruby.L1Cache_Controller.DataS_fromL1 | 11192 44.40% 44.40% | 14013 55.60% 100.00% -system.ruby.L1Cache_Controller.DataS_fromL1::total 25205 -system.ruby.L1Cache_Controller.Data_all_Acks | 567820 42.55% 42.55% | 766775 57.45% 100.00% -system.ruby.L1Cache_Controller.Data_all_Acks::total 1334595 -system.ruby.L1Cache_Controller.Ack | 12283 55.41% 55.41% | 9885 44.59% 100.00% -system.ruby.L1Cache_Controller.Ack::total 22168 -system.ruby.L1Cache_Controller.Ack_all | 12941 54.12% 54.12% | 10969 45.88% 100.00% -system.ruby.L1Cache_Controller.Ack_all::total 23910 -system.ruby.L1Cache_Controller.WB_Ack | 454484 26.95% 26.95% | 1231800 73.05% 100.00% -system.ruby.L1Cache_Controller.WB_Ack::total 1686284 -system.ruby.L1Cache_Controller.NP.Load | 272421 19.86% 19.86% | 1099369 80.14% 100.00% -system.ruby.L1Cache_Controller.NP.Load::total 1371790 -system.ruby.L1Cache_Controller.NP.Ifetch | 317175 38.82% 38.82% | 499890 61.18% 100.00% -system.ruby.L1Cache_Controller.NP.Ifetch::total 817065 -system.ruby.L1Cache_Controller.NP.Store | 219379 51.94% 51.94% | 202999 48.06% 100.00% -system.ruby.L1Cache_Controller.NP.Store::total 422378 -system.ruby.L1Cache_Controller.NP.Inv | 5530 57.31% 57.31% | 4119 42.69% 100.00% -system.ruby.L1Cache_Controller.NP.Inv::total 9649 -system.ruby.L1Cache_Controller.I.Load | 8637 45.64% 45.64% | 10286 54.36% 100.00% -system.ruby.L1Cache_Controller.I.Load::total 18923 -system.ruby.L1Cache_Controller.I.Ifetch | 116 17.39% 17.39% | 551 82.61% 100.00% -system.ruby.L1Cache_Controller.I.Ifetch::total 667 -system.ruby.L1Cache_Controller.I.Store | 5816 50.14% 50.14% | 5783 49.86% 100.00% -system.ruby.L1Cache_Controller.I.Store::total 11599 -system.ruby.L1Cache_Controller.I.L1_Replacement | 8686 50.09% 50.09% | 8655 49.91% 100.00% -system.ruby.L1Cache_Controller.I.L1_Replacement::total 17341 -system.ruby.L1Cache_Controller.S.Load | 551952 52.35% 52.35% | 502332 47.65% 100.00% -system.ruby.L1Cache_Controller.S.Load::total 1054284 -system.ruby.L1Cache_Controller.S.Ifetch | 67461431 53.66% 53.66% | 58259753 46.34% 100.00% -system.ruby.L1Cache_Controller.S.Ifetch::total 125721184 -system.ruby.L1Cache_Controller.S.Store | 12283 55.41% 55.41% | 9885 44.59% 100.00% -system.ruby.L1Cache_Controller.S.Store::total 22168 -system.ruby.L1Cache_Controller.S.Inv | 10821 45.28% 45.28% | 13078 54.72% 100.00% -system.ruby.L1Cache_Controller.S.Inv::total 23899 -system.ruby.L1Cache_Controller.S.L1_Replacement | 344781 38.07% 38.07% | 560779 61.93% 100.00% -system.ruby.L1Cache_Controller.S.L1_Replacement::total 905560 -system.ruby.L1Cache_Controller.E.Load | 1077334 27.76% 27.76% | 2803511 72.24% 100.00% -system.ruby.L1Cache_Controller.E.Load::total 3880845 -system.ruby.L1Cache_Controller.E.Store | 80360 48.21% 48.21% | 86332 51.79% 100.00% -system.ruby.L1Cache_Controller.E.Store::total 166692 -system.ruby.L1Cache_Controller.E.Inv | 55 56.12% 56.12% | 43 43.88% 100.00% -system.ruby.L1Cache_Controller.E.Inv::total 98 -system.ruby.L1Cache_Controller.E.L1_Replacement | 162044 14.59% 14.59% | 948886 85.41% 100.00% -system.ruby.L1Cache_Controller.E.L1_Replacement::total 1110930 -system.ruby.L1Cache_Controller.E.Fwd_GETX | 433 65.81% 65.81% | 225 34.19% 100.00% -system.ruby.L1Cache_Controller.E.Fwd_GETX::total 658 -system.ruby.L1Cache_Controller.E.Fwd_GETS | 907 40.65% 40.65% | 1324 59.35% 100.00% -system.ruby.L1Cache_Controller.E.Fwd_GETS::total 2231 -system.ruby.L1Cache_Controller.M.Load | 4126753 48.03% 48.03% | 4465569 51.97% 100.00% -system.ruby.L1Cache_Controller.M.Load::total 8592322 -system.ruby.L1Cache_Controller.M.Store | 4848403 48.25% 48.25% | 5200309 51.75% 100.00% -system.ruby.L1Cache_Controller.M.Store::total 10048712 -system.ruby.L1Cache_Controller.M.Inv | 167 44.53% 44.53% | 208 55.47% 100.00% -system.ruby.L1Cache_Controller.M.Inv::total 375 -system.ruby.L1Cache_Controller.M.L1_Replacement | 292440 50.83% 50.83% | 282914 49.17% 100.00% -system.ruby.L1Cache_Controller.M.L1_Replacement::total 575354 -system.ruby.L1Cache_Controller.M.Fwd_GETX | 11886 50.35% 50.35% | 11721 49.65% 100.00% -system.ruby.L1Cache_Controller.M.Fwd_GETX::total 23607 -system.ruby.L1Cache_Controller.M.Fwd_GETS | 13102 57.04% 57.04% | 9868 42.96% 100.00% -system.ruby.L1Cache_Controller.M.Fwd_GETS::total 22970 +system.ruby.L1Cache_Controller.Data | 793 43.48% 43.48% | 1031 56.52% 100.00% +system.ruby.L1Cache_Controller.Data::total 1824 +system.ruby.L1Cache_Controller.Data_Exclusive | 253693 19.77% 19.77% | 1029417 80.23% 100.00% +system.ruby.L1Cache_Controller.Data_Exclusive::total 1283110 +system.ruby.L1Cache_Controller.DataS_fromL1 | 10979 43.31% 43.31% | 14368 56.69% 100.00% +system.ruby.L1Cache_Controller.DataS_fromL1::total 25347 +system.ruby.L1Cache_Controller.Data_all_Acks | 582883 43.69% 43.69% | 751335 56.31% 100.00% +system.ruby.L1Cache_Controller.Data_all_Acks::total 1334218 +system.ruby.L1Cache_Controller.Ack | 12098 54.37% 54.37% | 10154 45.63% 100.00% +system.ruby.L1Cache_Controller.Ack::total 22252 +system.ruby.L1Cache_Controller.Ack_all | 12891 53.54% 53.54% | 11185 46.46% 100.00% +system.ruby.L1Cache_Controller.Ack_all::total 24076 +system.ruby.L1Cache_Controller.WB_Ack | 468087 27.72% 27.72% | 1220443 72.28% 100.00% +system.ruby.L1Cache_Controller.WB_Ack::total 1688530 +system.ruby.L1Cache_Controller.NP.Load | 281209 20.47% 20.47% | 1092251 79.53% 100.00% +system.ruby.L1Cache_Controller.NP.Load::total 1373460 +system.ruby.L1Cache_Controller.NP.Ifetch | 328766 40.20% 40.20% | 488985 59.80% 100.00% +system.ruby.L1Cache_Controller.NP.Ifetch::total 817751 +system.ruby.L1Cache_Controller.NP.Store | 223831 53.02% 53.02% | 198319 46.98% 100.00% +system.ruby.L1Cache_Controller.NP.Store::total 422150 +system.ruby.L1Cache_Controller.NP.Inv | 5086 54.54% 54.54% | 4239 45.46% 100.00% +system.ruby.L1Cache_Controller.NP.Inv::total 9325 +system.ruby.L1Cache_Controller.I.Load | 8631 45.67% 45.67% | 10269 54.33% 100.00% +system.ruby.L1Cache_Controller.I.Load::total 18900 +system.ruby.L1Cache_Controller.I.Ifetch | 106 16.23% 16.23% | 547 83.77% 100.00% +system.ruby.L1Cache_Controller.I.Ifetch::total 653 +system.ruby.L1Cache_Controller.I.Store | 5805 50.11% 50.11% | 5779 49.89% 100.00% +system.ruby.L1Cache_Controller.I.Store::total 11584 +system.ruby.L1Cache_Controller.I.L1_Replacement | 8985 51.90% 51.90% | 8328 48.10% 100.00% +system.ruby.L1Cache_Controller.I.L1_Replacement::total 17313 +system.ruby.L1Cache_Controller.S.Load | 530372 50.22% 50.22% | 525759 49.78% 100.00% +system.ruby.L1Cache_Controller.S.Load::total 1056131 +system.ruby.L1Cache_Controller.S.Ifetch | 67530179 53.69% 53.69% | 58254050 46.31% 100.00% +system.ruby.L1Cache_Controller.S.Ifetch::total 125784229 +system.ruby.L1Cache_Controller.S.Store | 12098 54.37% 54.37% | 10155 45.63% 100.00% +system.ruby.L1Cache_Controller.S.Store::total 22253 +system.ruby.L1Cache_Controller.S.Inv | 11044 46.05% 46.05% | 12940 53.95% 100.00% +system.ruby.L1Cache_Controller.S.Inv::total 23984 +system.ruby.L1Cache_Controller.S.L1_Replacement | 355711 39.28% 39.28% | 549760 60.72% 100.00% +system.ruby.L1Cache_Controller.S.L1_Replacement::total 905471 +system.ruby.L1Cache_Controller.E.Load | 1138534 29.37% 29.37% | 2737774 70.63% 100.00% +system.ruby.L1Cache_Controller.E.Load::total 3876308 +system.ruby.L1Cache_Controller.E.Store | 81127 48.65% 48.65% | 85645 51.35% 100.00% +system.ruby.L1Cache_Controller.E.Store::total 166772 +system.ruby.L1Cache_Controller.E.Inv | 48 57.83% 57.83% | 35 42.17% 100.00% +system.ruby.L1Cache_Controller.E.Inv::total 83 +system.ruby.L1Cache_Controller.E.L1_Replacement | 171015 15.36% 15.36% | 942391 84.64% 100.00% +system.ruby.L1Cache_Controller.E.L1_Replacement::total 1113406 +system.ruby.L1Cache_Controller.E.Fwd_GETX | 278 59.40% 59.40% | 190 40.60% 100.00% +system.ruby.L1Cache_Controller.E.Fwd_GETX::total 468 +system.ruby.L1Cache_Controller.E.Fwd_GETS | 1045 48.60% 48.60% | 1105 51.40% 100.00% +system.ruby.L1Cache_Controller.E.Fwd_GETS::total 2150 +system.ruby.L1Cache_Controller.M.Load | 4145208 48.18% 48.18% | 4458111 51.82% 100.00% +system.ruby.L1Cache_Controller.M.Load::total 8603319 +system.ruby.L1Cache_Controller.M.Store | 4890418 48.63% 48.63% | 5165106 51.37% 100.00% +system.ruby.L1Cache_Controller.M.Store::total 10055524 +system.ruby.L1Cache_Controller.M.Inv | 216 53.73% 53.73% | 186 46.27% 100.00% +system.ruby.L1Cache_Controller.M.Inv::total 402 +system.ruby.L1Cache_Controller.M.L1_Replacement | 297072 51.65% 51.65% | 278052 48.35% 100.00% +system.ruby.L1Cache_Controller.M.L1_Replacement::total 575124 +system.ruby.L1Cache_Controller.M.Fwd_GETX | 11941 50.62% 50.62% | 11649 49.38% 100.00% +system.ruby.L1Cache_Controller.M.Fwd_GETX::total 23590 +system.ruby.L1Cache_Controller.M.Fwd_GETS | 13319 57.43% 57.43% | 9874 42.57% 100.00% +system.ruby.L1Cache_Controller.M.Fwd_GETS::total 23193 system.ruby.L1Cache_Controller.M.Fwd_GET_INSTR | 4 100.00% 100.00% | 0 0.00% 100.00% system.ruby.L1Cache_Controller.M.Fwd_GET_INSTR::total 4 -system.ruby.L1Cache_Controller.IS.Data_Exclusive | 243874 19.04% 19.04% | 1037006 80.96% 100.00% -system.ruby.L1Cache_Controller.IS.Data_Exclusive::total 1280880 -system.ruby.L1Cache_Controller.IS.DataS_fromL1 | 11192 44.40% 44.40% | 14013 55.60% 100.00% -system.ruby.L1Cache_Controller.IS.DataS_fromL1::total 25205 -system.ruby.L1Cache_Controller.IS.Data_all_Acks | 343283 38.04% 38.04% | 559077 61.96% 100.00% -system.ruby.L1Cache_Controller.IS.Data_all_Acks::total 902360 -system.ruby.L1Cache_Controller.IM.Data | 658 37.77% 37.77% | 1084 62.23% 100.00% -system.ruby.L1Cache_Controller.IM.Data::total 1742 -system.ruby.L1Cache_Controller.IM.Data_all_Acks | 224537 51.95% 51.95% | 207698 48.05% 100.00% -system.ruby.L1Cache_Controller.IM.Data_all_Acks::total 432235 -system.ruby.L1Cache_Controller.SM.Ack | 12283 55.41% 55.41% | 9885 44.59% 100.00% -system.ruby.L1Cache_Controller.SM.Ack::total 22168 -system.ruby.L1Cache_Controller.SM.Ack_all | 12941 54.12% 54.12% | 10969 45.88% 100.00% -system.ruby.L1Cache_Controller.SM.Ack_all::total 23910 -system.ruby.L1Cache_Controller.M_I.Ifetch | 4 57.14% 57.14% | 3 42.86% 100.00% -system.ruby.L1Cache_Controller.M_I.Ifetch::total 7 -system.ruby.L1Cache_Controller.M_I.WB_Ack | 454484 26.95% 26.95% | 1231800 73.05% 100.00% -system.ruby.L1Cache_Controller.M_I.WB_Ack::total 1686284 -system.ruby.L2Cache_Controller.L1_GET_INSTR 817732 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_GETS 1390884 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_GETX 433978 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_UPGRADE 22168 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_PUTX 1686284 0.00% 0.00% -system.ruby.L2Cache_Controller.L2_Replacement 95716 0.00% 0.00% -system.ruby.L2Cache_Controller.L2_Replacement_clean 15992 0.00% 0.00% -system.ruby.L2Cache_Controller.Mem_Data 178413 0.00% 0.00% -system.ruby.L2Cache_Controller.Mem_Ack 113648 0.00% 0.00% -system.ruby.L2Cache_Controller.WB_Data 23349 0.00% 0.00% -system.ruby.L2Cache_Controller.WB_Data_clean 2231 0.00% 0.00% -system.ruby.L2Cache_Controller.Ack 1814 0.00% 0.00% -system.ruby.L2Cache_Controller.Ack_all 7922 0.00% 0.00% -system.ruby.L2Cache_Controller.Unblock 25205 0.00% 0.00% -system.ruby.L2Cache_Controller.Exclusive_Unblock 1737025 0.00% 0.00% -system.ruby.L2Cache_Controller.MEM_Inv 3880 0.00% 0.00% -system.ruby.L2Cache_Controller.NP.L1_GET_INSTR 16558 0.00% 0.00% -system.ruby.L2Cache_Controller.NP.L1_GETS 34140 0.00% 0.00% -system.ruby.L2Cache_Controller.NP.L1_GETX 127715 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_GET_INSTR 801143 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_GETS 84632 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_GETX 1919 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_UPGRADE 22168 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L2_Replacement 243 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L2_Replacement_clean 7577 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.MEM_Inv 4 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L1_GET_INSTR 27 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L1_GETS 1246740 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L1_GETX 280078 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L2_Replacement 95328 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L2_Replacement_clean 8315 0.00% 0.00% -system.ruby.L2Cache_Controller.M.MEM_Inv 1708 0.00% 0.00% +system.ruby.L1Cache_Controller.IS.Data_Exclusive | 253693 19.77% 19.77% | 1029417 80.23% 100.00% +system.ruby.L1Cache_Controller.IS.Data_Exclusive::total 1283110 +system.ruby.L1Cache_Controller.IS.DataS_fromL1 | 10979 43.31% 43.31% | 14368 56.69% 100.00% +system.ruby.L1Cache_Controller.IS.DataS_fromL1::total 25347 +system.ruby.L1Cache_Controller.IS.Data_all_Acks | 354040 39.24% 39.24% | 548267 60.76% 100.00% +system.ruby.L1Cache_Controller.IS.Data_all_Acks::total 902307 +system.ruby.L1Cache_Controller.IM.Data | 793 43.48% 43.48% | 1031 56.52% 100.00% +system.ruby.L1Cache_Controller.IM.Data::total 1824 +system.ruby.L1Cache_Controller.IM.Data_all_Acks | 228843 52.98% 52.98% | 203068 47.02% 100.00% +system.ruby.L1Cache_Controller.IM.Data_all_Acks::total 431911 +system.ruby.L1Cache_Controller.SM.Inv | 0 0.00% 0.00% | 1 100.00% 100.00% +system.ruby.L1Cache_Controller.SM.Inv::total 1 +system.ruby.L1Cache_Controller.SM.Ack | 12098 54.37% 54.37% | 10154 45.63% 100.00% +system.ruby.L1Cache_Controller.SM.Ack::total 22252 +system.ruby.L1Cache_Controller.SM.Ack_all | 12891 53.54% 53.54% | 11185 46.46% 100.00% +system.ruby.L1Cache_Controller.SM.Ack_all::total 24076 +system.ruby.L1Cache_Controller.M_I.Ifetch | 3 50.00% 50.00% | 3 50.00% 100.00% +system.ruby.L1Cache_Controller.M_I.Ifetch::total 6 +system.ruby.L1Cache_Controller.M_I.Fwd_GETX | 1 100.00% 100.00% | 0 0.00% 100.00% +system.ruby.L1Cache_Controller.M_I.Fwd_GETX::total 1 +system.ruby.L1Cache_Controller.M_I.WB_Ack | 468086 27.72% 27.72% | 1220443 72.28% 100.00% +system.ruby.L1Cache_Controller.M_I.WB_Ack::total 1688529 +system.ruby.L1Cache_Controller.SINK_WB_ACK.WB_Ack | 1 100.00% 100.00% | 0 0.00% 100.00% +system.ruby.L1Cache_Controller.SINK_WB_ACK.WB_Ack::total 1 +system.ruby.L2Cache_Controller.L1_GET_INSTR 818404 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_GETS 1392538 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_GETX 433736 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_UPGRADE 22253 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_PUTX 1688530 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_PUTX_old 1 0.00% 0.00% +system.ruby.L2Cache_Controller.L2_Replacement 95493 0.00% 0.00% +system.ruby.L2Cache_Controller.L2_Replacement_clean 15793 0.00% 0.00% +system.ruby.L2Cache_Controller.Mem_Data 178187 0.00% 0.00% +system.ruby.L2Cache_Controller.Mem_Ack 113483 0.00% 0.00% +system.ruby.L2Cache_Controller.WB_Data 23599 0.00% 0.00% +system.ruby.L2Cache_Controller.WB_Data_clean 2150 0.00% 0.00% +system.ruby.L2Cache_Controller.Ack 1627 0.00% 0.00% +system.ruby.L2Cache_Controller.Ack_all 7690 0.00% 0.00% +system.ruby.L2Cache_Controller.Unblock 25347 0.00% 0.00% +system.ruby.L2Cache_Controller.Exclusive_Unblock 1739097 0.00% 0.00% +system.ruby.L2Cache_Controller.MEM_Inv 4394 0.00% 0.00% +system.ruby.L2Cache_Controller.NP.L1_GET_INSTR 16549 0.00% 0.00% +system.ruby.L2Cache_Controller.NP.L1_GETS 34274 0.00% 0.00% +system.ruby.L2Cache_Controller.NP.L1_GETX 127364 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_GET_INSTR 801825 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_GETS 83907 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_GETX 1933 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_UPGRADE 22252 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L2_Replacement 275 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L2_Replacement_clean 7330 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.MEM_Inv 2 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L1_GET_INSTR 26 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L1_GETS 1248836 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L1_GETX 280379 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L2_Replacement 95073 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L2_Replacement_clean 8368 0.00% 0.00% +system.ruby.L2Cache_Controller.M.MEM_Inv 1950 0.00% 0.00% system.ruby.L2Cache_Controller.MT.L1_GET_INSTR 4 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L1_GETS 25201 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L1_GETX 24265 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L1_PUTX 1686284 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_GETS 25343 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_GETX 24059 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_PUTX 1688529 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_PUTX_old 1 0.00% 0.00% system.ruby.L2Cache_Controller.MT.L2_Replacement 145 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L2_Replacement_clean 100 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.MEM_Inv 228 0.00% 0.00% -system.ruby.L2Cache_Controller.M_I.Mem_Ack 113648 0.00% 0.00% -system.ruby.L2Cache_Controller.M_I.MEM_Inv 1708 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_I.WB_Data 330 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L2_Replacement_clean 95 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.MEM_Inv 245 0.00% 0.00% +system.ruby.L2Cache_Controller.M_I.Mem_Ack 113483 0.00% 0.00% +system.ruby.L2Cache_Controller.M_I.MEM_Inv 1950 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_I.WB_Data 347 0.00% 0.00% system.ruby.L2Cache_Controller.MT_I.Ack_all 43 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_I.MEM_Inv 228 0.00% 0.00% -system.ruby.L2Cache_Controller.MCT_I.WB_Data 45 0.00% 0.00% -system.ruby.L2Cache_Controller.MCT_I.Ack_all 55 0.00% 0.00% -system.ruby.L2Cache_Controller.I_I.Ack 1567 0.00% 0.00% -system.ruby.L2Cache_Controller.I_I.Ack_all 7577 0.00% 0.00% -system.ruby.L2Cache_Controller.S_I.Ack 247 0.00% 0.00% -system.ruby.L2Cache_Controller.S_I.Ack_all 247 0.00% 0.00% -system.ruby.L2Cache_Controller.S_I.MEM_Inv 4 0.00% 0.00% -system.ruby.L2Cache_Controller.ISS.Mem_Data 34140 0.00% 0.00% -system.ruby.L2Cache_Controller.IS.Mem_Data 16558 0.00% 0.00% -system.ruby.L2Cache_Controller.IM.Mem_Data 127715 0.00% 0.00% -system.ruby.L2Cache_Controller.SS_MB.L1_GETS 125 0.00% 0.00% -system.ruby.L2Cache_Controller.SS_MB.Exclusive_Unblock 24087 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_MB.L1_GETS 46 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_MB.L1_GETX 1 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_MB.Exclusive_Unblock 1712938 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IIB.WB_Data 22969 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IIB.WB_Data_clean 2231 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IIB.Unblock 5 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IB.WB_Data 5 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_SB.Unblock 25200 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_I.MEM_Inv 245 0.00% 0.00% +system.ruby.L2Cache_Controller.MCT_I.WB_Data 55 0.00% 0.00% +system.ruby.L2Cache_Controller.MCT_I.Ack_all 40 0.00% 0.00% +system.ruby.L2Cache_Controller.I_I.Ack 1351 0.00% 0.00% +system.ruby.L2Cache_Controller.I_I.Ack_all 7330 0.00% 0.00% +system.ruby.L2Cache_Controller.S_I.Ack 276 0.00% 0.00% +system.ruby.L2Cache_Controller.S_I.Ack_all 277 0.00% 0.00% +system.ruby.L2Cache_Controller.S_I.MEM_Inv 2 0.00% 0.00% +system.ruby.L2Cache_Controller.ISS.Mem_Data 34274 0.00% 0.00% +system.ruby.L2Cache_Controller.IS.Mem_Data 16549 0.00% 0.00% +system.ruby.L2Cache_Controller.IM.Mem_Data 127364 0.00% 0.00% +system.ruby.L2Cache_Controller.SS_MB.L1_GETS 131 0.00% 0.00% +system.ruby.L2Cache_Controller.SS_MB.L1_GETX 1 0.00% 0.00% +system.ruby.L2Cache_Controller.SS_MB.L1_UPGRADE 1 0.00% 0.00% +system.ruby.L2Cache_Controller.SS_MB.Exclusive_Unblock 24185 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_MB.L1_GETS 47 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_MB.L1_PUTX 1 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_MB.Exclusive_Unblock 1714912 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IIB.WB_Data 23196 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IIB.WB_Data_clean 2149 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IIB.Unblock 2 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IB.WB_Data 1 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IB.WB_Data_clean 1 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_SB.Unblock 25345 0.00% 0.00% ---------- End Simulation Statistics ---------- |