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Diffstat (limited to 'tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout')
-rwxr-xr-xtests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout8
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
index 483f7795e..e5c65571f 100755
--- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
+++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
@@ -1,16 +1,16 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 4 2012 12:01:47
-gem5 started Jun 4 2012 15:02:47
+gem5 compiled Mar 3 2013 21:18:30
+gem5 started Mar 3 2013 22:32:14
gem5 executing on zizzer
command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re tests/run.py build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic
Global frequency set at 2000000000 ticks per second
-info: No kernel set for full system simulation. Assuming you know what you're doing if not SPARC ISA
+info: No kernel set for full system simulation. Assuming you know what you're doing
0: system.t1000.htod: Real-time clock set to Thu Jan 1 00:00:00 2009
0: system.t1000.htod: Real-time clock set to 1230768000
info: Entering event queue @ 0. Starting simulation...
info: Ignoring write to SPARC ERROR regsiter
info: Ignoring write to SPARC ERROR regsiter
-Exiting @ tick 2233777512 because m5_exit instruction encountered
+Exiting @ tick 4467555024 because m5_exit instruction encountered