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-rw-r--r--tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini9
-rwxr-xr-xtests/long/se/00.gzip/ref/arm/linux/o3-timing/simout8
-rw-r--r--tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt18
-rw-r--r--tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini10
-rwxr-xr-xtests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout8
-rw-r--r--tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt10
-rw-r--r--tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini9
-rwxr-xr-xtests/long/se/00.gzip/ref/arm/linux/simple-timing/simout8
-rw-r--r--tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt22
9 files changed, 53 insertions, 49 deletions
diff --git a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini
index 043132ebd..d2c692362 100644
--- a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
mem_mode=atomic
memories=system.physmem
num_work_ids=16
-physmem=system.physmem
readfile=
symbolfile=
work_begin_ckpt_count=0
@@ -509,12 +508,12 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=gzip input.log 1
-cwd=build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing
+cwd=build/ARM/tests/opt/long/se/00.gzip/arm/linux/o3-timing
egid=100
env=
errout=cerr
euid=100
-executable=/projects/pd/randd/dist/cpu2000/binaries/arm/linux/gzip
+executable=/dist/m5/cpu2000/binaries/arm/linux/gzip
gid=100
input=cin
max_stack_size=67108864
@@ -537,8 +536,10 @@ master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
diff --git a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout
index 35fcd0232..6445e3ddc 100755
--- a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout
+++ b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Mar 17 2012 11:46:05
-gem5 started Mar 17 2012 16:38:16
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM/tests/fast/long/se/00.gzip/arm/linux/o3-timing
+gem5 compiled May 8 2012 15:17:37
+gem5 started May 8 2012 16:20:58
+gem5 executing on piton
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/00.gzip/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/00.gzip/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt
index 8bc0cbb1b..54f7feb76 100644
--- a/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.164248 # Nu
sim_ticks 164248292500 # Number of ticks simulated
final_tick 164248292500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 250614 # Simulator instruction rate (inst/s)
-host_op_rate 264817 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 72208895 # Simulator tick rate (ticks/s)
-host_mem_usage 224524 # Number of bytes of host memory used
-host_seconds 2274.63 # Real time elapsed on the host
+host_inst_rate 95192 # Simulator instruction rate (inst/s)
+host_op_rate 100587 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 27427613 # Simulator tick rate (ticks/s)
+host_mem_usage 231504 # Number of bytes of host memory used
+host_seconds 5988.43 # Real time elapsed on the host
sim_insts 570052728 # Number of instructions simulated
sim_ops 602360935 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 5850432 # Number of bytes read from this memory
@@ -377,8 +377,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 #
system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
system.cpu.icache.ReadReq_mshr_hits::cpu.inst 310 # number of ReadReq MSHR hits
@@ -474,7 +474,7 @@ system.cpu.dcache.blocked_cycles::no_targets 0
system.cpu.dcache.blocked::no_mshrs 2180 # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.avg_blocked_cycles::no_mshrs 4389.455963 # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
system.cpu.dcache.writebacks::writebacks 394908 # number of writebacks
@@ -601,7 +601,7 @@ system.cpu.l2cache.blocked_cycles::no_targets 0
system.cpu.l2cache.blocked::no_mshrs 332 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.avg_blocked_cycles::no_mshrs 6039.156627 # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes 0 # number of fast writes performed
system.cpu.l2cache.cache_copies 0 # number of cache copies performed
system.cpu.l2cache.writebacks::writebacks 58158 # number of writebacks
diff --git a/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini
index 867a31b3a..98278be8c 100644
--- a/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
mem_mode=atomic
memories=system.physmem
num_work_ids=16
-physmem=system.physmem
readfile=
symbolfile=
work_begin_ckpt_count=0
@@ -39,6 +38,7 @@ do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
+fastmem=false
function_trace=false
function_trace_start=0
interrupts=system.cpu.interrupts
@@ -95,12 +95,12 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=gzip input.log 1
-cwd=build/ARM/tests/fast/long/se/00.gzip/arm/linux/simple-atomic
+cwd=build/ARM/tests/opt/long/se/00.gzip/arm/linux/simple-atomic
egid=100
env=
errout=cerr
euid=100
-executable=/projects/pd/randd/dist/cpu2000/binaries/arm/linux/gzip
+executable=/dist/m5/cpu2000/binaries/arm/linux/gzip
gid=100
input=cin
max_stack_size=67108864
@@ -123,8 +123,10 @@ master=system.physmem.port[0]
slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
diff --git a/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout b/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout
index fda635c2d..aa43ef922 100755
--- a/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout
+++ b/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Mar 17 2012 11:46:05
-gem5 started Mar 17 2012 16:54:39
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/00.gzip/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/fast/long/se/00.gzip/arm/linux/simple-atomic
+gem5 compiled May 8 2012 15:17:37
+gem5 started May 8 2012 16:21:51
+gem5 executing on piton
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/00.gzip/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/long/se/00.gzip/arm/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt b/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt
index 1d050592c..b23b7f871 100644
--- a/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.301191 # Nu
sim_ticks 301191370000 # Number of ticks simulated
final_tick 301191370000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2848986 # Simulator instruction rate (inst/s)
-host_op_rate 3010454 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1505284316 # Simulator tick rate (ticks/s)
-host_mem_usage 213580 # Number of bytes of host memory used
-host_seconds 200.09 # Real time elapsed on the host
+host_inst_rate 1201570 # Simulator instruction rate (inst/s)
+host_op_rate 1269670 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 634859326 # Simulator tick rate (ticks/s)
+host_mem_usage 220780 # Number of bytes of host memory used
+host_seconds 474.42 # Real time elapsed on the host
sim_insts 570051644 # Number of instructions simulated
sim_ops 602359851 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 2680160157 # Number of bytes read from this memory
diff --git a/tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini b/tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini
index 877a85204..8ba39dd31 100644
--- a/tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini
+++ b/tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
mem_mode=atomic
memories=system.physmem
num_work_ids=16
-physmem=system.physmem
readfile=
symbolfile=
work_begin_ckpt_count=0
@@ -178,12 +177,12 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=gzip input.log 1
-cwd=build/ARM/tests/fast/long/se/00.gzip/arm/linux/simple-timing
+cwd=build/ARM/tests/opt/long/se/00.gzip/arm/linux/simple-timing
egid=100
env=
errout=cerr
euid=100
-executable=/projects/pd/randd/dist/cpu2000/binaries/arm/linux/gzip
+executable=/dist/m5/cpu2000/binaries/arm/linux/gzip
gid=100
input=cin
max_stack_size=67108864
@@ -206,8 +205,10 @@ master=system.physmem.port[0]
slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
diff --git a/tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout b/tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout
index 25af6cb73..ec5b6e605 100755
--- a/tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout
+++ b/tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Mar 17 2012 11:46:05
-gem5 started Mar 17 2012 16:58:09
-gem5 executing on u200540-lin
-command line: build/ARM/gem5.fast -d build/ARM/tests/fast/long/se/00.gzip/arm/linux/simple-timing -re tests/run.py build/ARM/tests/fast/long/se/00.gzip/arm/linux/simple-timing
+gem5 compiled May 8 2012 15:17:37
+gem5 started May 8 2012 16:22:17
+gem5 executing on piton
+command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/00.gzip/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/long/se/00.gzip/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
spec_init
diff --git a/tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt
index f70524856..dd6b444c4 100644
--- a/tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.796763 # Nu
sim_ticks 796762926000 # Number of ticks simulated
final_tick 796762926000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2008356 # Simulator instruction rate (inst/s)
-host_op_rate 2120897 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2814551305 # Simulator tick rate (ticks/s)
-host_mem_usage 222752 # Number of bytes of host memory used
-host_seconds 283.09 # Real time elapsed on the host
+host_inst_rate 606714 # Simulator instruction rate (inst/s)
+host_op_rate 640712 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 850261270 # Simulator tick rate (ticks/s)
+host_mem_usage 229976 # Number of bytes of host memory used
+host_seconds 937.08 # Real time elapsed on the host
sim_insts 568539343 # Number of instructions simulated
sim_ops 600398281 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 5759488 # Number of bytes read from this memory
@@ -129,8 +129,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 #
system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
system.cpu.icache.ReadReq_mshr_misses::cpu.inst 643 # number of ReadReq MSHR misses
@@ -213,8 +213,8 @@ system.cpu.dcache.blocked_cycles::no_mshrs 0 #
system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
system.cpu.dcache.writebacks::writebacks 392392 # number of writebacks
@@ -323,8 +323,8 @@ system.cpu.l2cache.blocked_cycles::no_mshrs 0 #
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes 0 # number of fast writes performed
system.cpu.l2cache.cache_copies 0 # number of cache copies performed
system.cpu.l2cache.writebacks::writebacks 57886 # number of writebacks