diff options
Diffstat (limited to 'tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt')
| -rw-r--r-- | tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt index 38958d98d..0c54e3227 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt +++ b/tests/long/se/10.mcf/ref/arm/linux/minor-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.062553 # Nu sim_ticks 62552970500 # Number of ticks simulated final_tick 62552970500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 185964 # Simulator instruction rate (inst/s) -host_op_rate 186891 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 128391357 # Simulator tick rate (ticks/s) -host_mem_usage 403424 # Number of bytes of host memory used -host_seconds 487.21 # Real time elapsed on the host +host_inst_rate 423901 # Simulator instruction rate (inst/s) +host_op_rate 426012 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 292664487 # Simulator tick rate (ticks/s) +host_mem_usage 404124 # Number of bytes of host memory used +host_seconds 213.74 # Real time elapsed on the host sim_insts 90602850 # Number of instructions simulated sim_ops 91054081 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -415,7 +415,9 @@ system.cpu.op_class_0::FloatAdd 0 0.00% 70.10% # Cl system.cpu.op_class_0::FloatCmp 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::FloatCvt 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::FloatMult 0 0.00% 70.10% # Class of committed instruction +system.cpu.op_class_0::FloatMultAcc 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::FloatDiv 0 0.00% 70.10% # Class of committed instruction +system.cpu.op_class_0::FloatMisc 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::FloatSqrt 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::SimdAdd 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::SimdAddAcc 0 0.00% 70.10% # Class of committed instruction @@ -437,8 +439,10 @@ system.cpu.op_class_0::SimdFloatMisc 15 0.00% 70.10% # Cl system.cpu.op_class_0::SimdFloatMult 0 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::SimdFloatMultAcc 2 0.00% 70.10% # Class of committed instruction system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 70.10% # Class of committed instruction -system.cpu.op_class_0::MemRead 22475911 24.68% 94.79% # Class of committed instruction -system.cpu.op_class_0::MemWrite 4744844 5.21% 100.00% # Class of committed instruction +system.cpu.op_class_0::MemRead 22475905 24.68% 94.79% # Class of committed instruction +system.cpu.op_class_0::MemWrite 4744822 5.21% 100.00% # Class of committed instruction +system.cpu.op_class_0::FloatMemRead 6 0.00% 100.00% # Class of committed instruction +system.cpu.op_class_0::FloatMemWrite 22 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::total 91054081 # Class of committed instruction |