summaryrefslogtreecommitdiff
path: root/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
diff options
context:
space:
mode:
Diffstat (limited to 'tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout')
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/o3-timing/simout9
1 files changed, 5 insertions, 4 deletions
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
index f37d93ec9..eaa0003ec 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
+++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
@@ -1,12 +1,13 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 21 2014 11:22:42
-gem5 started Jun 21 2014 21:33:12
+gem5 compiled Apr 22 2015 10:58:25
+gem5 started Apr 22 2015 11:34:28
gem5 executing on phenom
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x666d940
+ 0: system.cpu.isa: ISA system set to: 0 0x299b730
info: Entering event queue @ 0. Starting simulation...
MCF SPEC version 1.6.I
@@ -24,4 +25,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
-Exiting @ tick 26894328500 because target called exit()
+Exiting @ tick 58202727500 because target called exit()