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Diffstat (limited to 'tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt')
-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt40
1 files changed, 26 insertions, 14 deletions
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
index 3b8f7cb56..4f68c8fbf 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.058675 # Nu
sim_ticks 58675371500 # Number of ticks simulated
final_tick 58675371500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 111966 # Simulator instruction rate (inst/s)
-host_op_rate 112523 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 72520515 # Simulator tick rate (ticks/s)
-host_mem_usage 490592 # Number of bytes of host memory used
-host_seconds 809.09 # Real time elapsed on the host
+host_inst_rate 241655 # Simulator instruction rate (inst/s)
+host_op_rate 242858 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 156520643 # Simulator tick rate (ticks/s)
+host_mem_usage 492304 # Number of bytes of host memory used
+host_seconds 374.87 # Real time elapsed on the host
sim_insts 90589799 # Number of instructions simulated
sim_ops 91041030 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -515,7 +515,9 @@ system.cpu.iq.fu_full::FloatAdd 0 0.00% 48.67% # at
system.cpu.iq.fu_full::FloatCmp 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatCvt 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatMult 0 0.00% 48.67% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMultAcc 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatDiv 0 0.00% 48.67% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMisc 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::FloatSqrt 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAdd 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 48.67% # attempts to use FU when none available
@@ -537,8 +539,10 @@ system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 48.67% # at
system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 48.67% # attempts to use FU when none available
system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 48.67% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemRead 9615894 47.83% 96.50% # attempts to use FU when none available
-system.cpu.iq.fu_full::MemWrite 702925 3.50% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead 9615891 47.83% 96.50% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite 702910 3.50% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemRead 3 0.00% 100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMemWrite 24 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
system.cpu.iq.FU_type_0::No_OpClass 0 0.00% 0.00% # Type of FU issued
@@ -549,7 +553,9 @@ system.cpu.iq.FU_type_0::FloatAdd 0 0.00% 71.01% # Ty
system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::FloatMult 0 0.00% 71.01% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMultAcc 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 71.01% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMisc 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 71.01% # Type of FU issued
@@ -571,22 +577,24 @@ system.cpu.iq.FU_type_0::SimdFloatMisc 124 0.00% 71.01% # Ty
system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatMultAcc 2 0.00% 71.01% # Type of FU issued
system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 71.01% # Type of FU issued
-system.cpu.iq.FU_type_0::MemRead 24337772 24.01% 95.02% # Type of FU issued
-system.cpu.iq.FU_type_0::MemWrite 5047242 4.98% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead 24337764 24.01% 95.02% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite 5047220 4.98% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemRead 8 0.00% 100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMemWrite 22 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
system.cpu.iq.FU_type_0::total 101366888 # Type of FU issued
system.cpu.iq.rate 0.863794 # Inst issue rate
-system.cpu.iq.fu_busy_cnt 20102375 # FU busy when requested
+system.cpu.iq.fu_busy_cnt 20102384 # FU busy when requested
system.cpu.iq.fu_busy_rate 0.198313 # FU busy rate (busy events/executed inst)
system.cpu.iq.int_inst_queue_reads 341195448 # Number of integer instruction queue reads
system.cpu.iq.int_inst_queue_writes 128311397 # Number of integer instruction queue writes
system.cpu.iq.int_inst_queue_wakeup_accesses 99608403 # Number of integer instruction queue wakeup accesses
-system.cpu.iq.fp_inst_queue_reads 458 # Number of floating instruction queue reads
+system.cpu.iq.fp_inst_queue_reads 467 # Number of floating instruction queue reads
system.cpu.iq.fp_inst_queue_writes 626 # Number of floating instruction queue writes
system.cpu.iq.fp_inst_queue_wakeup_accesses 113 # Number of floating instruction queue wakeup accesses
system.cpu.iq.int_alu_accesses 121469025 # Number of integer alu accesses
-system.cpu.iq.fp_alu_accesses 238 # Number of floating point alu accesses
+system.cpu.iq.fp_alu_accesses 247 # Number of floating point alu accesses
system.cpu.iew.lsq.thread0.forwLoads 288057 # Number of loads that had data forwarded from stores
system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
system.cpu.iew.lsq.thread0.squashedLoads 4329351 # Number of loads squashed
@@ -665,7 +673,9 @@ system.cpu.commit.op_class_0::FloatAdd 0 0.00% 70.10% # Cl
system.cpu.commit.op_class_0::FloatCmp 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::FloatCvt 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::FloatMult 0 0.00% 70.10% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMultAcc 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::FloatDiv 0 0.00% 70.10% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMisc 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::FloatSqrt 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAdd 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::SimdAddAcc 0 0.00% 70.10% # Class of committed instruction
@@ -687,8 +697,10 @@ system.cpu.commit.op_class_0::SimdFloatMisc 15 0.00% 70.10% #
system.cpu.commit.op_class_0::SimdFloatMult 0 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatMultAcc 2 0.00% 70.10% # Class of committed instruction
system.cpu.commit.op_class_0::SimdFloatSqrt 0 0.00% 70.10% # Class of committed instruction
-system.cpu.commit.op_class_0::MemRead 22475911 24.68% 94.79% # Class of committed instruction
-system.cpu.commit.op_class_0::MemWrite 4744844 5.21% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::MemRead 22475905 24.68% 94.79% # Class of committed instruction
+system.cpu.commit.op_class_0::MemWrite 4744822 5.21% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemRead 6 0.00% 100.00% # Class of committed instruction
+system.cpu.commit.op_class_0::FloatMemWrite 22 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction
system.cpu.commit.op_class_0::total 91053639 # Class of committed instruction