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-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini10
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr1
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/o3-timing/simout8
-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt37
-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini21
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr1
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout8
-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt13
-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini34
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr1
-rwxr-xr-xtests/long/se/10.mcf/ref/arm/linux/simple-timing/simout8
-rw-r--r--tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt38
12 files changed, 142 insertions, 38 deletions
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini
index ab0c1f304..09e0d3e34 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini
@@ -159,6 +159,7 @@ mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
+sequential_access=false
size=262144
system=system
tags=system.cpu.dcache.tags
@@ -175,6 +176,7 @@ block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
+sequential_access=false
size=262144
[system.cpu.dtb]
@@ -514,6 +516,7 @@ mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
+sequential_access=false
size=131072
system=system
tags=system.cpu.icache.tags
@@ -530,6 +533,7 @@ block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
+sequential_access=false
size=131072
[system.cpu.interrupts]
@@ -584,6 +588,7 @@ mshrs=20
prefetch_on_access=false
prefetcher=Null
response_latency=20
+sequential_access=false
size=2097152
system=system
tags=system.cpu.l2cache.tags
@@ -600,6 +605,7 @@ block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=20
+sequential_access=false
size=2097152
[system.cpu.toL2Bus]
@@ -626,9 +632,9 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf
+executable=/dist/cpu2000/binaries/arm/linux/mcf
gid=100
-input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
+input=/dist/cpu2000/data/mcf/smred/input/mcf.in
max_stack_size=67108864
output=cout
pid=100
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr
index e45cd058f..1a4f96712 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr
+++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr
@@ -1,2 +1 @@
warn: Sockets disabled, not accepting gdb connections
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
index f7ab26f15..88b266667 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
+++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
@@ -1,9 +1,9 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Oct 16 2013 01:36:42
-gem5 started Oct 16 2013 01:59:02
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 17:24:06
+gem5 started Jan 22 2014 22:37:28
+gem5 executing on u200540-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
@@ -23,4 +23,4 @@ simplex iterations : 2663
flow value : 3080014995
checksum : 68389
optimal
-Exiting @ tick 26877484000 because target called exit()
+Exiting @ tick 26911413000 because target called exit()
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
index a6e3b7d23..f2d38a430 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
@@ -4,13 +4,15 @@ sim_seconds 0.026911 # Nu
sim_ticks 26911413000 # Number of ticks simulated
final_tick 26911413000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 116759 # Simulator instruction rate (inst/s)
-host_op_rate 117598 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 34685583 # Simulator tick rate (ticks/s)
-host_mem_usage 427272 # Number of bytes of host memory used
-host_seconds 775.87 # Real time elapsed on the host
+host_inst_rate 180996 # Simulator instruction rate (inst/s)
+host_op_rate 182296 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 53768206 # Simulator tick rate (ticks/s)
+host_mem_usage 381936 # Number of bytes of host memory used
+host_seconds 500.51 # Real time elapsed on the host
sim_insts 90589798 # Number of instructions simulated
sim_ops 91240351 # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage 1 # Voltage in Volts
+system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu.inst 45440 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 947712 # Number of bytes read from this memory
system.physmem.bytes_read::total 993152 # Number of bytes read from this memory
@@ -303,6 +305,7 @@ system.membus.reqLayer0.occupancy 19253000 # La
system.membus.reqLayer0.utilization 0.1 # Layer utilization (%)
system.membus.respLayer1.occupancy 145189999 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.5 # Layer utilization (%)
+system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.branchPred.lookups 26686306 # Number of BP lookups
system.cpu.branchPred.condPredicted 22003847 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 843168 # Number of conditional branches incorrect
@@ -648,6 +651,14 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy
system.cpu.icache.tags.occ_blocks::cpu.inst 632.612747 # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst 0.308893 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total 0.308893 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024 732 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0 38 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::2 15 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::4 676 # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024 0.357422 # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses 27691521 # Number of tag accesses
+system.cpu.icache.tags.data_accesses 27691521 # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst 13844401 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 13844401 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 13844401 # number of demand (read+write) hits
@@ -736,6 +747,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks 0.301529
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.018879 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.007075 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total 0.327483 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1024 15501 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0 42 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1 28 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2 513 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3 1300 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4 13618 # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024 0.473053 # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses 15189018 # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses 15189018 # Number of data accesses
system.cpu.l2cache.ReadReq_hits::cpu.inst 24 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 903618 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 903642 # number of ReadReq hits
@@ -893,6 +913,13 @@ system.cpu.dcache.tags.warmup_cycle 8006035000 # Cy
system.cpu.dcache.tags.occ_blocks::cpu.data 3671.733270 # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data 0.896419 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total 0.896419 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0 448 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1 3128 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2 520 # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses 59988680 # Number of tag accesses
+system.cpu.dcache.tags.data_accesses 59988680 # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data 23603772 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 23603772 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 4532846 # number of WriteReq hits
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini
index e8dafcae9..8155e41d5 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini
@@ -1,7 +1,9 @@
[root]
type=Root
children=system
+eventq_index=0
full_system=false
+sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
@@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
+eventq_index=0
init_param=0
kernel=
load_addr_mask=1099511627775
@@ -33,6 +36,7 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+eventq_index=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -45,6 +49,7 @@ do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
+eventq_index=0
fastmem=false
function_trace=false
function_trace_start=0
@@ -75,21 +80,25 @@ icache_port=system.membus.slave[1]
[system.cpu.dtb]
type=ArmTLB
children=walker
+eventq_index=0
size=64
walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+eventq_index=0
num_squash_per_cycle=2
sys=system
port=system.membus.slave[4]
[system.cpu.interrupts]
type=ArmInterrupts
+eventq_index=0
[system.cpu.isa]
type=ArmISA
+eventq_index=0
fpsid=1090793632
id_isar0=34607377
id_isar1=34677009
@@ -108,18 +117,21 @@ midr=890224640
[system.cpu.itb]
type=ArmTLB
children=walker
+eventq_index=0
size=64
walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+eventq_index=0
num_squash_per_cycle=2
sys=system
port=system.membus.slave[3]
[system.cpu.tracer]
type=ExeTracer
+eventq_index=0
[system.cpu.workload]
type=LiveProcess
@@ -129,9 +141,10 @@ egid=100
env=
errout=cerr
euid=100
-executable=/dist/m5/cpu2000/binaries/arm/linux/mcf
+eventq_index=0
+executable=/dist/cpu2000/binaries/arm/linux/mcf
gid=100
-input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
+input=/dist/cpu2000/data/mcf/smred/input/mcf.in
max_stack_size=67108864
output=cout
pid=100
@@ -143,11 +156,13 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+eventq_index=0
voltage_domain=system.voltage_domain
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
+eventq_index=0
header_cycles=1
system=system
use_default_range=false
@@ -160,6 +175,7 @@ type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
+eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
@@ -169,5 +185,6 @@ port=system.membus.master[0]
[system.voltage_domain]
type=VoltageDomain
+eventq_index=0
voltage=1.000000
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr
index e45cd058f..1a4f96712 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr
@@ -1,2 +1 @@
warn: Sockets disabled, not accepting gdb connections
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout
index a5dbe98d0..35b926dc8 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout
@@ -1,11 +1,9 @@
-Redirecting stdout to build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-atomic/simout
-Redirecting stderr to build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 22 2013 07:58:15
-gem5 started Sep 22 2013 08:18:17
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 17:24:06
+gem5 started Jan 22 2014 22:39:34
+gem5 executing on u200540-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
index 397354d07..be3e03048 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
@@ -4,13 +4,15 @@ sim_seconds 0.054241 # Nu
sim_ticks 54240661000 # Number of ticks simulated
final_tick 54240661000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2267620 # Simulator instruction rate (inst/s)
-host_op_rate 2283902 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1357548360 # Simulator tick rate (ticks/s)
-host_mem_usage 366572 # Number of bytes of host memory used
-host_seconds 39.95 # Real time elapsed on the host
+host_inst_rate 2327254 # Simulator instruction rate (inst/s)
+host_op_rate 2343964 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1393249116 # Simulator tick rate (ticks/s)
+host_mem_usage 371180 # Number of bytes of host memory used
+host_seconds 38.93 # Real time elapsed on the host
sim_insts 90602407 # Number of instructions simulated
sim_ops 91252960 # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage 1 # Voltage in Volts
+system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu.inst 431323080 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 90016598 # Number of bytes read from this memory
system.physmem.bytes_read::total 521339678 # Number of bytes read from this memory
@@ -36,6 +38,7 @@ system.physmem.bw_total::total 9960199711 # To
system.membus.throughput 9960199711 # Throughput (bytes/s)
system.membus.data_through_bus 540247816 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
+system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dtb.inst_hits 0 # ITB inst hits
system.cpu.dtb.inst_misses 0 # ITB inst misses
system.cpu.dtb.read_hits 0 # DTB read hits
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini
index 08fdda12e..f9a7d69b3 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini
@@ -1,7 +1,9 @@
[root]
type=Root
children=system
+eventq_index=0
full_system=false
+sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000
@@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
+eventq_index=0
init_param=0
kernel=
load_addr_mask=1099511627775
@@ -33,6 +36,7 @@ system_port=system.membus.slave[0]
[system.clk_domain]
type=SrcClockDomain
clock=1000
+eventq_index=0
voltage_domain=system.voltage_domain
[system.cpu]
@@ -45,6 +49,7 @@ do_checkpoint_insts=true
do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
+eventq_index=0
function_trace=false
function_trace_start=0
interrupts=system.cpu.interrupts
@@ -71,6 +76,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
@@ -79,6 +85,7 @@ mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
+sequential_access=false
size=262144
system=system
tags=system.cpu.dcache.tags
@@ -93,18 +100,22 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+eventq_index=0
hit_latency=2
+sequential_access=false
size=262144
[system.cpu.dtb]
type=ArmTLB
children=walker
+eventq_index=0
size=64
walker=system.cpu.dtb.walker
[system.cpu.dtb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+eventq_index=0
num_squash_per_cycle=2
sys=system
port=system.cpu.toL2Bus.slave[3]
@@ -115,6 +126,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
@@ -123,6 +135,7 @@ mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
+sequential_access=false
size=131072
system=system
tags=system.cpu.icache.tags
@@ -137,14 +150,18 @@ type=LRU
assoc=2
block_size=64
clk_domain=system.cpu_clk_domain
+eventq_index=0
hit_latency=2
+sequential_access=false
size=131072
[system.cpu.interrupts]
type=ArmInterrupts
+eventq_index=0
[system.cpu.isa]
type=ArmISA
+eventq_index=0
fpsid=1090793632
id_isar0=34607377
id_isar1=34677009
@@ -163,12 +180,14 @@ midr=890224640
[system.cpu.itb]
type=ArmTLB
children=walker
+eventq_index=0
size=64
walker=system.cpu.itb.walker
[system.cpu.itb.walker]
type=ArmTableWalker
clk_domain=system.cpu_clk_domain
+eventq_index=0
num_squash_per_cycle=2
sys=system
port=system.cpu.toL2Bus.slave[2]
@@ -179,6 +198,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+eventq_index=0
forward_snoops=true
hit_latency=20
is_top_level=false
@@ -187,6 +207,7 @@ mshrs=20
prefetch_on_access=false
prefetcher=Null
response_latency=20
+sequential_access=false
size=2097152
system=system
tags=system.cpu.l2cache.tags
@@ -201,12 +222,15 @@ type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
+eventq_index=0
hit_latency=20
+sequential_access=false
size=2097152
[system.cpu.toL2Bus]
type=CoherentBus
clk_domain=system.cpu_clk_domain
+eventq_index=0
header_cycles=1
system=system
use_default_range=false
@@ -216,6 +240,7 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walke
[system.cpu.tracer]
type=ExeTracer
+eventq_index=0
[system.cpu.workload]
type=LiveProcess
@@ -225,9 +250,10 @@ egid=100
env=
errout=cerr
euid=100
-executable=/dist/m5/cpu2000/binaries/arm/linux/mcf
+eventq_index=0
+executable=/dist/cpu2000/binaries/arm/linux/mcf
gid=100
-input=/dist/m5/cpu2000/data/mcf/smred/input/mcf.in
+input=/dist/cpu2000/data/mcf/smred/input/mcf.in
max_stack_size=67108864
output=cout
pid=100
@@ -239,11 +265,13 @@ uid=100
[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
+eventq_index=0
voltage_domain=system.voltage_domain
[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
+eventq_index=0
header_cycles=1
system=system
use_default_range=false
@@ -256,6 +284,7 @@ type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
+eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
@@ -265,5 +294,6 @@ port=system.membus.master[0]
[system.voltage_domain]
type=VoltageDomain
+eventq_index=0
voltage=1.000000
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr
index e45cd058f..1a4f96712 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr
@@ -1,2 +1 @@
warn: Sockets disabled, not accepting gdb connections
-hack: be nice to actually delete the event here
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout
index c84bc1d04..92da3b737 100755
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout
@@ -1,11 +1,9 @@
-Redirecting stdout to build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-timing/simout
-Redirecting stderr to build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 22 2013 07:58:15
-gem5 started Sep 22 2013 09:24:43
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 17:24:06
+gem5 started Jan 22 2014 22:40:24
+gem5 executing on u200540-lin
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
index e75e7c0cb..f99edcca6 100644
--- a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
@@ -4,13 +4,15 @@ sim_seconds 0.147136 # Nu
sim_ticks 147135976000 # Number of ticks simulated
final_tick 147135976000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 529408 # Simulator instruction rate (inst/s)
-host_op_rate 533204 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 859987474 # Simulator tick rate (ticks/s)
-host_mem_usage 373720 # Number of bytes of host memory used
-host_seconds 171.09 # Real time elapsed on the host
+host_inst_rate 1334589 # Simulator instruction rate (inst/s)
+host_op_rate 1344158 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 2167949307 # Simulator tick rate (ticks/s)
+host_mem_usage 379884 # Number of bytes of host memory used
+host_seconds 67.87 # Real time elapsed on the host
sim_insts 90576861 # Number of instructions simulated
sim_ops 91226312 # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage 1 # Voltage in Volts
+system.clk_domain.clock 1000 # Clock period in ticks
system.physmem.bytes_read::cpu.inst 36992 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 944768 # Number of bytes read from this memory
system.physmem.bytes_read::total 981760 # Number of bytes read from this memory
@@ -42,6 +44,7 @@ system.membus.reqLayer0.occupancy 15340000 # La
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
system.membus.respLayer1.occupancy 138060000 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
+system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dtb.inst_hits 0 # ITB inst hits
system.cpu.dtb.inst_misses 0 # ITB inst misses
system.cpu.dtb.read_hits 0 # DTB read hits
@@ -116,6 +119,14 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy
system.cpu.icache.tags.occ_blocks::cpu.inst 510.071144 # Average occupied blocks per requestor
system.cpu.icache.tags.occ_percent::cpu.inst 0.249058 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_percent::total 0.249058 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024 597 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0 35 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::2 1 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3 9 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::4 552 # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024 0.291504 # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses 215662141 # Number of tag accesses
+system.cpu.icache.tags.data_accesses 215662141 # Number of data accesses
system.cpu.icache.ReadReq_hits::cpu.inst 107830172 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 107830172 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 107830172 # number of demand (read+write) hits
@@ -198,6 +209,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks 0.270902
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.015110 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.005897 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total 0.291909 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1024 15323 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0 42 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1 4 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2 95 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3 1478 # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4 13704 # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024 0.467621 # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses 15179780 # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses 15179780 # Number of data accesses
system.cpu.l2cache.ReadReq_hits::cpu.inst 21 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 899975 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 899996 # number of ReadReq hits
@@ -330,6 +350,14 @@ system.cpu.dcache.tags.warmup_cycle 54472394000 # Cy
system.cpu.dcache.tags.occ_blocks::cpu.data 3565.217259 # Average occupied blocks per requestor
system.cpu.dcache.tags.occ_percent::cpu.data 0.870414 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_percent::total 0.870414 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0 128 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1 1322 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2 2583 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::3 63 # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses 55531122 # Number of tag accesses
+system.cpu.dcache.tags.data_accesses 55531122 # Number of data accesses
system.cpu.dcache.ReadReq_hits::cpu.data 21649218 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 21649218 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 4688372 # number of WriteReq hits