diff options
Diffstat (limited to 'tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt')
| -rw-r--r-- | tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt | 45 |
1 files changed, 40 insertions, 5 deletions
diff --git a/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt index 40a365e11..b41c1d4fe 100644 --- a/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt +++ b/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.361489 # Nu sim_ticks 361488530000 # Number of ticks simulated final_tick 361488530000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1027753 # Simulator instruction rate (inst/s) -host_op_rate 1027796 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1523718944 # Simulator tick rate (ticks/s) -host_mem_usage 413792 # Number of bytes of host memory used -host_seconds 237.24 # Real time elapsed on the host +host_inst_rate 653861 # Simulator instruction rate (inst/s) +host_op_rate 653888 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 969395755 # Simulator tick rate (ticks/s) +host_mem_usage 365508 # Number of bytes of host memory used +host_seconds 372.90 # Real time elapsed on the host sim_insts 243825150 # Number of instructions simulated sim_ops 243835265 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 56256 # Number of bytes read from this memory @@ -27,6 +27,21 @@ system.physmem.bw_inst_read::total 155623 # In system.physmem.bw_total::cpu.inst 155623 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 2606821 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 2762444 # Total bandwidth to/from this memory (bytes/s) +system.membus.throughput 2762444 # Throughput (bytes/s) +system.membus.trans_dist::ReadReq 1036 # Transaction distribution +system.membus.trans_dist::ReadResp 1036 # Transaction distribution +system.membus.trans_dist::ReadExReq 14567 # Transaction distribution +system.membus.trans_dist::ReadExResp 14567 # Transaction distribution +system.membus.pkt_count_system.cpu.l2cache.mem_side 31206 # Packet count per connected master and slave (bytes) +system.membus.pkt_count 31206 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 998592 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size 998592 # Cumulative packet size per connected master and slave (bytes) +system.membus.data_through_bus 998592 # Total data (bytes) +system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) +system.membus.reqLayer0.occupancy 15603000 # Layer occupancy (ticks) +system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) +system.membus.respLayer1.occupancy 140427000 # Layer occupancy (ticks) +system.membus.respLayer1.utilization 0.0 # Layer utilization (%) system.cpu.workload.num_syscalls 443 # Number of system calls system.cpu.numCycles 722977060 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started @@ -384,5 +399,25 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::total 11658.139334 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 11658.139334 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::total 11658.139334 # average overall mshr miss latency system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate +system.cpu.toL2Bus.throughput 332088036 # Throughput (bytes/s) +system.cpu.toL2Bus.trans_dist::ReadReq 893739 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadResp 893739 # Transaction distribution +system.cpu.toL2Bus.trans_dist::Writeback 935266 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExReq 46714 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExResp 46714 # Transaction distribution +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 1764 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 2814408 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count 2816172 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 56448 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 119989568 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size 120046016 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.data_through_bus 120046016 # Total data (bytes) +system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) +system.cpu.toL2Bus.reqLayer0.occupancy 1873125500 # Layer occupancy (ticks) +system.cpu.toL2Bus.reqLayer0.utilization 0.5 # Layer utilization (%) +system.cpu.toL2Bus.respLayer0.occupancy 1323000 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) +system.cpu.toL2Bus.respLayer1.occupancy 1409356500 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer1.utilization 0.4 # Layer utilization (%) ---------- End Simulation Statistics ---------- |