diff options
Diffstat (limited to 'tests/long/se/40.perlbmk/ref/alpha')
12 files changed, 141 insertions, 34 deletions
diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini index 3613fc19c..328cf1d6a 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini @@ -159,6 +159,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=262144 system=system tags=system.cpu.dcache.tags @@ -175,6 +176,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=2 +sequential_access=false size=262144 [system.cpu.dtb] @@ -504,6 +506,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=131072 system=system tags=system.cpu.icache.tags @@ -520,6 +523,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=2 +sequential_access=false size=131072 [system.cpu.interrupts] @@ -529,6 +533,7 @@ eventq_index=0 [system.cpu.isa] type=AlphaISA eventq_index=0 +system=system [system.cpu.itb] type=AlphaTLB @@ -550,6 +555,7 @@ mshrs=20 prefetch_on_access=false prefetcher=Null response_latency=20 +sequential_access=false size=2097152 system=system tags=system.cpu.l2cache.tags @@ -566,6 +572,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=20 +sequential_access=false size=2097152 [system.cpu.toL2Bus] @@ -592,7 +599,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk +executable=/dist/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr index ca52b457d..b38cab2f9 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr @@ -4,4 +4,3 @@ warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: ignoring syscall sigprocmask(0, 1, ...) warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) -hack: be nice to actually delete the event here diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout index 091ca3b5c..722b9bf34 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout @@ -1,11 +1,9 @@ -Redirecting stdout to build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing/simout -Redirecting stderr to build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 15 2013 18:24:51 -gem5 started Oct 15 2013 18:56:50 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 16:27:55 +gem5 started Jan 22 2014 17:50:38 +gem5 executing on u200540-lin command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -1387,4 +1385,4 @@ info: Increasing stack size by one page. 2000: 760651391 1000: 4031656975 0: 2206428413 -Exiting @ tick 631883288500 because target called exit() +Exiting @ tick 631518097500 because target called exit() diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt index 2a6478fe5..130b22828 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt @@ -4,13 +4,15 @@ sim_seconds 0.631518 # Nu sim_ticks 631518097500 # Number of ticks simulated final_tick 631518097500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 116160 # Simulator instruction rate (inst/s) -host_op_rate 116160 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 40238771 # Simulator tick rate (ticks/s) -host_mem_usage 286040 # Number of bytes of host memory used -host_seconds 15694.27 # Real time elapsed on the host +host_inst_rate 171044 # Simulator instruction rate (inst/s) +host_op_rate 171044 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 59250964 # Simulator tick rate (ticks/s) +host_mem_usage 240608 # Number of bytes of host memory used +host_seconds 10658.36 # Real time elapsed on the host sim_insts 1823043370 # Number of instructions simulated sim_ops 1823043370 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.inst 176128 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 30295488 # Number of bytes read from this memory system.physmem.bytes_read::total 30471616 # Number of bytes read from this memory @@ -314,6 +316,7 @@ system.membus.reqLayer0.occupancy 1230652000 # La system.membus.reqLayer0.utilization 0.2 # Layer utilization (%) system.membus.respLayer1.occupancy 4488013500 # Layer occupancy (ticks) system.membus.respLayer1.utilization 0.7 # Layer utilization (%) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.branchPred.lookups 388926557 # Number of BP lookups system.cpu.branchPred.condPredicted 255987580 # Number of conditional branches predicted system.cpu.branchPred.condIncorrect 25808786 # Number of conditional branches incorrect @@ -646,6 +649,14 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy system.cpu.icache.tags.occ_blocks::cpu.inst 1658.001589 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.809571 # Average percentage of cache occupancy system.cpu.icache.tags.occ_percent::total 0.809571 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 1713 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 77 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 68 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 1 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::4 1567 # Occupied blocks per task id +system.cpu.icache.tags.occ_task_id_percent::1024 0.836426 # Percentage of cache occupancy per task id +system.cpu.icache.tags.tag_accesses 789856696 # Number of tag accesses +system.cpu.icache.tags.data_accesses 789856696 # Number of data accesses system.cpu.icache.ReadReq_hits::cpu.inst 394910393 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 394910393 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 394910393 # number of demand (read+write) hits @@ -734,6 +745,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks 0.040675 system.cpu.l2cache.tags.occ_percent::cpu.inst 0.001074 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.955840 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::total 0.997589 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_task_id_blocks::1024 32736 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 156 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::1 188 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 505 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 5021 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 26866 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.999023 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 13650820 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 13650820 # Number of data accesses system.cpu.l2cache.ReadReq_hits::cpu.inst 7273 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1053738 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1061011 # number of ReadReq hits @@ -868,6 +888,15 @@ system.cpu.dcache.tags.warmup_cycle 408904250 # Cy system.cpu.dcache.tags.occ_blocks::cpu.data 4094.588575 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.999655 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_percent::total 0.999655 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 86 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 284 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 969 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::3 2365 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::4 392 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 1343398986 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 1343398986 # Number of data accesses system.cpu.dcache.ReadReq_hits::cpu.data 458212871 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 458212871 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 209732941 # number of WriteReq hits diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini index d4071b647..3b24ee769 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini @@ -1,7 +1,9 @@ [root] type=Root children=system +eventq_index=0 full_system=false +sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +eventq_index=0 init_param=0 kernel= load_addr_mask=1099511627775 @@ -33,6 +36,7 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +eventq_index=0 voltage_domain=system.voltage_domain [system.cpu] @@ -45,6 +49,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb +eventq_index=0 fastmem=false function_trace=false function_trace_start=0 @@ -74,20 +79,26 @@ icache_port=system.membus.slave[1] [system.cpu.dtb] type=AlphaTLB +eventq_index=0 size=64 [system.cpu.interrupts] type=AlphaInterrupts +eventq_index=0 [system.cpu.isa] type=AlphaISA +eventq_index=0 +system=system [system.cpu.itb] type=AlphaTLB +eventq_index=0 size=48 [system.cpu.tracer] type=ExeTracer +eventq_index=0 [system.cpu.workload] type=LiveProcess @@ -97,7 +108,8 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk +eventq_index=0 +executable=/dist/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -111,11 +123,13 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +eventq_index=0 voltage_domain=system.voltage_domain [system.membus] type=CoherentBus clk_domain=system.clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -128,6 +142,7 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +eventq_index=0 in_addr_map=true latency=30000 latency_var=0 @@ -137,5 +152,6 @@ port=system.membus.master[0] [system.voltage_domain] type=VoltageDomain +eventq_index=0 voltage=1.000000 diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr index 1c6544a2e..b38cab2f9 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr @@ -1,8 +1,6 @@ -warn: CoherentBus system.membus has no snooping ports attached! warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: ignoring syscall sigprocmask(0, 1, ...) warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) -hack: be nice to actually delete the event here diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simout b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simout index 0011f9cf8..385d89721 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simout +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 24 2013 03:08:53 -gem5 started Sep 28 2013 09:53:14 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 16:27:55 +gem5 started Jan 22 2014 17:53:08 +gem5 executing on u200540-lin command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt index e66382473..65e54342a 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt @@ -4,13 +4,15 @@ sim_seconds 1.004711 # Nu sim_ticks 1004710587000 # Number of ticks simulated final_tick 1004710587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 3493388 # Simulator instruction rate (inst/s) -host_op_rate 3493388 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1747070946 # Simulator tick rate (ticks/s) -host_mem_usage 225488 # Number of bytes of host memory used -host_seconds 575.08 # Real time elapsed on the host +host_inst_rate 3768106 # Simulator instruction rate (inst/s) +host_op_rate 3768106 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1884459398 # Simulator tick rate (ticks/s) +host_mem_usage 229696 # Number of bytes of host memory used +host_seconds 533.16 # Real time elapsed on the host sim_insts 2008987605 # Number of instructions simulated sim_ops 2008987605 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.inst 8037684280 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 3569416716 # Number of bytes read from this memory system.physmem.bytes_read::total 11607100996 # Number of bytes read from this memory @@ -36,6 +38,7 @@ system.physmem.bw_total::total 13131370496 # To system.membus.throughput 13131370496 # Throughput (bytes/s) system.membus.data_through_bus 13193226959 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini index d6223b426..34c972fc4 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini @@ -1,7 +1,9 @@ [root] type=Root children=system +eventq_index=0 full_system=false +sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +eventq_index=0 init_param=0 kernel= load_addr_mask=1099511627775 @@ -33,6 +36,7 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +eventq_index=0 voltage_domain=system.voltage_domain [system.cpu] @@ -45,6 +49,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu.interrupts @@ -71,6 +76,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -79,6 +85,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=262144 system=system tags=system.cpu.dcache.tags @@ -93,11 +100,14 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 +sequential_access=false size=262144 [system.cpu.dtb] type=AlphaTLB +eventq_index=0 size=64 [system.cpu.icache] @@ -106,6 +116,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -114,6 +125,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=131072 system=system tags=system.cpu.icache.tags @@ -128,17 +140,23 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 +sequential_access=false size=131072 [system.cpu.interrupts] type=AlphaInterrupts +eventq_index=0 [system.cpu.isa] type=AlphaISA +eventq_index=0 +system=system [system.cpu.itb] type=AlphaTLB +eventq_index=0 size=48 [system.cpu.l2cache] @@ -147,6 +165,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=20 is_top_level=false @@ -155,6 +174,7 @@ mshrs=20 prefetch_on_access=false prefetcher=Null response_latency=20 +sequential_access=false size=2097152 system=system tags=system.cpu.l2cache.tags @@ -169,12 +189,15 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=20 +sequential_access=false size=2097152 [system.cpu.toL2Bus] type=CoherentBus clk_domain=system.cpu_clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -184,6 +207,7 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side [system.cpu.tracer] type=ExeTracer +eventq_index=0 [system.cpu.workload] type=LiveProcess @@ -193,7 +217,8 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk +eventq_index=0 +executable=/dist/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -207,11 +232,13 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +eventq_index=0 voltage_domain=system.voltage_domain [system.membus] type=CoherentBus clk_domain=system.clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -224,6 +251,7 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +eventq_index=0 in_addr_map=true latency=30000 latency_var=0 @@ -233,5 +261,6 @@ port=system.membus.master[0] [system.voltage_domain] type=VoltageDomain +eventq_index=0 voltage=1.000000 diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr index ca52b457d..b38cab2f9 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr @@ -4,4 +4,3 @@ warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: ignoring syscall sigprocmask(0, 1, ...) warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) -hack: be nice to actually delete the event here diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simout b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simout index a19734d3d..f48beb892 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simout +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 24 2013 03:08:53 -gem5 started Sep 28 2013 09:53:14 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 16:27:55 +gem5 started Jan 22 2014 18:02:12 +gem5 executing on u200540-lin command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/long/se/40.perlbmk/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt index 421623453..068ca2e0b 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt @@ -4,13 +4,15 @@ sim_seconds 2.769740 # Nu sim_ticks 2769739533000 # Number of ticks simulated final_tick 2769739533000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 892879 # Simulator instruction rate (inst/s) -host_op_rate 892879 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1230989339 # Simulator tick rate (ticks/s) -host_mem_usage 233984 # Number of bytes of host memory used -host_seconds 2250.01 # Real time elapsed on the host +host_inst_rate 1540787 # Simulator instruction rate (inst/s) +host_op_rate 1540787 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2124243508 # Simulator tick rate (ticks/s) +host_mem_usage 238596 # Number of bytes of host memory used +host_seconds 1303.87 # Real time elapsed on the host sim_insts 2008987605 # Number of instructions simulated sim_ops 2008987605 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.inst 137792 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 30284544 # Number of bytes read from this memory system.physmem.bytes_read::total 30422336 # Number of bytes read from this memory @@ -50,6 +52,7 @@ system.membus.reqLayer0.occupancy 1077521000 # La system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) system.membus.respLayer1.occupancy 4278141000 # Layer occupancy (ticks) system.membus.respLayer1.utilization 0.2 # Layer utilization (%) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -114,6 +117,14 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy system.cpu.icache.tags.occ_blocks::cpu.inst 1478.418050 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.721884 # Average percentage of cache occupancy system.cpu.icache.tags.occ_percent::total 0.721884 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 1550 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 47 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 72 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::4 1428 # Occupied blocks per task id +system.cpu.icache.tags.occ_task_id_percent::1024 0.756836 # Percentage of cache occupancy per task id +system.cpu.icache.tags.tag_accesses 4018852738 # Number of tag accesses +system.cpu.icache.tags.data_accesses 4018852738 # Number of data accesses system.cpu.icache.ReadReq_hits::cpu.inst 2009410475 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 2009410475 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 2009410475 # number of demand (read+write) hits @@ -196,6 +207,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks 0.039688 system.cpu.l2cache.tags.occ_percent::cpu.inst 0.000809 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.957636 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::total 0.998134 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_task_id_blocks::1024 32732 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 100 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::1 174 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 116 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 1143 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 31199 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.998901 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 13642206 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 13642206 # Number of data accesses system.cpu.l2cache.ReadReq_hits::cpu.inst 8443 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1051869 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1060312 # number of ReadReq hits @@ -330,6 +350,15 @@ system.cpu.dcache.tags.warmup_cycle 1041395000 # Cy system.cpu.dcache.tags.occ_blocks::cpu.data 4095.197836 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.999804 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_percent::total 0.999804 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 55 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 160 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 466 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::3 999 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::4 2416 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 1445259988 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 1445259988 # Number of data accesses system.cpu.dcache.ReadReq_hits::cpu.data 509611834 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 509611834 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 210722944 # number of WriteReq hits |