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Diffstat (limited to 'tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini')
-rw-r--r--tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini62
1 files changed, 40 insertions, 22 deletions
diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini
index 3db3f48e9..000c8b0e4 100644
--- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini
@@ -23,6 +23,7 @@ load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
+mmap_using_noreserve=false
num_work_ids=16
readfile=
symbolfile=
@@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.branchPred]
-type=BranchPredictor
+type=BiModeBP
BTBEntries=2048
BTBTagSize=18
RASSize=16
@@ -145,11 +146,7 @@ eventq_index=0
globalCtrBits=2
globalPredictorSize=8192
instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
numThreads=1
-predType=bi-mode
[system.cpu.dcache]
type=BaseCache
@@ -157,6 +154,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=2
@@ -191,6 +189,7 @@ type=ArmStage2MMU
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu.dtb
[system.cpu.dstage2_mmu.stage2_tlb]
@@ -208,7 +207,6 @@ eventq_index=0
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu.toL2Bus.slave[5]
[system.cpu.dtb]
type=ArmTLB
@@ -498,8 +496,9 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
+forward_snoops=false
hit_latency=1
is_top_level=true
max_miss_count=0
@@ -558,6 +557,7 @@ id_mmfr3=34611729
id_pfr0=49
id_pfr1=4113
midr=1091551472
+pmu=Null
system=system
[system.cpu.istage2_mmu]
@@ -565,6 +565,7 @@ type=ArmStage2MMU
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu.itb
[system.cpu.istage2_mmu.stage2_tlb]
@@ -582,7 +583,6 @@ eventq_index=0
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu.toL2Bus.slave[4]
[system.cpu.itb]
type=ArmTLB
@@ -607,6 +607,7 @@ children=prefetcher tags
addr_ranges=0:18446744073709551615
assoc=16
clk_domain=system.cpu_clk_domain
+demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
hit_latency=12
@@ -628,19 +629,27 @@ mem_side=system.membus.slave[1]
[system.cpu.l2cache.prefetcher]
type=StridePrefetcher
+cache_snoop=false
clk_domain=system.cpu_clk_domain
-cross_pages=false
-data_accesses_only=false
degree=8
eventq_index=0
-inst_tagged=true
latency=1
-on_miss_only=false
-on_prefetch=true
-on_read_only=false
-serial_squash=false
-size=100
+max_conf=7
+min_conf=0
+on_data=true
+on_inst=true
+on_miss=false
+on_read=true
+on_write=true
+queue_filter=true
+queue_size=32
+queue_squash=true
+start_conf=4
sys=system
+table_assoc=4
+table_sets=16
+tag_prefetch=true
+thresh_conf=4
use_master_id=true
[system.cpu.l2cache.tags]
@@ -657,13 +666,16 @@ size=1048576
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
snoop_filter=Null
+snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@@ -673,14 +685,16 @@ eventq_index=0
type=LiveProcess
cmd=perlbmk -I. -I lib mdred.makerand.pl
cwd=build/ARM/tests/opt/long/se/40.perlbmk/arm/linux/o3-timing
+drivers=
egid=100
env=
errout=cerr
euid=100
eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk
+executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/perlbmk
gid=100
input=cin
+kvmInSE=false
max_stack_size=67108864
output=cout
pid=100
@@ -710,11 +724,14 @@ transition_latency=100000000
type=CoherentXBar
clk_domain=system.clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=4
+frontend_latency=3
+response_latency=2
snoop_filter=Null
+snoop_response_latency=4
system=system
use_default_range=false
-width=8
+width=16
master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
@@ -745,7 +762,7 @@ IDD62=0.000000
VDD=1.500000
VDD2=0.000000
activation_limit=4
-addr_mapping=RoRaBaChCo
+addr_mapping=RoRaBaCoCh
bank_groups_per_rank=0
banks_per_rank=8
burst_length=8
@@ -754,6 +771,7 @@ clk_domain=system.clk_domain
conf_table_reported=true
device_bus_width=8
device_rowbuffer_size=1024
+device_size=536870912
devices_per_rank=8
dll=true
eventq_index=0