diff options
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt')
| -rw-r--r-- | tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt | 991 |
1 files changed, 495 insertions, 496 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt index 47efecce5..acacb719c 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/stats.txt @@ -1,105 +1,105 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.058585 # Number of seconds simulated -sim_ticks 58584661500 # Number of ticks simulated -final_tick 58584661500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.059745 # Number of seconds simulated +sim_ticks 59744560000 # Number of ticks simulated +final_tick 59744560000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 201524 # Simulator instruction rate (inst/s) -host_op_rate 201524 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 133496887 # Simulator tick rate (ticks/s) -host_mem_usage 290684 # Number of bytes of host memory used -host_seconds 438.85 # Real time elapsed on the host +host_inst_rate 336953 # Simulator instruction rate (inst/s) +host_op_rate 336953 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 227629544 # Simulator tick rate (ticks/s) +host_mem_usage 304552 # Number of bytes of host memory used +host_seconds 262.46 # Real time elapsed on the host sim_insts 88438073 # Number of instructions simulated sim_ops 88438073 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks -system.physmem.bytes_read::cpu.inst 516608 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.inst 517248 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 10147776 # Number of bytes read from this memory -system.physmem.bytes_read::total 10664384 # Number of bytes read from this memory -system.physmem.bytes_inst_read::cpu.inst 516608 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::total 516608 # Number of instructions bytes read from this memory -system.physmem.bytes_written::writebacks 7299072 # Number of bytes written to this memory -system.physmem.bytes_written::total 7299072 # Number of bytes written to this memory -system.physmem.num_reads::cpu.inst 8072 # Number of read requests responded to by this memory +system.physmem.bytes_read::total 10665024 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu.inst 517248 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 517248 # Number of instructions bytes read from this memory +system.physmem.bytes_written::writebacks 7299008 # Number of bytes written to this memory +system.physmem.bytes_written::total 7299008 # Number of bytes written to this memory +system.physmem.num_reads::cpu.inst 8082 # Number of read requests responded to by this memory system.physmem.num_reads::cpu.data 158559 # Number of read requests responded to by this memory -system.physmem.num_reads::total 166631 # Number of read requests responded to by this memory -system.physmem.num_writes::writebacks 114048 # Number of write requests responded to by this memory -system.physmem.num_writes::total 114048 # Number of write requests responded to by this memory -system.physmem.bw_read::cpu.inst 8818144 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.data 173215578 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 182033722 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu.inst 8818144 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 8818144 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_write::writebacks 124590154 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 124590154 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total::writebacks 124590154 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.inst 8818144 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.data 173215578 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 306623876 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 166631 # Number of read requests accepted -system.physmem.writeReqs 114048 # Number of write requests accepted -system.physmem.readBursts 166631 # Number of DRAM read bursts, including those serviced by the write queue -system.physmem.writeBursts 114048 # Number of DRAM write bursts, including those merged in the write queue -system.physmem.bytesReadDRAM 10663872 # Total number of bytes read from DRAM -system.physmem.bytesReadWrQ 512 # Total number of bytes read from write queue -system.physmem.bytesWritten 7297088 # Total number of bytes written to DRAM -system.physmem.bytesReadSys 10664384 # Total read bytes from the system interface side -system.physmem.bytesWrittenSys 7299072 # Total written bytes from the system interface side -system.physmem.servicedByWrQ 8 # Number of DRAM read bursts serviced by the write queue +system.physmem.num_reads::total 166641 # Number of read requests responded to by this memory +system.physmem.num_writes::writebacks 114047 # Number of write requests responded to by this memory +system.physmem.num_writes::total 114047 # Number of write requests responded to by this memory +system.physmem.bw_read::cpu.inst 8657659 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 169852720 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 178510378 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 8657659 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 8657659 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write::writebacks 122170253 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::total 122170253 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::writebacks 122170253 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 8657659 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 169852720 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 300680631 # Total bandwidth to/from this memory (bytes/s) +system.physmem.readReqs 166641 # Number of read requests accepted +system.physmem.writeReqs 114047 # Number of write requests accepted +system.physmem.readBursts 166641 # Number of DRAM read bursts, including those serviced by the write queue +system.physmem.writeBursts 114047 # Number of DRAM write bursts, including those merged in the write queue +system.physmem.bytesReadDRAM 10664448 # Total number of bytes read from DRAM +system.physmem.bytesReadWrQ 576 # Total number of bytes read from write queue +system.physmem.bytesWritten 7297216 # Total number of bytes written to DRAM +system.physmem.bytesReadSys 10665024 # Total read bytes from the system interface side +system.physmem.bytesWrittenSys 7299008 # Total written bytes from the system interface side +system.physmem.servicedByWrQ 9 # Number of DRAM read bursts serviced by the write queue system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one system.physmem.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write -system.physmem.perBankRdBursts::0 10466 # Per bank write bursts -system.physmem.perBankRdBursts::1 10512 # Per bank write bursts +system.physmem.perBankRdBursts::0 10464 # Per bank write bursts +system.physmem.perBankRdBursts::1 10514 # Per bank write bursts system.physmem.perBankRdBursts::2 10315 # Per bank write bursts -system.physmem.perBankRdBursts::3 10093 # Per bank write bursts -system.physmem.perBankRdBursts::4 10429 # Per bank write bursts +system.physmem.perBankRdBursts::3 10095 # Per bank write bursts +system.physmem.perBankRdBursts::4 10432 # Per bank write bursts system.physmem.perBankRdBursts::5 10431 # Per bank write bursts -system.physmem.perBankRdBursts::6 9849 # Per bank write bursts -system.physmem.perBankRdBursts::7 10302 # Per bank write bursts -system.physmem.perBankRdBursts::8 10595 # Per bank write bursts +system.physmem.perBankRdBursts::6 9850 # Per bank write bursts +system.physmem.perBankRdBursts::7 10303 # Per bank write bursts +system.physmem.perBankRdBursts::8 10594 # Per bank write bursts system.physmem.perBankRdBursts::9 10644 # Per bank write bursts -system.physmem.perBankRdBursts::10 10598 # Per bank write bursts -system.physmem.perBankRdBursts::11 10258 # Per bank write bursts -system.physmem.perBankRdBursts::12 10302 # Per bank write bursts -system.physmem.perBankRdBursts::13 10653 # Per bank write bursts +system.physmem.perBankRdBursts::10 10596 # Per bank write bursts +system.physmem.perBankRdBursts::11 10260 # Per bank write bursts +system.physmem.perBankRdBursts::12 10303 # Per bank write bursts +system.physmem.perBankRdBursts::13 10654 # Per bank write bursts system.physmem.perBankRdBursts::14 10528 # Per bank write bursts -system.physmem.perBankRdBursts::15 10648 # Per bank write bursts +system.physmem.perBankRdBursts::15 10649 # Per bank write bursts system.physmem.perBankWrBursts::0 7087 # Per bank write bursts system.physmem.perBankWrBursts::1 7261 # Per bank write bursts system.physmem.perBankWrBursts::2 7255 # Per bank write bursts system.physmem.perBankWrBursts::3 6998 # Per bank write bursts system.physmem.perBankWrBursts::4 7126 # Per bank write bursts -system.physmem.perBankWrBursts::5 7176 # Per bank write bursts +system.physmem.perBankWrBursts::5 7178 # Per bank write bursts system.physmem.perBankWrBursts::6 6771 # Per bank write bursts -system.physmem.perBankWrBursts::7 7084 # Per bank write bursts -system.physmem.perBankWrBursts::8 7223 # Per bank write bursts -system.physmem.perBankWrBursts::9 6938 # Per bank write bursts -system.physmem.perBankWrBursts::10 7096 # Per bank write bursts -system.physmem.perBankWrBursts::11 6991 # Per bank write bursts -system.physmem.perBankWrBursts::12 6966 # Per bank write bursts +system.physmem.perBankWrBursts::7 7080 # Per bank write bursts +system.physmem.perBankWrBursts::8 7224 # Per bank write bursts +system.physmem.perBankWrBursts::9 6940 # Per bank write bursts +system.physmem.perBankWrBursts::10 7097 # Per bank write bursts +system.physmem.perBankWrBursts::11 6990 # Per bank write bursts +system.physmem.perBankWrBursts::12 6967 # Per bank write bursts system.physmem.perBankWrBursts::13 7289 # Per bank write bursts system.physmem.perBankWrBursts::14 7284 # Per bank write bursts system.physmem.perBankWrBursts::15 7472 # Per bank write bursts system.physmem.numRdRetry 0 # Number of times read queue was full causing retry system.physmem.numWrRetry 0 # Number of times write queue was full causing retry -system.physmem.totGap 58584634500 # Total gap between requests +system.physmem.totGap 59744533000 # Total gap between requests system.physmem.readPktSize::0 0 # Read request sizes (log2) system.physmem.readPktSize::1 0 # Read request sizes (log2) system.physmem.readPktSize::2 0 # Read request sizes (log2) system.physmem.readPktSize::3 0 # Read request sizes (log2) system.physmem.readPktSize::4 0 # Read request sizes (log2) system.physmem.readPktSize::5 0 # Read request sizes (log2) -system.physmem.readPktSize::6 166631 # Read request sizes (log2) +system.physmem.readPktSize::6 166641 # Read request sizes (log2) system.physmem.writePktSize::0 0 # Write request sizes (log2) system.physmem.writePktSize::1 0 # Write request sizes (log2) system.physmem.writePktSize::2 0 # Write request sizes (log2) system.physmem.writePktSize::3 0 # Write request sizes (log2) system.physmem.writePktSize::4 0 # Write request sizes (log2) system.physmem.writePktSize::5 0 # Write request sizes (log2) -system.physmem.writePktSize::6 114048 # Write request sizes (log2) -system.physmem.rdQLenPdf::0 165000 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::1 1595 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::2 28 # What read queue length does an incoming req see +system.physmem.writePktSize::6 114047 # Write request sizes (log2) +system.physmem.rdQLenPdf::0 165067 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::1 1538 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::2 27 # What read queue length does an incoming req see system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see @@ -144,27 +144,27 @@ system.physmem.wrQLenPdf::11 1 # Wh system.physmem.wrQLenPdf::12 1 # What write queue length does an incoming req see system.physmem.wrQLenPdf::13 1 # What write queue length does an incoming req see system.physmem.wrQLenPdf::14 1 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::15 751 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::16 770 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::17 6204 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::18 6975 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::19 7034 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::20 7027 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::21 7034 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::22 7043 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::23 7044 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::24 7064 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::25 7071 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::26 7065 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::27 7192 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::28 7177 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::29 7138 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::30 7350 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::31 7067 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::32 7016 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::15 739 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::16 757 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::17 6170 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::18 6985 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::19 7023 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::20 7039 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::21 7045 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::22 7046 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::23 7048 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::24 7057 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::25 7086 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::26 7064 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::27 7260 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::28 7109 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::29 7129 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::30 7372 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::31 7071 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::32 7023 # What write queue length does an incoming req see system.physmem.wrQLenPdf::33 9 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::34 1 # What write queue length does an incoming req see -system.physmem.wrQLenPdf::35 1 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::34 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::35 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::36 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::37 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::38 0 # What write queue length does an incoming req see @@ -193,122 +193,121 @@ system.physmem.wrQLenPdf::60 0 # Wh system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.physmem.bytesPerActivate::samples 54549 # Bytes accessed per row activation -system.physmem.bytesPerActivate::mean 329.259345 # Bytes accessed per row activation -system.physmem.bytesPerActivate::gmean 194.795576 # Bytes accessed per row activation -system.physmem.bytesPerActivate::stdev 332.998077 # Bytes accessed per row activation -system.physmem.bytesPerActivate::0-127 19535 35.81% 35.81% # Bytes accessed per row activation -system.physmem.bytesPerActivate::128-255 11763 21.56% 57.38% # Bytes accessed per row activation -system.physmem.bytesPerActivate::256-383 5616 10.30% 67.67% # Bytes accessed per row activation -system.physmem.bytesPerActivate::384-511 3566 6.54% 74.21% # Bytes accessed per row activation -system.physmem.bytesPerActivate::512-639 2684 4.92% 79.13% # Bytes accessed per row activation -system.physmem.bytesPerActivate::640-767 2055 3.77% 82.90% # Bytes accessed per row activation -system.physmem.bytesPerActivate::768-895 1672 3.07% 85.96% # Bytes accessed per row activation -system.physmem.bytesPerActivate::896-1023 1540 2.82% 88.78% # Bytes accessed per row activation -system.physmem.bytesPerActivate::1024-1151 6118 11.22% 100.00% # Bytes accessed per row activation -system.physmem.bytesPerActivate::total 54549 # Bytes accessed per row activation -system.physmem.rdPerTurnAround::samples 7016 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::mean 23.746152 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::stdev 348.264922 # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::0-1023 7014 99.97% 99.97% # Reads before turning the bus around for writes +system.physmem.bytesPerActivate::samples 54673 # Bytes accessed per row activation +system.physmem.bytesPerActivate::mean 328.521940 # Bytes accessed per row activation +system.physmem.bytesPerActivate::gmean 195.158907 # Bytes accessed per row activation +system.physmem.bytesPerActivate::stdev 330.861003 # Bytes accessed per row activation +system.physmem.bytesPerActivate::0-127 19447 35.57% 35.57% # Bytes accessed per row activation +system.physmem.bytesPerActivate::128-255 11824 21.63% 57.20% # Bytes accessed per row activation +system.physmem.bytesPerActivate::256-383 5661 10.35% 67.55% # Bytes accessed per row activation +system.physmem.bytesPerActivate::384-511 3636 6.65% 74.20% # Bytes accessed per row activation +system.physmem.bytesPerActivate::512-639 2772 5.07% 79.27% # Bytes accessed per row activation +system.physmem.bytesPerActivate::640-767 2160 3.95% 83.22% # Bytes accessed per row activation +system.physmem.bytesPerActivate::768-895 1686 3.08% 86.31% # Bytes accessed per row activation +system.physmem.bytesPerActivate::896-1023 1520 2.78% 89.09% # Bytes accessed per row activation +system.physmem.bytesPerActivate::1024-1151 5967 10.91% 100.00% # Bytes accessed per row activation +system.physmem.bytesPerActivate::total 54673 # Bytes accessed per row activation +system.physmem.rdPerTurnAround::samples 7019 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::mean 23.740134 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::stdev 348.174119 # Reads before turning the bus around for writes +system.physmem.rdPerTurnAround::0-1023 7017 99.97% 99.97% # Reads before turning the bus around for writes system.physmem.rdPerTurnAround::1024-2047 1 0.01% 99.99% # Reads before turning the bus around for writes system.physmem.rdPerTurnAround::28672-29695 1 0.01% 100.00% # Reads before turning the bus around for writes -system.physmem.rdPerTurnAround::total 7016 # Reads before turning the bus around for writes -system.physmem.wrPerTurnAround::samples 7016 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::mean 16.250998 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::gmean 16.234711 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::stdev 0.764594 # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::16 6252 89.11% 89.11% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::17 8 0.11% 89.22% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::18 591 8.42% 97.65% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::19 125 1.78% 99.43% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::20 23 0.33% 99.76% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::21 8 0.11% 99.87% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::22 5 0.07% 99.94% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::23 1 0.01% 99.96% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::24 2 0.03% 99.99% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::27 1 0.01% 100.00% # Writes before turning the bus around for reads -system.physmem.wrPerTurnAround::total 7016 # Writes before turning the bus around for reads -system.physmem.totQLat 1948128750 # Total ticks spent queuing -system.physmem.totMemAccLat 5072310000 # Total ticks spent from burst creation until serviced by the DRAM -system.physmem.totBusLat 833115000 # Total ticks spent in databus transfers -system.physmem.avgQLat 11691.84 # Average queueing delay per DRAM burst +system.physmem.rdPerTurnAround::total 7019 # Reads before turning the bus around for writes +system.physmem.wrPerTurnAround::samples 7018 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::mean 16.245939 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::gmean 16.230597 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::stdev 0.737975 # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::16 6255 89.13% 89.13% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::17 17 0.24% 89.37% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::18 574 8.18% 97.55% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::19 144 2.05% 99.60% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::20 20 0.28% 99.89% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::21 4 0.06% 99.94% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::22 2 0.03% 99.97% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::24 1 0.01% 99.99% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::25 1 0.01% 100.00% # Writes before turning the bus around for reads +system.physmem.wrPerTurnAround::total 7018 # Writes before turning the bus around for reads +system.physmem.totQLat 1983100250 # Total ticks spent queuing +system.physmem.totMemAccLat 5107450250 # Total ticks spent from burst creation until serviced by the DRAM +system.physmem.totBusLat 833160000 # Total ticks spent in databus transfers +system.physmem.avgQLat 11901.08 # Average queueing delay per DRAM burst system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst -system.physmem.avgMemAccLat 30441.84 # Average memory access latency per DRAM burst -system.physmem.avgRdBW 182.02 # Average DRAM read bandwidth in MiByte/s -system.physmem.avgWrBW 124.56 # Average achieved write bandwidth in MiByte/s -system.physmem.avgRdBWSys 182.03 # Average system read bandwidth in MiByte/s -system.physmem.avgWrBWSys 124.59 # Average system write bandwidth in MiByte/s +system.physmem.avgMemAccLat 30651.08 # Average memory access latency per DRAM burst +system.physmem.avgRdBW 178.50 # Average DRAM read bandwidth in MiByte/s +system.physmem.avgWrBW 122.14 # Average achieved write bandwidth in MiByte/s +system.physmem.avgRdBWSys 178.51 # Average system read bandwidth in MiByte/s +system.physmem.avgWrBWSys 122.17 # Average system write bandwidth in MiByte/s system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s -system.physmem.busUtil 2.40 # Data bus utilization in percentage -system.physmem.busUtilRead 1.42 # Data bus utilization in percentage for reads -system.physmem.busUtilWrite 0.97 # Data bus utilization in percentage for writes +system.physmem.busUtil 2.35 # Data bus utilization in percentage +system.physmem.busUtilRead 1.39 # Data bus utilization in percentage for reads +system.physmem.busUtilWrite 0.95 # Data bus utilization in percentage for writes system.physmem.avgRdQLen 1.00 # Average read queue length when enqueuing -system.physmem.avgWrQLen 24.07 # Average write queue length when enqueuing -system.physmem.readRowHits 144841 # Number of row buffer hits during reads -system.physmem.writeRowHits 81248 # Number of row buffer hits during writes -system.physmem.readRowHitRate 86.93 # Row buffer hit rate for reads +system.physmem.avgWrQLen 24.05 # Average write queue length when enqueuing +system.physmem.readRowHits 144723 # Number of row buffer hits during reads +system.physmem.writeRowHits 81251 # Number of row buffer hits during writes +system.physmem.readRowHitRate 86.85 # Row buffer hit rate for reads system.physmem.writeRowHitRate 71.24 # Row buffer hit rate for writes -system.physmem.avgGap 208724.68 # Average gap between requests -system.physmem.pageHitRate 80.55 # Row buffer hit rate, read and write combined -system.physmem_0.actEnergy 199077480 # Energy for activate commands per rank (pJ) -system.physmem_0.preEnergy 108623625 # Energy for precharge commands per rank (pJ) -system.physmem_0.readEnergy 642681000 # Energy for read commands per rank (pJ) -system.physmem_0.writeEnergy 367791840 # Energy for write commands per rank (pJ) -system.physmem_0.refreshEnergy 3826405440 # Energy for refresh commands per rank (pJ) -system.physmem_0.actBackEnergy 12184332255 # Energy for active background per rank (pJ) -system.physmem_0.preBackEnergy 24462392250 # Energy for precharge background per rank (pJ) -system.physmem_0.totalEnergy 41791303890 # Total energy per rank (pJ) -system.physmem_0.averagePower 713.356895 # Core power per rank (mW) -system.physmem_0.memoryStateTime::IDLE 40549753500 # Time in different power states -system.physmem_0.memoryStateTime::REF 1956240000 # Time in different power states +system.physmem.avgGap 212850.33 # Average gap between requests +system.physmem.pageHitRate 80.51 # Row buffer hit rate, read and write combined +system.physmem_0.actEnergy 199115280 # Energy for activate commands per rank (pJ) +system.physmem_0.preEnergy 108644250 # Energy for precharge commands per rank (pJ) +system.physmem_0.readEnergy 642735600 # Energy for read commands per rank (pJ) +system.physmem_0.writeEnergy 367778880 # Energy for write commands per rank (pJ) +system.physmem_0.refreshEnergy 3902180880 # Energy for refresh commands per rank (pJ) +system.physmem_0.actBackEnergy 12699594585 # Energy for active background per rank (pJ) +system.physmem_0.preBackEnergy 24706498500 # Energy for precharge background per rank (pJ) +system.physmem_0.totalEnergy 42626547975 # Total energy per rank (pJ) +system.physmem_0.averagePower 713.484810 # Core power per rank (mW) +system.physmem_0.memoryStateTime::IDLE 40950314500 # Time in different power states +system.physmem_0.memoryStateTime::REF 1994980000 # Time in different power states system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem_0.memoryStateTime::ACT 16078529000 # Time in different power states +system.physmem_0.memoryStateTime::ACT 16799112000 # Time in different power states system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states -system.physmem_1.actEnergy 213282720 # Energy for activate commands per rank (pJ) -system.physmem_1.preEnergy 116374500 # Energy for precharge commands per rank (pJ) -system.physmem_1.readEnergy 656908200 # Energy for read commands per rank (pJ) -system.physmem_1.writeEnergy 371038320 # Energy for write commands per rank (pJ) -system.physmem_1.refreshEnergy 3826405440 # Energy for refresh commands per rank (pJ) -system.physmem_1.actBackEnergy 12703202685 # Energy for active background per rank (pJ) -system.physmem_1.preBackEnergy 24007242750 # Energy for precharge background per rank (pJ) -system.physmem_1.totalEnergy 41894454615 # Total energy per rank (pJ) -system.physmem_1.averagePower 715.117627 # Core power per rank (mW) -system.physmem_1.memoryStateTime::IDLE 39789307500 # Time in different power states -system.physmem_1.memoryStateTime::REF 1956240000 # Time in different power states +system.physmem_1.actEnergy 214197480 # Energy for activate commands per rank (pJ) +system.physmem_1.preEnergy 116873625 # Energy for precharge commands per rank (pJ) +system.physmem_1.readEnergy 656962800 # Energy for read commands per rank (pJ) +system.physmem_1.writeEnergy 371031840 # Energy for write commands per rank (pJ) +system.physmem_1.refreshEnergy 3902180880 # Energy for refresh commands per rank (pJ) +system.physmem_1.actBackEnergy 13192492680 # Energy for active background per rank (pJ) +system.physmem_1.preBackEnergy 24274131750 # Energy for precharge background per rank (pJ) +system.physmem_1.totalEnergy 42727871055 # Total energy per rank (pJ) +system.physmem_1.averagePower 715.180760 # Core power per rank (mW) +system.physmem_1.memoryStateTime::IDLE 40226086750 # Time in different power states +system.physmem_1.memoryStateTime::REF 1994980000 # Time in different power states system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem_1.memoryStateTime::ACT 16838471250 # Time in different power states +system.physmem_1.memoryStateTime::ACT 17523103250 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states -system.cpu.branchPred.lookups 14678313 # Number of BP lookups -system.cpu.branchPred.condPredicted 9498021 # Number of conditional branches predicted -system.cpu.branchPred.condIncorrect 389703 # Number of conditional branches incorrect -system.cpu.branchPred.BTBLookups 9975544 # Number of BTB lookups -system.cpu.branchPred.BTBHits 6390264 # Number of BTB hits +system.cpu.branchPred.lookups 14679718 # Number of BP lookups +system.cpu.branchPred.condPredicted 9498983 # Number of conditional branches predicted +system.cpu.branchPred.condIncorrect 392764 # Number of conditional branches incorrect +system.cpu.branchPred.BTBLookups 10434122 # Number of BTB lookups +system.cpu.branchPred.BTBHits 6393495 # Number of BTB hits system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly. -system.cpu.branchPred.BTBHitPct 64.059303 # BTB Hit Percentage -system.cpu.branchPred.usedRAS 1709596 # Number of times the RAS was used to get a target. -system.cpu.branchPred.RASInCorrect 85905 # Number of incorrect RAS predictions. +system.cpu.branchPred.BTBHitPct 61.274873 # BTB Hit Percentage +system.cpu.branchPred.usedRAS 1709689 # Number of times the RAS was used to get a target. +system.cpu.branchPred.RASInCorrect 85822 # Number of incorrect RAS predictions. system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv system.cpu.dtb.fetch_accesses 0 # ITB accesses -system.cpu.dtb.read_hits 20567455 # DTB read hits -system.cpu.dtb.read_misses 96888 # DTB read misses +system.cpu.dtb.read_hits 20566953 # DTB read hits +system.cpu.dtb.read_misses 96874 # DTB read misses system.cpu.dtb.read_acv 11 # DTB read access violations -system.cpu.dtb.read_accesses 20664343 # DTB read accesses -system.cpu.dtb.write_hits 14665775 # DTB write hits -system.cpu.dtb.write_misses 9411 # DTB write misses +system.cpu.dtb.read_accesses 20663827 # DTB read accesses +system.cpu.dtb.write_hits 14666692 # DTB write hits +system.cpu.dtb.write_misses 9419 # DTB write misses system.cpu.dtb.write_acv 0 # DTB write access violations -system.cpu.dtb.write_accesses 14675186 # DTB write accesses -system.cpu.dtb.data_hits 35233230 # DTB hits -system.cpu.dtb.data_misses 106299 # DTB misses +system.cpu.dtb.write_accesses 14676111 # DTB write accesses +system.cpu.dtb.data_hits 35233645 # DTB hits +system.cpu.dtb.data_misses 106293 # DTB misses system.cpu.dtb.data_acv 11 # DTB access violations -system.cpu.dtb.data_accesses 35339529 # DTB accesses -system.cpu.itb.fetch_hits 25627333 # ITB hits -system.cpu.itb.fetch_misses 5261 # ITB misses +system.cpu.dtb.data_accesses 35339938 # DTB accesses +system.cpu.itb.fetch_hits 25640132 # ITB hits +system.cpu.itb.fetch_misses 5244 # ITB misses system.cpu.itb.fetch_acv 0 # ITB acv -system.cpu.itb.fetch_accesses 25632594 # ITB accesses +system.cpu.itb.fetch_accesses 25645376 # ITB accesses system.cpu.itb.read_hits 0 # DTB read hits system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.read_acv 0 # DTB read access violations @@ -322,81 +321,81 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4583 # Number of system calls -system.cpu.numCycles 117169323 # number of cpu cycles simulated +system.cpu.numCycles 119489120 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 88438073 # Number of instructions committed system.cpu.committedOps 88438073 # Number of ops (including micro ops) committed -system.cpu.discardedOps 1098705 # Number of ops (including micro ops) which were discarded before commit +system.cpu.discardedOps 1100288 # Number of ops (including micro ops) which were discarded before commit system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching -system.cpu.cpi 1.324874 # CPI: cycles per instruction -system.cpu.ipc 0.754789 # IPC: instructions per cycle -system.cpu.tickCycles 91571156 # Number of cycles that the object actually ticked -system.cpu.idleCycles 25598167 # Total number of cycles that the object has spent stopped -system.cpu.dcache.tags.replacements 200776 # number of replacements -system.cpu.dcache.tags.tagsinuse 4071.523211 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 34616515 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 204872 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 168.966550 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 644809250 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4071.523211 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.994024 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.994024 # Average percentage of cache occupancy +system.cpu.cpi 1.351105 # CPI: cycles per instruction +system.cpu.ipc 0.740135 # IPC: instructions per cycle +system.cpu.tickCycles 91601603 # Number of cycles that the object actually ticked +system.cpu.idleCycles 27887517 # Total number of cycles that the object has spent stopped +system.cpu.dcache.tags.replacements 200784 # number of replacements +system.cpu.dcache.tags.tagsinuse 4070.582702 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 34615842 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 204880 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 168.956667 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 693853250 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4070.582702 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.993795 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.993795 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::0 53 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::1 745 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::2 3298 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 46 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 678 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 3372 # Occupied blocks per task id system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.dcache.tags.tag_accesses 70176892 # Number of tag accesses -system.cpu.dcache.tags.data_accesses 70176892 # Number of data accesses -system.cpu.dcache.ReadReq_hits::cpu.data 20283193 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 20283193 # number of ReadReq hits -system.cpu.dcache.WriteReq_hits::cpu.data 14333322 # number of WriteReq hits -system.cpu.dcache.WriteReq_hits::total 14333322 # number of WriteReq hits -system.cpu.dcache.demand_hits::cpu.data 34616515 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 34616515 # number of demand (read+write) hits -system.cpu.dcache.overall_hits::cpu.data 34616515 # number of overall hits -system.cpu.dcache.overall_hits::total 34616515 # number of overall hits -system.cpu.dcache.ReadReq_misses::cpu.data 89440 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 89440 # number of ReadReq misses -system.cpu.dcache.WriteReq_misses::cpu.data 280055 # number of WriteReq misses -system.cpu.dcache.WriteReq_misses::total 280055 # number of WriteReq misses -system.cpu.dcache.demand_misses::cpu.data 369495 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 369495 # number of demand (read+write) misses -system.cpu.dcache.overall_misses::cpu.data 369495 # number of overall misses -system.cpu.dcache.overall_misses::total 369495 # number of overall misses -system.cpu.dcache.ReadReq_miss_latency::cpu.data 4407640500 # number of ReadReq miss cycles -system.cpu.dcache.ReadReq_miss_latency::total 4407640500 # number of ReadReq miss cycles -system.cpu.dcache.WriteReq_miss_latency::cpu.data 19996177500 # number of WriteReq miss cycles -system.cpu.dcache.WriteReq_miss_latency::total 19996177500 # number of WriteReq miss cycles -system.cpu.dcache.demand_miss_latency::cpu.data 24403818000 # number of demand (read+write) miss cycles -system.cpu.dcache.demand_miss_latency::total 24403818000 # number of demand (read+write) miss cycles -system.cpu.dcache.overall_miss_latency::cpu.data 24403818000 # number of overall miss cycles -system.cpu.dcache.overall_miss_latency::total 24403818000 # number of overall miss cycles -system.cpu.dcache.ReadReq_accesses::cpu.data 20372633 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.ReadReq_accesses::total 20372633 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.tags.tag_accesses 70175650 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 70175650 # Number of data accesses +system.cpu.dcache.ReadReq_hits::cpu.data 20282569 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::total 20282569 # number of ReadReq hits +system.cpu.dcache.WriteReq_hits::cpu.data 14333273 # number of WriteReq hits +system.cpu.dcache.WriteReq_hits::total 14333273 # number of WriteReq hits +system.cpu.dcache.demand_hits::cpu.data 34615842 # number of demand (read+write) hits +system.cpu.dcache.demand_hits::total 34615842 # number of demand (read+write) hits +system.cpu.dcache.overall_hits::cpu.data 34615842 # number of overall hits +system.cpu.dcache.overall_hits::total 34615842 # number of overall hits +system.cpu.dcache.ReadReq_misses::cpu.data 89439 # number of ReadReq misses +system.cpu.dcache.ReadReq_misses::total 89439 # number of ReadReq misses +system.cpu.dcache.WriteReq_misses::cpu.data 280104 # number of WriteReq misses +system.cpu.dcache.WriteReq_misses::total 280104 # number of WriteReq misses +system.cpu.dcache.demand_misses::cpu.data 369543 # number of demand (read+write) misses +system.cpu.dcache.demand_misses::total 369543 # number of demand (read+write) misses +system.cpu.dcache.overall_misses::cpu.data 369543 # number of overall misses +system.cpu.dcache.overall_misses::total 369543 # number of overall misses +system.cpu.dcache.ReadReq_miss_latency::cpu.data 4793461000 # number of ReadReq miss cycles +system.cpu.dcache.ReadReq_miss_latency::total 4793461000 # number of ReadReq miss cycles +system.cpu.dcache.WriteReq_miss_latency::cpu.data 21859170750 # number of WriteReq miss cycles +system.cpu.dcache.WriteReq_miss_latency::total 21859170750 # number of WriteReq miss cycles +system.cpu.dcache.demand_miss_latency::cpu.data 26652631750 # number of demand (read+write) miss cycles +system.cpu.dcache.demand_miss_latency::total 26652631750 # number of demand (read+write) miss cycles +system.cpu.dcache.overall_miss_latency::cpu.data 26652631750 # number of overall miss cycles +system.cpu.dcache.overall_miss_latency::total 26652631750 # number of overall miss cycles +system.cpu.dcache.ReadReq_accesses::cpu.data 20372008 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.ReadReq_accesses::total 20372008 # number of ReadReq accesses(hits+misses) system.cpu.dcache.WriteReq_accesses::cpu.data 14613377 # number of WriteReq accesses(hits+misses) system.cpu.dcache.WriteReq_accesses::total 14613377 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.demand_accesses::cpu.data 34986010 # number of demand (read+write) accesses -system.cpu.dcache.demand_accesses::total 34986010 # number of demand (read+write) accesses -system.cpu.dcache.overall_accesses::cpu.data 34986010 # number of overall (read+write) accesses -system.cpu.dcache.overall_accesses::total 34986010 # number of overall (read+write) accesses +system.cpu.dcache.demand_accesses::cpu.data 34985385 # number of demand (read+write) accesses +system.cpu.dcache.demand_accesses::total 34985385 # number of demand (read+write) accesses +system.cpu.dcache.overall_accesses::cpu.data 34985385 # number of overall (read+write) accesses +system.cpu.dcache.overall_accesses::total 34985385 # number of overall (read+write) accesses system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.004390 # miss rate for ReadReq accesses system.cpu.dcache.ReadReq_miss_rate::total 0.004390 # miss rate for ReadReq accesses -system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.019164 # miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_miss_rate::total 0.019164 # miss rate for WriteReq accesses -system.cpu.dcache.demand_miss_rate::cpu.data 0.010561 # miss rate for demand accesses -system.cpu.dcache.demand_miss_rate::total 0.010561 # miss rate for demand accesses -system.cpu.dcache.overall_miss_rate::cpu.data 0.010561 # miss rate for overall accesses -system.cpu.dcache.overall_miss_rate::total 0.010561 # miss rate for overall accesses -system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 49280.417039 # average ReadReq miss latency -system.cpu.dcache.ReadReq_avg_miss_latency::total 49280.417039 # average ReadReq miss latency -system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 71400.894467 # average WriteReq miss latency -system.cpu.dcache.WriteReq_avg_miss_latency::total 71400.894467 # average WriteReq miss latency -system.cpu.dcache.demand_avg_miss_latency::cpu.data 66046.409288 # average overall miss latency -system.cpu.dcache.demand_avg_miss_latency::total 66046.409288 # average overall miss latency -system.cpu.dcache.overall_avg_miss_latency::cpu.data 66046.409288 # average overall miss latency -system.cpu.dcache.overall_avg_miss_latency::total 66046.409288 # average overall miss latency +system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.019168 # miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_miss_rate::total 0.019168 # miss rate for WriteReq accesses +system.cpu.dcache.demand_miss_rate::cpu.data 0.010563 # miss rate for demand accesses +system.cpu.dcache.demand_miss_rate::total 0.010563 # miss rate for demand accesses +system.cpu.dcache.overall_miss_rate::cpu.data 0.010563 # miss rate for overall accesses +system.cpu.dcache.overall_miss_rate::total 0.010563 # miss rate for overall accesses +system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 53594.751730 # average ReadReq miss latency +system.cpu.dcache.ReadReq_avg_miss_latency::total 53594.751730 # average ReadReq miss latency +system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 78039.480871 # average WriteReq miss latency +system.cpu.dcache.WriteReq_avg_miss_latency::total 78039.480871 # average WriteReq miss latency +system.cpu.dcache.demand_avg_miss_latency::cpu.data 72123.221790 # average overall miss latency +system.cpu.dcache.demand_avg_miss_latency::total 72123.221790 # average overall miss latency +system.cpu.dcache.overall_avg_miss_latency::cpu.data 72123.221790 # average overall miss latency +system.cpu.dcache.overall_avg_miss_latency::total 72123.221790 # average overall miss latency system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -405,32 +404,32 @@ system.cpu.dcache.avg_blocked_cycles::no_mshrs nan system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed -system.cpu.dcache.writebacks::writebacks 168546 # number of writebacks -system.cpu.dcache.writebacks::total 168546 # number of writebacks -system.cpu.dcache.ReadReq_mshr_hits::cpu.data 28125 # number of ReadReq MSHR hits -system.cpu.dcache.ReadReq_mshr_hits::total 28125 # number of ReadReq MSHR hits -system.cpu.dcache.WriteReq_mshr_hits::cpu.data 136498 # number of WriteReq MSHR hits -system.cpu.dcache.WriteReq_mshr_hits::total 136498 # number of WriteReq MSHR hits -system.cpu.dcache.demand_mshr_hits::cpu.data 164623 # number of demand (read+write) MSHR hits -system.cpu.dcache.demand_mshr_hits::total 164623 # number of demand (read+write) MSHR hits -system.cpu.dcache.overall_mshr_hits::cpu.data 164623 # number of overall MSHR hits -system.cpu.dcache.overall_mshr_hits::total 164623 # number of overall MSHR hits -system.cpu.dcache.ReadReq_mshr_misses::cpu.data 61315 # number of ReadReq MSHR misses -system.cpu.dcache.ReadReq_mshr_misses::total 61315 # number of ReadReq MSHR misses -system.cpu.dcache.WriteReq_mshr_misses::cpu.data 143557 # number of WriteReq MSHR misses -system.cpu.dcache.WriteReq_mshr_misses::total 143557 # number of WriteReq MSHR misses -system.cpu.dcache.demand_mshr_misses::cpu.data 204872 # number of demand (read+write) MSHR misses -system.cpu.dcache.demand_mshr_misses::total 204872 # number of demand (read+write) MSHR misses -system.cpu.dcache.overall_mshr_misses::cpu.data 204872 # number of overall MSHR misses -system.cpu.dcache.overall_mshr_misses::total 204872 # number of overall MSHR misses -system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 2422248250 # number of ReadReq MSHR miss cycles -system.cpu.dcache.ReadReq_mshr_miss_latency::total 2422248250 # number of ReadReq MSHR miss cycles -system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 9931035500 # number of WriteReq MSHR miss cycles -system.cpu.dcache.WriteReq_mshr_miss_latency::total 9931035500 # number of WriteReq MSHR miss cycles -system.cpu.dcache.demand_mshr_miss_latency::cpu.data 12353283750 # number of demand (read+write) MSHR miss cycles -system.cpu.dcache.demand_mshr_miss_latency::total 12353283750 # number of demand (read+write) MSHR miss cycles -system.cpu.dcache.overall_mshr_miss_latency::cpu.data 12353283750 # number of overall MSHR miss cycles -system.cpu.dcache.overall_mshr_miss_latency::total 12353283750 # number of overall MSHR miss cycles +system.cpu.dcache.writebacks::writebacks 168547 # number of writebacks +system.cpu.dcache.writebacks::total 168547 # number of writebacks +system.cpu.dcache.ReadReq_mshr_hits::cpu.data 28118 # number of ReadReq MSHR hits +system.cpu.dcache.ReadReq_mshr_hits::total 28118 # number of ReadReq MSHR hits +system.cpu.dcache.WriteReq_mshr_hits::cpu.data 136545 # number of WriteReq MSHR hits +system.cpu.dcache.WriteReq_mshr_hits::total 136545 # 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average ReadReq miss latency +system.cpu.icache.demand_avg_miss_latency::cpu.inst 16580.645782 # average overall miss latency +system.cpu.icache.demand_avg_miss_latency::total 16580.645782 # average overall miss latency +system.cpu.icache.overall_avg_miss_latency::cpu.inst 16580.645782 # average overall miss latency +system.cpu.icache.overall_avg_miss_latency::total 16580.645782 # average overall miss latency system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -509,123 +508,123 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs nan system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed -system.cpu.icache.ReadReq_mshr_misses::cpu.inst 155835 # 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number of overall MSHR miss cycles +system.cpu.icache.overall_mshr_miss_latency::total 2348059258 # number of overall MSHR miss cycles system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.006081 # mshr miss rate for ReadReq accesses system.cpu.icache.ReadReq_mshr_miss_rate::total 0.006081 # mshr miss rate for ReadReq accesses system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.006081 # mshr miss rate for demand accesses system.cpu.icache.demand_mshr_miss_rate::total 0.006081 # mshr miss rate for demand accesses system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.006081 # mshr miss rate for overall accesses system.cpu.icache.overall_mshr_miss_rate::total 0.006081 # mshr miss rate for overall accesses -system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 14202.002175 # average ReadReq mshr miss latency -system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 14202.002175 # average ReadReq mshr miss latency -system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 14202.002175 # average overall mshr miss latency -system.cpu.icache.demand_avg_mshr_miss_latency::total 14202.002175 # average overall mshr miss latency -system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 14202.002175 # average overall mshr miss latency -system.cpu.icache.overall_avg_mshr_miss_latency::total 14202.002175 # average overall mshr miss latency +system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 15060.640369 # average ReadReq mshr miss latency +system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 15060.640369 # average ReadReq mshr miss latency +system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 15060.640369 # average overall mshr miss latency +system.cpu.icache.demand_avg_mshr_miss_latency::total 15060.640369 # average overall mshr miss latency +system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 15060.640369 # average overall mshr miss latency +system.cpu.icache.overall_avg_mshr_miss_latency::total 15060.640369 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 132704 # 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mshr miss rate for ReadExReq accesses +system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.051845 # mshr miss rate for demand accesses +system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.773912 # mshr miss rate for demand accesses +system.cpu.l2cache.demand_mshr_miss_rate::total 0.461885 # mshr miss rate for demand accesses +system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.051845 # mshr miss rate for overall accesses +system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.773912 # mshr miss rate for overall accesses +system.cpu.l2cache.overall_mshr_miss_rate::total 0.461885 # mshr miss rate for overall accesses +system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.inst 66631.850798 # average ReadReq mshr miss latency +system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.data 68278.904867 # average ReadReq mshr miss latency +system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 67906.613535 # average ReadReq mshr miss latency +system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 68815.224783 # average ReadExReq mshr miss latency +system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 68815.224783 # average ReadExReq mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 66631.850798 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 68721.608360 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::total 68620.244296 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 66631.850798 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 68721.608360 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::total 68620.244296 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.toL2Bus.trans_dist::ReadReq 217149 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadResp 217148 # Transaction distribution -system.cpu.toL2Bus.trans_dist::Writeback 168546 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExReq 143558 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExResp 143558 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 311669 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 578290 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count::total 889959 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 9973376 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 23898752 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size::total 33872128 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.trans_dist::ReadReq 217227 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadResp 217226 # Transaction distribution +system.cpu.toL2Bus.trans_dist::Writeback 168547 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExReq 143560 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExResp 143560 # Transaction distribution +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 311813 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 578307 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 890120 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 9977984 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 23899328 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size::total 33877312 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.snoops 0 # Total snoops (count) -system.cpu.toL2Bus.snoop_fanout::samples 529253 # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::samples 529334 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::1 529253 100.00% 100.00% # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::1 529334 100.00% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::total 529253 # Request fanout histogram -system.cpu.toL2Bus.reqLayer0.occupancy 433172500 # Layer occupancy (ticks) +system.cpu.toL2Bus.snoop_fanout::total 529334 # Request fanout histogram +system.cpu.toL2Bus.reqLayer0.occupancy 433214000 # Layer occupancy (ticks) system.cpu.toL2Bus.reqLayer0.utilization 0.7 # Layer utilization (%) -system.cpu.toL2Bus.respLayer0.occupancy 235311991 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer0.occupancy 235419242 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer0.utilization 0.4 # Layer utilization (%) -system.cpu.toL2Bus.respLayer1.occupancy 343212750 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer1.occupancy 343262500 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.6 # Layer utilization (%) -system.membus.trans_dist::ReadReq 35749 # Transaction distribution -system.membus.trans_dist::ReadResp 35749 # Transaction distribution -system.membus.trans_dist::Writeback 114048 # Transaction distribution +system.membus.trans_dist::ReadReq 35759 # Transaction distribution +system.membus.trans_dist::ReadResp 35759 # Transaction distribution +system.membus.trans_dist::Writeback 114047 # Transaction distribution system.membus.trans_dist::ReadExReq 130882 # Transaction distribution system.membus.trans_dist::ReadExResp 130882 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 447310 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::total 447310 # Packet count per connected master and slave (bytes) -system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17963456 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size::total 17963456 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 447329 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 447329 # Packet count per connected master and slave (bytes) +system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17964032 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size::total 17964032 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 0 # Total snoops (count) -system.membus.snoop_fanout::samples 280679 # Request fanout histogram +system.membus.snoop_fanout::samples 280688 # Request fanout histogram system.membus.snoop_fanout::mean 0 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -system.membus.snoop_fanout::0 280679 100.00% 100.00% # Request fanout histogram +system.membus.snoop_fanout::0 280688 100.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::min_value 0 # Request fanout histogram system.membus.snoop_fanout::max_value 0 # Request fanout histogram -system.membus.snoop_fanout::total 280679 # Request fanout histogram -system.membus.reqLayer0.occupancy 1304618000 # Layer occupancy (ticks) -system.membus.reqLayer0.utilization 2.2 # Layer utilization (%) -system.membus.respLayer1.occupancy 1602414250 # Layer occupancy (ticks) -system.membus.respLayer1.utilization 2.7 # Layer utilization (%) +system.membus.snoop_fanout::total 280688 # Request fanout histogram +system.membus.reqLayer0.occupancy 817068000 # Layer occupancy (ticks) +system.membus.reqLayer0.utilization 1.4 # Layer utilization (%) +system.membus.respLayer1.occupancy 879892750 # Layer occupancy (ticks) +system.membus.respLayer1.utilization 1.5 # Layer utilization (%) ---------- End Simulation Statistics ---------- |