diff options
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt')
| -rw-r--r-- | tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt | 45 |
1 files changed, 40 insertions, 5 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt index 51324a43d..005dec492 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.133635 # Nu sim_ticks 133634727000 # Number of ticks simulated final_tick 133634727000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 990858 # Simulator instruction rate (inst/s) -host_op_rate 990858 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1498890062 # Simulator tick rate (ticks/s) -host_mem_usage 288280 # Number of bytes of host memory used -host_seconds 89.16 # Real time elapsed on the host +host_inst_rate 1051168 # Simulator instruction rate (inst/s) +host_op_rate 1051168 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1590122468 # Simulator tick rate (ticks/s) +host_mem_usage 273520 # Number of bytes of host memory used +host_seconds 84.04 # Real time elapsed on the host sim_insts 88340673 # Number of instructions simulated sim_ops 88340673 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -109,6 +109,41 @@ system.cpu.num_busy_cycles 267269454 # Nu system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 13754477 # Number of branches fetched +system.cpu.op_class::No_OpClass 8748916 9.89% 9.89% # Class of executed instruction +system.cpu.op_class::IntAlu 44395414 50.20% 60.09% # Class of executed instruction +system.cpu.op_class::IntMult 41101 0.05% 60.14% # Class of executed instruction +system.cpu.op_class::IntDiv 0 0.00% 60.14% # Class of executed instruction +system.cpu.op_class::FloatAdd 113689 0.13% 60.27% # Class of executed instruction +system.cpu.op_class::FloatCmp 84 0.00% 60.27% # Class of executed instruction +system.cpu.op_class::FloatCvt 113640 0.13% 60.40% # Class of executed instruction +system.cpu.op_class::FloatMult 50 0.00% 60.40% # Class of executed instruction +system.cpu.op_class::FloatDiv 37764 0.04% 60.44% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 60.44% # Class of executed instruction +system.cpu.op_class::MemRead 20366786 23.03% 83.47% # Class of executed instruction +system.cpu.op_class::MemWrite 14620629 16.53% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 88438073 # Class of executed instruction system.cpu.icache.tags.replacements 74391 # number of replacements system.cpu.icache.tags.tagsinuse 1871.686406 # Cycle average of tags in use system.cpu.icache.tags.total_refs 88361638 # Total number of references to valid blocks. |