diff options
Diffstat (limited to 'tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt')
| -rw-r--r-- | tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt index 2f0a96bc0..385663c88 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.614317 # Nu sim_ticks 614317285000 # Number of ticks simulated final_tick 614317285000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 195309 # Simulator instruction rate (inst/s) -host_op_rate 195309 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 69112237 # Simulator tick rate (ticks/s) -host_mem_usage 211096 # Number of bytes of host memory used -host_seconds 8888.69 # Real time elapsed on the host +host_inst_rate 104366 # Simulator instruction rate (inst/s) +host_op_rate 104366 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 36931162 # Simulator tick rate (ticks/s) +host_mem_usage 215744 # Number of bytes of host memory used +host_seconds 16634.12 # Real time elapsed on the host sim_insts 1736043781 # Number of instructions simulated sim_ops 1736043781 # Number of ops (including micro ops) simulated system.physmem.bytes_read 173249728 # Number of bytes read from this memory @@ -367,8 +367,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 # system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.ReadReq_mshr_hits::cpu.inst 494 # number of ReadReq MSHR hits @@ -583,7 +583,7 @@ system.cpu.l2cache.blocked_cycles::no_targets 0 system.cpu.l2cache.blocked::no_mshrs 1684 # number of cycles access was blocked system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked system.cpu.l2cache.avg_blocked_cycles::no_mshrs 10404.988124 # average number of cycles each access was blocked -system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.l2cache.fast_writes 0 # number of fast writes performed system.cpu.l2cache.cache_copies 0 # number of cache copies performed system.cpu.l2cache.writebacks::writebacks 1172197 # number of writebacks |