diff options
Diffstat (limited to 'tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt')
| -rw-r--r-- | tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt index 16fb45e1d..20e951f6a 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.150226 # Nu sim_ticks 1150225722500 # Number of ticks simulated final_tick 1150225722500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 267770 # Simulator instruction rate (inst/s) -host_op_rate 288482 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 199406485 # Simulator tick rate (ticks/s) -host_mem_usage 271372 # Number of bytes of host memory used -host_seconds 5768.25 # Real time elapsed on the host +host_inst_rate 386915 # Simulator instruction rate (inst/s) +host_op_rate 416843 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 288133243 # Simulator tick rate (ticks/s) +host_mem_usage 273608 # Number of bytes of host memory used +host_seconds 3991.99 # Real time elapsed on the host sim_insts 1544563088 # Number of instructions simulated sim_ops 1664032481 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -448,7 +448,9 @@ system.cpu.op_class_0::FloatAdd 0 0.00% 61.95% # Cl system.cpu.op_class_0::FloatCmp 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::FloatCvt 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::FloatMult 0 0.00% 61.95% # Class of committed instruction +system.cpu.op_class_0::FloatMultAcc 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::FloatDiv 0 0.00% 61.95% # Class of committed instruction +system.cpu.op_class_0::FloatMisc 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::FloatSqrt 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::SimdAdd 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::SimdAddAcc 0 0.00% 61.95% # Class of committed instruction @@ -470,8 +472,10 @@ system.cpu.op_class_0::SimdFloatMisc 3 0.00% 61.95% # Cl system.cpu.op_class_0::SimdFloatMult 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::SimdFloatMultAcc 0 0.00% 61.95% # Class of committed instruction system.cpu.op_class_0::SimdFloatSqrt 0 0.00% 61.95% # Class of committed instruction -system.cpu.op_class_0::MemRead 458306334 27.54% 89.49% # Class of committed instruction -system.cpu.op_class_0::MemWrite 174847046 10.51% 100.00% # Class of committed instruction +system.cpu.op_class_0::MemRead 458306322 27.54% 89.49% # Class of committed instruction +system.cpu.op_class_0::MemWrite 174847022 10.51% 100.00% # Class of committed instruction +system.cpu.op_class_0::FloatMemRead 12 0.00% 100.00% # Class of committed instruction +system.cpu.op_class_0::FloatMemWrite 24 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.op_class_0::total 1664032481 # Class of committed instruction |