diff options
Diffstat (limited to 'tests/long/se/60.bzip2/ref/arm/linux')
3 files changed, 10 insertions, 11 deletions
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini index 67c7195c6..30ce01df4 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout index 4c68e7cbb..7f1aa9216 100755 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing/simout -Redirecting stderr to build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 08:11:07 +gem5 compiled Oct 16 2013 01:36:42 +gem5 started Oct 16 2013 02:37:44 gem5 executing on zizzer command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt index f9e4efd28..3c2739180 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.541686 # Nu sim_ticks 541686426500 # Number of ticks simulated final_tick 541686426500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 146656 # Simulator instruction rate (inst/s) -host_op_rate 163606 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 51433162 # Simulator tick rate (ticks/s) -host_mem_usage 242412 # Number of bytes of host memory used -host_seconds 10531.85 # Real time elapsed on the host +host_inst_rate 133850 # Simulator instruction rate (inst/s) +host_op_rate 149320 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 46941984 # Simulator tick rate (ticks/s) +host_mem_usage 248124 # Number of bytes of host memory used +host_seconds 11539.49 # Real time elapsed on the host sim_insts 1544563023 # Number of instructions simulated sim_ops 1723073835 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 48128 # Number of bytes read from this memory @@ -433,8 +433,8 @@ system.cpu.rename.LSQFullEvents 60088597 # Nu system.cpu.rename.FullRegisterEvents 10 # Number of times there has been no free registers system.cpu.rename.RenamedOperands 2286724696 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 10669719595 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 10669716841 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 2754 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 9782199775 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 333 # Number of floating rename lookups system.cpu.rename.CommittedMaps 1706319930 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 580404766 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 862 # count of serializing insts renamed |