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-rw-r--r--tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini1
-rwxr-xr-xtests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout6
-rw-r--r--tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt14
-rw-r--r--tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini1
-rwxr-xr-xtests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout6
-rw-r--r--tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt14
-rwxr-xr-xtests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout6
-rw-r--r--tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt20
-rwxr-xr-xtests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout6
-rw-r--r--tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt20
10 files changed, 48 insertions, 46 deletions
diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
index 5c873ae8a..898bd1404 100644
--- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini
@@ -86,6 +86,7 @@ max_loads_all_threads=0
max_loads_any_thread=0
needsTSO=false
numIQEntries=64
+numPhysCCRegs=0
numPhysFloatRegs=256
numPhysIntRegs=256
numROBEntries=192
diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout
index a9e5ff044..3d7fe8a25 100755
--- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout
@@ -1,8 +1,10 @@
+Redirecting stdout to build/ALPHA/tests/opt/long/se/60.bzip2/alpha/tru64/o3-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/long/se/60.bzip2/alpha/tru64/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 24 2013 03:08:53
-gem5 started Sep 28 2013 10:05:25
+gem5 compiled Oct 15 2013 18:24:51
+gem5 started Oct 15 2013 19:07:40
gem5 executing on zizzer
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/60.bzip2/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/long/se/60.bzip2/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
index 82bf88993..d01882912 100644
--- a/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.694171 # Nu
sim_ticks 694171131000 # Number of ticks simulated
final_tick 694171131000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 178600 # Simulator instruction rate (inst/s)
-host_op_rate 178600 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 71414604 # Simulator tick rate (ticks/s)
-host_mem_usage 227828 # Number of bytes of host memory used
-host_seconds 9720.30 # Real time elapsed on the host
+host_inst_rate 145628 # Simulator instruction rate (inst/s)
+host_op_rate 145628 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 58230614 # Simulator tick rate (ticks/s)
+host_mem_usage 230068 # Number of bytes of host memory used
+host_seconds 11921.07 # Real time elapsed on the host
sim_insts 1736043781 # Number of instructions simulated
sim_ops 1736043781 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 61632 # Number of bytes read from this memory
@@ -424,8 +424,8 @@ system.cpu.rename.IQFullEvents 1826446 # Nu
system.cpu.rename.LSQFullEvents 51579864 # Number of times rename has blocked due to LSQ full
system.cpu.rename.RenamedOperands 2248363732 # Number of destination operands rename has renamed
system.cpu.rename.RenameLookups 3900421320 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 3899178783 # Number of integer rename lookups
-system.cpu.rename.fp_rename_lookups 1242537 # Number of floating rename lookups
+system.cpu.rename.int_rename_lookups 3900278198 # Number of integer rename lookups
+system.cpu.rename.fp_rename_lookups 143121 # Number of floating rename lookups
system.cpu.rename.CommittedMaps 1376202963 # Number of HB maps that are committed
system.cpu.rename.UndoneMaps 872160769 # Number of HB maps that are undone due to squashing
system.cpu.rename.serializingInsts 168 # count of serializing insts renamed
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini
index 67c7195c6..30ce01df4 100644
--- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini
@@ -86,6 +86,7 @@ max_loads_all_threads=0
max_loads_any_thread=0
needsTSO=false
numIQEntries=64
+numPhysCCRegs=0
numPhysFloatRegs=256
numPhysIntRegs=256
numROBEntries=192
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout
index 4c68e7cbb..7f1aa9216 100755
--- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout
+++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout
@@ -1,10 +1,8 @@
-Redirecting stdout to build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing/simout
-Redirecting stderr to build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 22 2013 07:58:15
-gem5 started Sep 22 2013 08:11:07
+gem5 compiled Oct 16 2013 01:36:42
+gem5 started Oct 16 2013 02:37:44
gem5 executing on zizzer
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/60.bzip2/arm/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt
index f9e4efd28..3c2739180 100644
--- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.541686 # Nu
sim_ticks 541686426500 # Number of ticks simulated
final_tick 541686426500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 146656 # Simulator instruction rate (inst/s)
-host_op_rate 163606 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 51433162 # Simulator tick rate (ticks/s)
-host_mem_usage 242412 # Number of bytes of host memory used
-host_seconds 10531.85 # Real time elapsed on the host
+host_inst_rate 133850 # Simulator instruction rate (inst/s)
+host_op_rate 149320 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 46941984 # Simulator tick rate (ticks/s)
+host_mem_usage 248124 # Number of bytes of host memory used
+host_seconds 11539.49 # Real time elapsed on the host
sim_insts 1544563023 # Number of instructions simulated
sim_ops 1723073835 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 48128 # Number of bytes read from this memory
@@ -433,8 +433,8 @@ system.cpu.rename.LSQFullEvents 60088597 # Nu
system.cpu.rename.FullRegisterEvents 10 # Number of times there has been no free registers
system.cpu.rename.RenamedOperands 2286724696 # Number of destination operands rename has renamed
system.cpu.rename.RenameLookups 10669719595 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 10669716841 # Number of integer rename lookups
-system.cpu.rename.fp_rename_lookups 2754 # Number of floating rename lookups
+system.cpu.rename.int_rename_lookups 9782199775 # Number of integer rename lookups
+system.cpu.rename.fp_rename_lookups 333 # Number of floating rename lookups
system.cpu.rename.CommittedMaps 1706319930 # Number of HB maps that are committed
system.cpu.rename.UndoneMaps 580404766 # Number of HB maps that are undone due to squashing
system.cpu.rename.serializingInsts 862 # count of serializing insts renamed
diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout
index 09e2cbd6f..5a2f2668d 100755
--- a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout
+++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout
@@ -1,10 +1,8 @@
-Redirecting stdout to build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-atomic/simout
-Redirecting stderr to build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 22 2013 06:21:20
-gem5 started Sep 22 2013 07:00:18
+gem5 compiled Oct 16 2013 01:35:57
+gem5 started Oct 16 2013 01:38:48
gem5 executing on zizzer
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
index 09bbb2360..256e15dc9 100644
--- a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 2.846007 # Nu
sim_ticks 2846007227500 # Number of ticks simulated
final_tick 2846007227500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1114602 # Simulator instruction rate (inst/s)
-host_op_rate 1736651 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1054547884 # Simulator tick rate (ticks/s)
-host_mem_usage 286860 # Number of bytes of host memory used
-host_seconds 2698.79 # Real time elapsed on the host
+host_inst_rate 1357896 # Simulator instruction rate (inst/s)
+host_op_rate 2115724 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1284732870 # Simulator tick rate (ticks/s)
+host_mem_usage 240864 # Number of bytes of host memory used
+host_seconds 2215.25 # Real time elapsed on the host
sim_insts 3008081022 # Number of instructions simulated
sim_ops 4686862596 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 32105863056 # Number of bytes read from this memory
@@ -42,16 +42,18 @@ system.cpu.numWorkItemsStarted 0 # nu
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 3008081022 # Number of instructions committed
system.cpu.committedOps 4686862596 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 4686862527 # Number of integer alu accesses
+system.cpu.num_int_alu_accesses 4684368009 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
system.cpu.num_func_calls 33534539 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 182173300 # number of instructions that are conditional controls
-system.cpu.num_int_insts 4686862527 # number of integer instructions
+system.cpu.num_int_insts 4684368009 # number of integer instructions
system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 11915474428 # number of times the integer registers were read
-system.cpu.num_int_register_writes 5355771938 # number of times the integer registers were written
+system.cpu.num_int_register_reads 10688755601 # number of times the integer registers were read
+system.cpu.num_int_register_writes 3999841477 # number of times the integer registers were written
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu.num_cc_register_reads 1226718827 # number of times the CC registers were read
+system.cpu.num_cc_register_writes 1355930461 # number of times the CC registers were written
system.cpu.num_mem_refs 1677713084 # number of memory refs
system.cpu.num_load_insts 1239184746 # Number of load instructions
system.cpu.num_store_insts 438528338 # Number of store instructions
diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout
index 842f4ca6e..2a7659f1c 100755
--- a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout
+++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout
@@ -1,10 +1,8 @@
-Redirecting stdout to build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing/simout
-Redirecting stderr to build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 22 2013 06:21:20
-gem5 started Sep 22 2013 06:22:01
+gem5 compiled Oct 16 2013 01:35:57
+gem5 started Oct 16 2013 01:55:52
gem5 executing on zizzer
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/60.bzip2/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
index 776ec92d3..f740c02c8 100644
--- a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 5.882581 # Nu
sim_ticks 5882580526000 # Number of ticks simulated
final_tick 5882580526000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 645050 # Simulator instruction rate (inst/s)
-host_op_rate 1005047 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1261455450 # Simulator tick rate (ticks/s)
-host_mem_usage 245540 # Number of bytes of host memory used
-host_seconds 4663.33 # Real time elapsed on the host
+host_inst_rate 876676 # Simulator instruction rate (inst/s)
+host_op_rate 1365940 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1714420225 # Simulator tick rate (ticks/s)
+host_mem_usage 249312 # Number of bytes of host memory used
+host_seconds 3431.24 # Real time elapsed on the host
sim_insts 3008081022 # Number of instructions simulated
sim_ops 4686862596 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 43200 # Number of bytes read from this memory
@@ -58,16 +58,18 @@ system.cpu.numWorkItemsStarted 0 # nu
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 3008081022 # Number of instructions committed
system.cpu.committedOps 4686862596 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 4686862527 # Number of integer alu accesses
+system.cpu.num_int_alu_accesses 4684368009 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
system.cpu.num_func_calls 33534539 # number of times a function call or return occured
system.cpu.num_conditional_control_insts 182173300 # number of instructions that are conditional controls
-system.cpu.num_int_insts 4686862527 # number of integer instructions
+system.cpu.num_int_insts 4684368009 # number of integer instructions
system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 11915474428 # number of times the integer registers were read
-system.cpu.num_int_register_writes 5355771938 # number of times the integer registers were written
+system.cpu.num_int_register_reads 10688755601 # number of times the integer registers were read
+system.cpu.num_int_register_writes 3999841477 # number of times the integer registers were written
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu.num_cc_register_reads 1226718827 # number of times the CC registers were read
+system.cpu.num_cc_register_writes 1355930461 # number of times the CC registers were written
system.cpu.num_mem_refs 1677713084 # number of memory refs
system.cpu.num_load_insts 1239184746 # Number of load instructions
system.cpu.num_store_insts 438528338 # Number of store instructions