diff options
Diffstat (limited to 'tests/long')
109 files changed, 3215 insertions, 1784 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/config.ini index 9863111ae..8f8a452cd 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/config.ini @@ -10,23 +10,24 @@ time_sync_spin_threshold=100000000 [system] type=LinuxAlphaSystem -children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain +children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/arm/projectscratch/pd/sysrandd/dist/binaries/console +console=/scratch/nilay/GEM5/system/binaries/console eventq_index=0 init_param=0 -kernel=/arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -pal=/arm/projectscratch/pd/sysrandd/dist/binaries/ts_osfpal -readfile=tests/halt.sh +pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -53,7 +54,9 @@ slave=system.membus.master[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -112,6 +115,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -185,6 +189,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -224,6 +229,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -263,6 +269,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -302,6 +309,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -322,6 +330,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -486,6 +495,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -530,6 +540,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -654,7 +665,9 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.disk0] @@ -677,7 +690,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.disk2] @@ -700,9 +713,17 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-bigswap2.img +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img read_only=true +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -810,15 +831,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 @@ -834,7 +859,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.terminal] diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini index 69d3e7023..646b91983 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini @@ -10,23 +10,24 @@ time_sync_spin_threshold=100000000 [system] type=LinuxAlphaSystem -children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain +children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/home/stever/m5/m5_system_2.0b3/binaries/console +console=/scratch/nilay/GEM5/system/binaries/console eventq_index=0 init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -53,7 +54,9 @@ slave=system.membus.master[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -1071,7 +1074,9 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.disk0] @@ -1094,7 +1099,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.disk2] @@ -1117,9 +1122,17 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img read_only=true +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -1290,7 +1303,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.terminal] diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini index 17f1f9290..7628c3772 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini @@ -10,23 +10,24 @@ time_sync_spin_threshold=100000000 [system] type=LinuxAlphaSystem -children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain +children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/home/stever/m5/m5_system_2.0b3/binaries/console +console=/scratch/nilay/GEM5/system/binaries/console eventq_index=0 init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -53,7 +54,9 @@ slave=system.membus.master[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -611,7 +614,9 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.disk0] @@ -634,7 +639,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.disk2] @@ -657,9 +662,17 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img read_only=true +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -795,7 +808,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.terminal] diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini index e60af9d92..d6b54e875 100644 --- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini @@ -10,23 +10,24 @@ time_sync_spin_threshold=100000000 [system] type=LinuxAlphaSystem -children=bridge clk_domain cpu0 cpu1 cpu2 cpu_clk_domain disk0 disk2 intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain +children=bridge clk_domain cpu0 cpu1 cpu2 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain boot_cpu_frequency=500 boot_osflags=root=/dev/hda1 console=ttyS0 cache_line_size=64 clk_domain=system.clk_domain -console=/home/stever/m5/m5_system_2.0b3/binaries/console +console=/scratch/nilay/GEM5/system/binaries/console eventq_index=0 init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -pal=/home/stever/m5/m5_system_2.0b3/binaries/ts_osfpal -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh symbolfile= system_rev=1024 system_type=34 @@ -53,7 +54,9 @@ slave=system.membus.master[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -672,7 +675,9 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.disk0] @@ -695,7 +700,7 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.disk2] @@ -718,9 +723,17 @@ table_size=65536 [system.disk2.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img read_only=true +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -891,7 +904,7 @@ system=system [system.simple_disk.disk] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-latest.img +image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img read_only=true [system.terminal] diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini index 424e22d03..b768d26a9 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor-dual/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain +children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=256 -boot_loader=/arm/projectscratch/pd/sysrandd/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,7 +30,8 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX @@ -42,7 +43,7 @@ num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -152,6 +155,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu0.tracer @@ -261,6 +265,7 @@ funcUnits=system.cpu0.executeFuncUnits.funcUnits0 system.cpu0.executeFuncUnits.f [system.cpu0.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu0.executeFuncUnits.funcUnits0.opClasses @@ -300,6 +305,7 @@ opClasses= [system.cpu0.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu0.executeFuncUnits.funcUnits1.opClasses @@ -339,6 +345,7 @@ opClasses= [system.cpu0.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu0.executeFuncUnits.funcUnits2.opClasses @@ -378,6 +385,7 @@ opClasses= [system.cpu0.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu0.executeFuncUnits.funcUnits3.opClasses @@ -398,6 +406,7 @@ opClass=IntDiv [system.cpu0.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu0.executeFuncUnits.funcUnits4.opClasses @@ -562,6 +571,7 @@ opClasses= [system.cpu0.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu0.executeFuncUnits.funcUnits5.opClasses @@ -606,6 +616,7 @@ opClasses= [system.cpu0.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu0.executeFuncUnits.funcUnits6.opClasses @@ -799,6 +810,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu1.tracer @@ -908,6 +920,7 @@ funcUnits=system.cpu1.executeFuncUnits.funcUnits0 system.cpu1.executeFuncUnits.f [system.cpu1.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu1.executeFuncUnits.funcUnits0.opClasses @@ -947,6 +960,7 @@ opClasses= [system.cpu1.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu1.executeFuncUnits.funcUnits1.opClasses @@ -986,6 +1000,7 @@ opClasses= [system.cpu1.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu1.executeFuncUnits.funcUnits2.opClasses @@ -1025,6 +1040,7 @@ opClasses= [system.cpu1.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu1.executeFuncUnits.funcUnits3.opClasses @@ -1045,6 +1061,7 @@ opClass=IntDiv [system.cpu1.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu1.executeFuncUnits.funcUnits4.opClasses @@ -1209,6 +1226,7 @@ opClasses= [system.cpu1.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu1.executeFuncUnits.funcUnits5.opClasses @@ -1253,6 +1271,7 @@ opClasses= [system.cpu1.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu1.executeFuncUnits.funcUnits6.opClasses @@ -1391,9 +1410,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -1535,15 +1564,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini index f89afb299..dcd779005 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain +children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=256 -boot_loader=/arm/projectscratch/pd/sysrandd/dist/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,7 +30,8 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX @@ -42,7 +43,7 @@ num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/arm/projectscratch/pd/sysrandd/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -152,6 +155,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -261,6 +265,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -300,6 +305,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -339,6 +345,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -378,6 +385,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -398,6 +406,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -562,6 +571,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -606,6 +616,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -790,9 +801,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -899,15 +920,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini index be87396c4..26a641846 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain +children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=256 -boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,19 +30,20 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX mem_mode=timing mem_ranges=0:134217727 -memories=system.realview.nvmem system.physmem +memories=system.physmem system.realview.nvmem multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -897,9 +900,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini index 50ac2503c..319208ed0 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain +children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=256 -boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,7 +30,8 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX @@ -42,7 +43,7 @@ num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -1305,9 +1308,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini index f4610569d..240be98a7 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain +children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=256 -boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,7 +30,8 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX @@ -42,7 +43,7 @@ num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -747,9 +750,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini index e53092e6a..0158d2186 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain +children=bridge cf0 clk_domain cpu0 cpu1 cpu2 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=256 -boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,19 +30,20 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX mem_mode=atomic mem_ranges=0:134217727 -memories=system.physmem system.realview.nvmem +memories=system.realview.nvmem system.physmem multi_proc=true num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -996,9 +999,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini index da5ad247a..0248bee20 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini @@ -10,9 +10,9 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain +children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=256 -boot_loader=/home/stever/m5/m5_system_2.0b3/binaries/boot.arm +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 @@ -30,7 +30,8 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/home/stever/m5/m5_system_2.0b3/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX @@ -42,7 +43,7 @@ num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,13 +86,15 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -1225,9 +1228,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini index 1d8001986..bc1aaf76d 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/config.ini @@ -10,10 +10,10 @@ time_sync_spin_threshold=100000000 [system] type=LinuxArmSystem -children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain +children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain atags_addr=256 -boot_loader=/dist/binaries/boot.arm -boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 +boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm +boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 boot_release_addr=65528 cache_line_size=64 clk_domain=system.clk_domain @@ -30,7 +30,8 @@ have_security=false have_virtualization=false highest_el_is_64=false init_param=0 -kernel=/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel_addr_check=true load_addr_mask=268435455 load_offset=0 machine_type=RealView_PBX @@ -42,7 +43,7 @@ num_work_ids=16 panic_on_oops=true panic_on_panic=true phys_addr_range_64=40 -readfile=tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr_64=0 symbolfile= work_begin_ckpt_count=0 @@ -85,18 +86,21 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/disks/linux-arm-ael.img +image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img read_only=true [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb tracer +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -120,6 +124,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu0.tracer @@ -319,6 +324,7 @@ eventq_index=0 [system.cpu1] type=TimingSimpleCPU children=dstage2_mmu dtb isa istage2_mmu itb tracer +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -342,6 +348,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=true system=system tracer=system.cpu1.tracer @@ -461,9 +468,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.intrctrl] type=IntrControl eventq_index=0 @@ -581,9 +598,9 @@ warn_access=warn pio=system.membus.default [system.physmem] -type=SimpleDRAM +type=DRAMCtrl activation_limit=4 -addr_mapping=RaBaChCo +addr_mapping=RoRaBaChCo banks_per_rank=8 burst_length=8 channels=1 @@ -594,27 +611,33 @@ device_rowbuffer_size=1024 devices_per_rank=8 eventq_index=0 in_addr_map=true +max_accesses_per_row=16 mem_sched_policy=frfcfs +min_writes_per_switch=16 null=false -page_policy=open +page_policy=open_adaptive range=0:134217727 ranks_per_channel=2 read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 -write_buffer_size=32 -write_high_thresh_perc=70 -write_low_thresh_perc=0 +tXAW=30000 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 port=system.membus.master[6] [system.realview] diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr index fdcb49ed7..86ac9e4e4 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-timing/simerr @@ -51,27 +51,3 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini index 1ab0a28be..beeca581e 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 [system] type=LinuxX86System -children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain +children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain acpi_description_table_pointer=system.acpi_description_table_pointer boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1 cache_line_size=64 @@ -20,14 +20,15 @@ eventq_index=0 init_param=0 intel_mp_pointer=system.intel_mp_pointer intel_mp_table=system.intel_mp_table -kernel=/home/stever/m5/m5_system_2.0b3/binaries/x86_64-vmlinux-2.6.22.9 +kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9 +kernel_addr_check=true load_addr_mask=18446744073709551615 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh smbios_table=system.smbios_table symbolfile= work_begin_ckpt_count=0 @@ -83,7 +84,9 @@ slave=system.membus.master[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -744,9 +747,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.e820_table] type=X86E820Table children=entries0 entries1 entries2 entries3 @@ -1169,7 +1182,7 @@ type=NoncoherentBus clk_domain=system.clk_domain eventq_index=0 header_cycles=1 -use_default_range=true +use_default_range=false width=8 default=system.pc.pciconfig.pio master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side @@ -1537,7 +1550,7 @@ table_size=65536 [system.pc.south_bridge.ide.disks0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-x86.img +image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img read_only=true [system.pc.south_bridge.ide.disks1] @@ -1560,7 +1573,7 @@ table_size=65536 [system.pc.south_bridge.ide.disks1.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img read_only=true [system.pc.south_bridge.int_lines0] diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini index b0a3a316f..f38bb864d 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 [system] type=LinuxX86System -children=acpi_description_table_pointer clk_domain cpu0 cpu1 cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl iobus pc physmem ruby smbios_table sys_port_proxy voltage_domain +children=acpi_description_table_pointer clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus pc physmem ruby smbios_table sys_port_proxy voltage_domain acpi_description_table_pointer=system.acpi_description_table_pointer boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1 cache_line_size=64 @@ -21,13 +21,14 @@ init_param=0 intel_mp_pointer=system.intel_mp_pointer intel_mp_table=system.intel_mp_table kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp +kernel_addr_check=true load_addr_mask=18446744073709551615 load_offset=0 mem_mode=timing mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -readfile=tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh smbios_table=system.smbios_table symbolfile= work_begin_ckpt_count=0 @@ -61,7 +62,9 @@ oem_table_id= [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -89,6 +92,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu0.tracer @@ -177,6 +181,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu1.tracer @@ -243,9 +248,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.e820_table] type=X86E820Table children=entries0 entries1 entries2 entries3 @@ -680,7 +695,7 @@ type=NoncoherentBus clk_domain=system.clk_domain eventq_index=0 header_cycles=1 -use_default_range=true +use_default_range=false width=8 default=system.pc.pciconfig.pio master=system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.ruby.l1_cntrl0.sequencer.pio_slave_port system.ruby.l1_cntrl1.sequencer.pio_slave_port system.physmem.port @@ -1218,15 +1233,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 @@ -1249,7 +1268,9 @@ randomization=false [system.ruby.clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.ruby.dir_cntrl0] @@ -1269,6 +1290,9 @@ ruby_system=system.ruby to_mem_ctrl_latency=1 transitions_per_cycle=4 version=0 +requestToDir=system.ruby.network.master[7] +responseFromDir=system.ruby.network.slave[9] +responseToDir=system.ruby.network.master[8] [system.ruby.dir_cntrl0.directory] type=RubyDirectoryMemory @@ -1317,6 +1341,8 @@ request_latency=6 ruby_system=system.ruby transitions_per_cycle=4 version=0 +requestToDir=system.ruby.network.slave[10] +responseFromDir=system.ruby.network.master[9] [system.ruby.dma_cntrl0.dma_sequencer] type=DMASequencer @@ -1337,7 +1363,7 @@ children=L1Dcache L1Icache prefetcher sequencer L1Dcache=system.ruby.l1_cntrl0.L1Dcache L1Icache=system.ruby.l1_cntrl0.L1Icache buffer_size=0 -clk_domain=system.ruby.clk_domain +clk_domain=system.cpu_clk_domain cluster_id=0 enable_prefetch=false eventq_index=0 @@ -1354,6 +1380,11 @@ sequencer=system.ruby.l1_cntrl0.sequencer to_l2_latency=1 transitions_per_cycle=4 version=0 +requestFromL1Cache=system.ruby.network.slave[0] +requestToL1Cache=system.ruby.network.master[0] +responseFromL1Cache=system.ruby.network.slave[1] +responseToL1Cache=system.ruby.network.master[1] +unblockFromL1Cache=system.ruby.network.slave[2] [system.ruby.l1_cntrl0.L1Dcache] type=RubyCache @@ -1399,7 +1430,7 @@ unit_filter=8 [system.ruby.l1_cntrl0.sequencer] type=RubySequencer access_phys_mem=true -clk_domain=system.ruby.clk_domain +clk_domain=system.cpu_clk_domain dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 eventq_index=0 @@ -1424,7 +1455,7 @@ children=L1Dcache L1Icache prefetcher sequencer L1Dcache=system.ruby.l1_cntrl1.L1Dcache L1Icache=system.ruby.l1_cntrl1.L1Icache buffer_size=0 -clk_domain=system.ruby.clk_domain +clk_domain=system.cpu_clk_domain cluster_id=0 enable_prefetch=false eventq_index=0 @@ -1441,6 +1472,11 @@ sequencer=system.ruby.l1_cntrl1.sequencer to_l2_latency=1 transitions_per_cycle=4 version=1 +requestFromL1Cache=system.ruby.network.slave[3] +requestToL1Cache=system.ruby.network.master[2] +responseFromL1Cache=system.ruby.network.slave[4] +responseToL1Cache=system.ruby.network.master[3] +unblockFromL1Cache=system.ruby.network.slave[5] [system.ruby.l1_cntrl1.L1Dcache] type=RubyCache @@ -1486,7 +1522,7 @@ unit_filter=8 [system.ruby.l1_cntrl1.sequencer] type=RubySequencer access_phys_mem=true -clk_domain=system.ruby.clk_domain +clk_domain=system.cpu_clk_domain dcache=system.ruby.l1_cntrl1.L1Dcache deadlock_threshold=500000 eventq_index=0 @@ -1522,6 +1558,12 @@ ruby_system=system.ruby to_l1_latency=1 transitions_per_cycle=4 version=0 +DirRequestFromL2Cache=system.ruby.network.slave[6] +L1RequestFromL2Cache=system.ruby.network.slave[7] +L1RequestToL2Cache=system.ruby.network.master[5] +responseFromL2Cache=system.ruby.network.slave[8] +responseToL2Cache=system.ruby.network.master[6] +unblockToL2Cache=system.ruby.network.master[4] [system.ruby.l2_cntrl0.L2cache] type=RubyCache @@ -1560,6 +1602,8 @@ number_of_virtual_networks=10 routers=system.ruby.network.routers0 system.ruby.network.routers1 system.ruby.network.routers2 system.ruby.network.routers3 system.ruby.network.routers4 system.ruby.network.routers5 ruby_system=system.ruby topology=Crossbar +master=system.ruby.l1_cntrl0.requestToL1Cache system.ruby.l1_cntrl0.responseToL1Cache system.ruby.l1_cntrl1.requestToL1Cache system.ruby.l1_cntrl1.responseToL1Cache system.ruby.l2_cntrl0.unblockToL2Cache system.ruby.l2_cntrl0.L1RequestToL2Cache system.ruby.l2_cntrl0.responseToL2Cache system.ruby.dir_cntrl0.requestToDir system.ruby.dir_cntrl0.responseToDir system.ruby.dma_cntrl0.responseFromDir +slave=system.ruby.l1_cntrl0.requestFromL1Cache system.ruby.l1_cntrl0.responseFromL1Cache system.ruby.l1_cntrl0.unblockFromL1Cache system.ruby.l1_cntrl1.requestFromL1Cache system.ruby.l1_cntrl1.responseFromL1Cache system.ruby.l1_cntrl1.unblockFromL1Cache system.ruby.l2_cntrl0.DirRequestFromL2Cache system.ruby.l2_cntrl0.L1RequestFromL2Cache system.ruby.l2_cntrl0.responseFromL2Cache system.ruby.dir_cntrl0.responseFromDir system.ruby.dma_cntrl0.requestToDir [system.ruby.network.ext_links0] type=SimpleExtLink diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout index 2380c78c8..9f7c35f87 100755 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout @@ -3,12 +3,12 @@ Redirecting stderr to build/X86_MESI_Two_Level/tests/opt/long/fs/10.linux-boot/x gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 23 2014 18:53:44 -gem5 started Feb 23 2014 18:53:57 +gem5 compiled Aug 28 2014 04:58:39 +gem5 started Aug 28 2014 04:58:54 gem5 executing on ribera.cs.wisc.edu -command line: build/X86_MESI_Two_Level/gem5.opt -d build/X86_MESI_Two_Level/tests/opt/long/fs/10.linux-boot/x86/linux/pc-simple-timing-ruby-MESI_Two_Level -re tests/run.py build/X86_MESI_Two_Level/tests/opt/long/fs/10.linux-boot/x86/linux/pc-simple-timing-ruby-MESI_Two_Level +command line: build/X86_MESI_Two_Level/gem5.opt -d build/X86_MESI_Two_Level/tests/opt/long/fs/10.linux-boot/x86/linux/pc-simple-timing-ruby-MESI_Two_Level -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86_MESI_Two_Level/tests/opt/long/fs/10.linux-boot/x86/linux/pc-simple-timing-ruby-MESI_Two_Level Global frequency set at 1000000000000 ticks per second info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp 0: rtc: Real-time clock set to Sun Jan 1 00:00:00 2012 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 5304496750000 because m5_exit instruction encountered +Exiting @ tick 5304496799500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt index e979c11e3..591176ec8 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt @@ -1,79 +1,79 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 5.304497 # Number of seconds simulated -sim_ticks 5304496750000 # Number of ticks simulated -final_tick 5304496750000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_ticks 5304496799500 # Number of ticks simulated +final_tick 5304496799500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 145026 # Simulator instruction rate (inst/s) -host_op_rate 278074 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 7198918941 # Simulator tick rate (ticks/s) -host_mem_usage 818088 # Number of bytes of host memory used -host_seconds 736.85 # Real time elapsed on the host -sim_insts 106862058 # Number of instructions simulated -sim_ops 204897478 # Number of ops (including micro ops) simulated +host_inst_rate 120327 # Simulator instruction rate (inst/s) +host_op_rate 230715 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 5973118168 # Simulator tick rate (ticks/s) +host_mem_usage 829584 # Number of bytes of host memory used +host_seconds 888.06 # Real time elapsed on the host +sim_insts 106858198 # Number of instructions simulated +sim_ops 204889266 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::pc.south_bridge.ide 35160 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.dtb.walker 168624 # Number of bytes read from this memory system.physmem.bytes_read::cpu0.itb.walker 87432 # Number of bytes read from this memory -system.physmem.bytes_read::cpu0.inst 563266144 # Number of bytes read from this memory -system.physmem.bytes_read::cpu0.data 42058413 # Number of bytes read from this memory +system.physmem.bytes_read::cpu0.inst 563238768 # Number of bytes read from this memory +system.physmem.bytes_read::cpu0.data 42054251 # Number of bytes read from this memory system.physmem.bytes_read::cpu1.dtb.walker 54624 # Number of bytes read from this memory system.physmem.bytes_read::cpu1.itb.walker 20152 # Number of bytes read from this memory -system.physmem.bytes_read::cpu1.inst 449844528 # Number of bytes read from this memory -system.physmem.bytes_read::cpu1.data 51716224 # Number of bytes read from this memory -system.physmem.bytes_read::total 1107251301 # Number of bytes read from this memory -system.physmem.bytes_inst_read::cpu0.inst 563266144 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::cpu1.inst 449844528 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::total 1013110672 # Number of instructions bytes read from this memory +system.physmem.bytes_read::cpu1.inst 449830560 # Number of bytes read from this memory +system.physmem.bytes_read::cpu1.data 51714243 # Number of bytes read from this memory +system.physmem.bytes_read::total 1107203814 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu0.inst 563238768 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::cpu1.inst 449830560 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 1013069328 # Number of instructions bytes read from this memory system.physmem.bytes_written::pc.south_bridge.ide 2991104 # Number of bytes written to this memory system.physmem.bytes_written::cpu0.itb.walker 16 # Number of bytes written to this memory -system.physmem.bytes_written::cpu0.data 34107443 # Number of bytes written to this memory -system.physmem.bytes_written::cpu1.data 33949582 # Number of bytes written to this memory -system.physmem.bytes_written::total 71048145 # Number of bytes written to this memory +system.physmem.bytes_written::cpu0.data 34106065 # Number of bytes written to this memory +system.physmem.bytes_written::cpu1.data 33949188 # Number of bytes written to this memory +system.physmem.bytes_written::total 71046373 # Number of bytes written to this memory system.physmem.num_reads::pc.south_bridge.ide 811 # Number of read requests responded to by this memory system.physmem.num_reads::cpu0.dtb.walker 21078 # Number of read requests responded to by this memory system.physmem.num_reads::cpu0.itb.walker 10929 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu0.inst 70408268 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu0.data 7008799 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu0.inst 70404846 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu0.data 7007948 # Number of read requests responded to by this memory system.physmem.num_reads::cpu1.dtb.walker 6828 # Number of read requests responded to by this memory system.physmem.num_reads::cpu1.itb.walker 2519 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu1.inst 56230566 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu1.data 8723011 # Number of read requests responded to by this memory -system.physmem.num_reads::total 142412809 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu1.inst 56228820 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu1.data 8722584 # Number of read requests responded to by this memory +system.physmem.num_reads::total 142406363 # Number of read requests responded to by this memory system.physmem.num_writes::pc.south_bridge.ide 46736 # Number of write requests responded to by this memory system.physmem.num_writes::cpu0.itb.walker 2 # Number of write requests responded to by this memory -system.physmem.num_writes::cpu0.data 5095297 # Number of write requests responded to by this memory -system.physmem.num_writes::cpu1.data 4745855 # Number of write requests responded to by this memory -system.physmem.num_writes::total 9887890 # Number of write requests responded to by this memory +system.physmem.num_writes::cpu0.data 5095102 # Number of write requests responded to by this memory +system.physmem.num_writes::cpu1.data 4745797 # Number of write requests responded to by this memory +system.physmem.num_writes::total 9887637 # Number of write requests responded to by this memory system.physmem.bw_read::pc.south_bridge.ide 6628 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_read::cpu0.dtb.walker 31789 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_read::cpu0.itb.walker 16483 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu0.inst 106186538 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu0.data 7928822 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu0.inst 106181376 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu0.data 7928038 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_read::cpu1.dtb.walker 10298 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_read::cpu1.itb.walker 3799 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu1.inst 84804374 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu1.data 9749506 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 208738237 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu0.inst 106186538 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu1.inst 84804374 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 190990912 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu1.inst 84801740 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu1.data 9749133 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 208729283 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu0.inst 106181376 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu1.inst 84801740 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 190983116 # Instruction read bandwidth from this memory (bytes/s) system.physmem.bw_write::pc.south_bridge.ide 563881 # Write bandwidth from this memory (bytes/s) system.physmem.bw_write::cpu0.itb.walker 3 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::cpu0.data 6429911 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::cpu1.data 6400151 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 13393946 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::cpu0.data 6429651 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::cpu1.data 6400077 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::total 13393612 # Write bandwidth from this memory (bytes/s) system.physmem.bw_total::pc.south_bridge.ide 570509 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu0.dtb.walker 31789 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu0.itb.walker 16486 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu0.inst 106186538 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu0.data 14358734 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu0.inst 106181376 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu0.data 14357689 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu1.dtb.walker 10298 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu1.itb.walker 3799 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu1.inst 84804374 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu1.data 16149658 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 222132184 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu1.inst 84801740 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu1.data 16149210 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 222122895 # Total bandwidth to/from this memory (bytes/s) system.physmem.readReqs 0 # Number of read requests accepted system.physmem.writeReqs 0 # Number of write requests accepted system.physmem.readBursts 0 # Number of DRAM read bursts, including those serviced by the write queue @@ -261,48 +261,49 @@ system.physmem.memoryStateTime::ACT_PDN 0 # Ti system.ruby.clk_domain.clock 500 # Clock period in ticks system.ruby.delayHist::bucket_size 4 # delay histogram for all message system.ruby.delayHist::max_bucket 39 # delay histogram for all message -system.ruby.delayHist::samples 10864248 # delay histogram for all message -system.ruby.delayHist::mean 0.443134 # delay histogram for all message -system.ruby.delayHist::stdev 1.831153 # delay histogram for all message -system.ruby.delayHist | 10262857 94.46% 94.46% | 1509 0.01% 94.48% | 599467 5.52% 100.00% | 131 0.00% 100.00% | 231 0.00% 100.00% | 9 0.00% 100.00% | 44 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message -system.ruby.delayHist::total 10864248 # delay histogram for all message +system.ruby.delayHist::samples 10864368 # delay histogram for all message +system.ruby.delayHist::mean 0.442902 # delay histogram for all message +system.ruby.delayHist::stdev 1.830573 # delay histogram for all message +system.ruby.delayHist | 10263231 94.47% 94.47% | 1369 0.01% 94.48% | 599393 5.52% 100.00% | 125 0.00% 100.00% | 205 0.00% 100.00% | 8 0.00% 100.00% | 37 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message +system.ruby.delayHist::total 10864368 # delay histogram for all message system.ruby.outstanding_req_hist::bucket_size 1 system.ruby.outstanding_req_hist::max_bucket 9 -system.ruby.outstanding_req_hist::samples 152253153 +system.ruby.outstanding_req_hist::samples 152246454 system.ruby.outstanding_req_hist::mean 1.000112 system.ruby.outstanding_req_hist::gmean 1.000078 system.ruby.outstanding_req_hist::stdev 0.010602 -system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 152236038 99.99% 99.99% | 17115 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.outstanding_req_hist::total 152253153 +system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 152229339 99.99% 99.99% | 17115 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.outstanding_req_hist::total 152246454 system.ruby.latency_hist::bucket_size 32 system.ruby.latency_hist::max_bucket 319 -system.ruby.latency_hist::samples 152253152 -system.ruby.latency_hist::mean 3.380085 -system.ruby.latency_hist::gmean 3.106154 -system.ruby.latency_hist::stdev 3.774249 -system.ruby.latency_hist | 152079187 99.89% 99.89% | 156 0.00% 99.89% | 79112 0.05% 99.94% | 93712 0.06% 100.00% | 981 0.00% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.latency_hist::total 152253152 +system.ruby.latency_hist::samples 152246453 +system.ruby.latency_hist::mean 3.380088 +system.ruby.latency_hist::gmean 3.106160 +system.ruby.latency_hist::stdev 3.773917 +system.ruby.latency_hist | 152072522 99.89% 99.89% | 120 0.00% 99.89% | 79139 0.05% 99.94% | 93729 0.06% 100.00% | 941 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.latency_hist::total 152246453 system.ruby.hit_latency_hist::bucket_size 1 system.ruby.hit_latency_hist::max_bucket 9 -system.ruby.hit_latency_hist::samples 149594464 +system.ruby.hit_latency_hist::samples 149587693 system.ruby.hit_latency_hist::mean 3 system.ruby.hit_latency_hist::gmean 3.000000 -system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 149594464 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.hit_latency_hist::total 149594464 +system.ruby.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 149587693 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.hit_latency_hist::total 149587693 system.ruby.miss_latency_hist::bucket_size 32 system.ruby.miss_latency_hist::max_bucket 319 -system.ruby.miss_latency_hist::samples 2658688 -system.ruby.miss_latency_hist::mean 24.766053 -system.ruby.miss_latency_hist::gmean 21.975430 -system.ruby.miss_latency_hist::stdev 18.715437 -system.ruby.miss_latency_hist | 2484723 93.46% 93.46% | 156 0.01% 93.46% | 79112 2.98% 96.44% | 93712 3.52% 99.96% | 981 0.04% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.miss_latency_hist::total 2658688 -system.ruby.l1_cntrl0.L1Dcache.demand_hits 11564569 # Number of cache demand hits -system.ruby.l1_cntrl0.L1Dcache.demand_misses 571536 # Number of cache demand misses -system.ruby.l1_cntrl0.L1Dcache.demand_accesses 12136105 # Number of cache demand accesses -system.ruby.l1_cntrl0.L1Icache.demand_hits 70049459 # Number of cache demand hits -system.ruby.l1_cntrl0.L1Icache.demand_misses 358809 # Number of cache demand misses -system.ruby.l1_cntrl0.L1Icache.demand_accesses 70408268 # Number of cache demand accesses +system.ruby.miss_latency_hist::samples 2658760 +system.ruby.miss_latency_hist::mean 24.764674 +system.ruby.miss_latency_hist::gmean 21.974787 +system.ruby.miss_latency_hist::stdev 18.711640 +system.ruby.miss_latency_hist | 2484829 93.46% 93.46% | 120 0.00% 93.46% | 79139 2.98% 96.44% | 93729 3.53% 99.96% | 941 0.04% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.miss_latency_hist::total 2658760 +system.ruby.l1_cntrl0.L1Dcache.demand_hits 11563536 # Number of cache demand hits +system.ruby.l1_cntrl0.L1Dcache.demand_misses 571523 # Number of cache demand misses +system.ruby.l1_cntrl0.L1Dcache.demand_accesses 12135059 # Number of cache demand accesses +system.ruby.l1_cntrl0.L1Icache.demand_hits 70045998 # Number of cache demand hits +system.ruby.l1_cntrl0.L1Icache.demand_misses 358848 # Number of cache demand misses +system.ruby.l1_cntrl0.L1Icache.demand_accesses 70404846 # Number of cache demand accesses +system.cpu_clk_domain.clock 500 # Clock period in ticks system.ruby.l1_cntrl0.prefetcher.miss_observed 0 # number of misses observed system.ruby.l1_cntrl0.prefetcher.allocated_streams 0 # number of streams allocated for prefetching system.ruby.l1_cntrl0.prefetcher.prefetches_requested 0 # number of prefetch requests made @@ -313,12 +314,29 @@ system.ruby.l1_cntrl0.prefetcher.partial_hits 0 system.ruby.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages system.ruby.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed system.ruby.l1_cntrl0.fully_busy_cycles 13 # cycles for which number of transistions == max transitions -system.ruby.l1_cntrl1.L1Dcache.demand_hits 12208458 # Number of cache demand hits -system.ruby.l1_cntrl1.L1Dcache.demand_misses 1269755 # Number of cache demand misses -system.ruby.l1_cntrl1.L1Dcache.demand_accesses 13478213 # Number of cache demand accesses -system.ruby.l1_cntrl1.L1Icache.demand_hits 55771978 # Number of cache demand hits -system.ruby.l1_cntrl1.L1Icache.demand_misses 458588 # Number of cache demand misses -system.ruby.l1_cntrl1.L1Icache.demand_accesses 56230566 # Number of cache demand accesses +system.ruby.network.routers0.percent_links_utilized 0.032337 +system.ruby.network.routers0.msg_count.Control::0 930371 +system.ruby.network.routers0.msg_count.Request_Control::2 42522 +system.ruby.network.routers0.msg_count.Response_Data::1 958517 +system.ruby.network.routers0.msg_count.Response_Control::1 545617 +system.ruby.network.routers0.msg_count.Response_Control::2 541977 +system.ruby.network.routers0.msg_count.Writeback_Data::0 316333 +system.ruby.network.routers0.msg_count.Writeback_Data::1 73 +system.ruby.network.routers0.msg_count.Writeback_Control::0 187850 +system.ruby.network.routers0.msg_bytes.Control::0 7442968 +system.ruby.network.routers0.msg_bytes.Request_Control::2 340176 +system.ruby.network.routers0.msg_bytes.Response_Data::1 69013224 +system.ruby.network.routers0.msg_bytes.Response_Control::1 4364936 +system.ruby.network.routers0.msg_bytes.Response_Control::2 4335816 +system.ruby.network.routers0.msg_bytes.Writeback_Data::0 22775976 +system.ruby.network.routers0.msg_bytes.Writeback_Data::1 5256 +system.ruby.network.routers0.msg_bytes.Writeback_Control::0 1502800 +system.ruby.l1_cntrl1.L1Dcache.demand_hits 12207979 # Number of cache demand hits +system.ruby.l1_cntrl1.L1Dcache.demand_misses 1269749 # Number of cache demand misses +system.ruby.l1_cntrl1.L1Dcache.demand_accesses 13477728 # Number of cache demand accesses +system.ruby.l1_cntrl1.L1Icache.demand_hits 55770180 # Number of cache demand hits +system.ruby.l1_cntrl1.L1Icache.demand_misses 458640 # Number of cache demand misses +system.ruby.l1_cntrl1.L1Icache.demand_accesses 56228820 # Number of cache demand accesses system.ruby.l1_cntrl1.prefetcher.miss_observed 0 # number of misses observed system.ruby.l1_cntrl1.prefetcher.allocated_streams 0 # number of streams allocated for prefetching system.ruby.l1_cntrl1.prefetcher.prefetches_requested 0 # number of prefetch requests made @@ -329,87 +347,70 @@ system.ruby.l1_cntrl1.prefetcher.partial_hits 0 system.ruby.l1_cntrl1.prefetcher.pages_crossed 0 # number of prefetches across pages system.ruby.l1_cntrl1.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed system.ruby.l1_cntrl1.fully_busy_cycles 12 # cycles for which number of transistions == max transitions -system.ruby.l2_cntrl0.L2cache.demand_hits 2436073 # Number of cache demand hits -system.ruby.l2_cntrl0.L2cache.demand_misses 222615 # Number of cache demand misses -system.ruby.l2_cntrl0.L2cache.demand_accesses 2658688 # Number of cache demand accesses -system.ruby.l2_cntrl0.fully_busy_cycles 1 # cycles for which number of transistions == max transitions -system.ruby.network.routers0.percent_links_utilized 0.032337 -system.ruby.network.routers0.msg_count.Control::0 930345 -system.ruby.network.routers0.msg_count.Request_Control::0 42551 -system.ruby.network.routers0.msg_count.Response_Data::1 958526 -system.ruby.network.routers0.msg_count.Response_Control::1 545643 -system.ruby.network.routers0.msg_count.Response_Control::2 541988 -system.ruby.network.routers0.msg_count.Writeback_Data::0 316326 -system.ruby.network.routers0.msg_count.Writeback_Data::1 73 -system.ruby.network.routers0.msg_count.Writeback_Control::0 187843 -system.ruby.network.routers0.msg_bytes.Control::0 7442760 -system.ruby.network.routers0.msg_bytes.Request_Control::0 340408 -system.ruby.network.routers0.msg_bytes.Response_Data::1 69013872 -system.ruby.network.routers0.msg_bytes.Response_Control::1 4365144 -system.ruby.network.routers0.msg_bytes.Response_Control::2 4335904 -system.ruby.network.routers0.msg_bytes.Writeback_Data::0 22775472 -system.ruby.network.routers0.msg_bytes.Writeback_Data::1 5256 -system.ruby.network.routers0.msg_bytes.Writeback_Control::0 1502744 -system.ruby.network.routers1.percent_links_utilized 0.054685 -system.ruby.network.routers1.msg_count.Control::0 1728343 -system.ruby.network.routers1.msg_count.Request_Control::0 38847 -system.ruby.network.routers1.msg_count.Response_Data::1 1751957 -system.ruby.network.routers1.msg_count.Response_Control::1 1215400 -system.ruby.network.routers1.msg_count.Response_Control::2 1215698 -system.ruby.network.routers1.msg_count.Writeback_Data::0 257501 +system.ruby.network.routers1.percent_links_utilized 0.054687 +system.ruby.network.routers1.msg_count.Control::0 1728389 +system.ruby.network.routers1.msg_count.Request_Control::2 38822 +system.ruby.network.routers1.msg_count.Response_Data::1 1752004 +system.ruby.network.routers1.msg_count.Response_Control::1 1215403 +system.ruby.network.routers1.msg_count.Response_Control::2 1215696 +system.ruby.network.routers1.msg_count.Writeback_Data::0 257519 system.ruby.network.routers1.msg_count.Writeback_Data::1 203 -system.ruby.network.routers1.msg_count.Writeback_Control::0 921073 -system.ruby.network.routers1.msg_bytes.Control::0 13826744 -system.ruby.network.routers1.msg_bytes.Request_Control::0 310776 -system.ruby.network.routers1.msg_bytes.Response_Data::1 126140904 -system.ruby.network.routers1.msg_bytes.Response_Control::1 9723200 -system.ruby.network.routers1.msg_bytes.Response_Control::2 9725584 -system.ruby.network.routers1.msg_bytes.Writeback_Data::0 18540072 +system.ruby.network.routers1.msg_count.Writeback_Control::0 921082 +system.ruby.network.routers1.msg_bytes.Control::0 13827112 +system.ruby.network.routers1.msg_bytes.Request_Control::2 310576 +system.ruby.network.routers1.msg_bytes.Response_Data::1 126144288 +system.ruby.network.routers1.msg_bytes.Response_Control::1 9723224 +system.ruby.network.routers1.msg_bytes.Response_Control::2 9725568 +system.ruby.network.routers1.msg_bytes.Writeback_Data::0 18541368 system.ruby.network.routers1.msg_bytes.Writeback_Data::1 14616 -system.ruby.network.routers1.msg_bytes.Writeback_Control::0 7368584 -system.ruby.network.routers2.percent_links_utilized 0.091275 -system.ruby.network.routers2.msg_count.Control::0 2832497 -system.ruby.network.routers2.msg_count.Request_Control::0 79755 -system.ruby.network.routers2.msg_count.Response_Data::1 2883501 -system.ruby.network.routers2.msg_count.Response_Control::1 1836231 -system.ruby.network.routers2.msg_count.Response_Control::2 1757686 -system.ruby.network.routers2.msg_count.Writeback_Data::0 573827 +system.ruby.network.routers1.msg_bytes.Writeback_Control::0 7368656 +system.ruby.l2_cntrl0.L2cache.demand_hits 2436175 # Number of cache demand hits +system.ruby.l2_cntrl0.L2cache.demand_misses 222585 # Number of cache demand misses +system.ruby.l2_cntrl0.L2cache.demand_accesses 2658760 # Number of cache demand accesses +system.ruby.l2_cntrl0.fully_busy_cycles 2 # cycles for which number of transistions == max transitions +system.ruby.network.routers2.percent_links_utilized 0.091278 +system.ruby.network.routers2.msg_count.Control::0 2832571 +system.ruby.network.routers2.msg_count.Request_Control::2 79701 +system.ruby.network.routers2.msg_count.Response_Data::1 2883607 +system.ruby.network.routers2.msg_count.Response_Control::1 1836255 +system.ruby.network.routers2.msg_count.Response_Control::2 1757673 +system.ruby.network.routers2.msg_count.Writeback_Data::0 573852 system.ruby.network.routers2.msg_count.Writeback_Data::1 276 -system.ruby.network.routers2.msg_count.Writeback_Control::0 1108916 -system.ruby.network.routers2.msg_bytes.Control::0 22659976 -system.ruby.network.routers2.msg_bytes.Request_Control::0 638040 -system.ruby.network.routers2.msg_bytes.Response_Data::1 207612072 -system.ruby.network.routers2.msg_bytes.Response_Control::1 14689848 -system.ruby.network.routers2.msg_bytes.Response_Control::2 14061488 -system.ruby.network.routers2.msg_bytes.Writeback_Data::0 41315544 +system.ruby.network.routers2.msg_count.Writeback_Control::0 1108932 +system.ruby.network.routers2.msg_bytes.Control::0 22660568 +system.ruby.network.routers2.msg_bytes.Request_Control::2 637608 +system.ruby.network.routers2.msg_bytes.Response_Data::1 207619704 +system.ruby.network.routers2.msg_bytes.Response_Control::1 14690040 +system.ruby.network.routers2.msg_bytes.Response_Control::2 14061384 +system.ruby.network.routers2.msg_bytes.Writeback_Data::0 41317344 system.ruby.network.routers2.msg_bytes.Writeback_Data::1 19872 -system.ruby.network.routers2.msg_bytes.Writeback_Control::0 8871328 +system.ruby.network.routers2.msg_bytes.Writeback_Control::0 8871456 system.ruby.memctrl_clk_domain.clock 1500 # Clock period in ticks -system.ruby.dir_cntrl0.memBuffer.memReq 316330 # Total number of memory requests -system.ruby.dir_cntrl0.memBuffer.memRead 174269 # Number of memory reads -system.ruby.dir_cntrl0.memBuffer.memWrite 142061 # Number of memory writes -system.ruby.dir_cntrl0.memBuffer.memRefresh 708964 # Number of memory refreshes -system.ruby.dir_cntrl0.memBuffer.memWaitCycles 938904 # Delay stalled at the head of the bank queue -system.ruby.dir_cntrl0.memBuffer.memInputQ 51 # Delay in the input queue -system.ruby.dir_cntrl0.memBuffer.memBankQ 6500 # Delay behind the head of the bank queue -system.ruby.dir_cntrl0.memBuffer.totalStalls 945455 # Total number of stall cycles -system.ruby.dir_cntrl0.memBuffer.stallsPerReq 2.988825 # Expected number of stall cycles per request -system.ruby.dir_cntrl0.memBuffer.memBankBusy 927536 # memory stalls due to busy bank -system.ruby.dir_cntrl0.memBuffer.memBusBusy 8164 # memory stalls due to busy bus -system.ruby.dir_cntrl0.memBuffer.memReadWriteBusy 74 # memory stalls due to read write turnaround -system.ruby.dir_cntrl0.memBuffer.memDataBusBusy 11 # memory stalls due to read read turnaround -system.ruby.dir_cntrl0.memBuffer.memArbWait 3119 # memory stalls due to arbitration -system.ruby.dir_cntrl0.memBuffer.memBankCount | 10282 3.25% 3.25% | 9688 3.06% 6.31% | 9618 3.04% 9.35% | 9663 3.05% 12.41% | 10044 3.18% 15.58% | 9949 3.15% 18.73% | 9819 3.10% 21.83% | 9702 3.07% 24.90% | 9851 3.11% 28.01% | 9707 3.07% 31.08% | 9714 3.07% 34.15% | 9748 3.08% 37.23% | 9782 3.09% 40.33% | 9588 3.03% 43.36% | 9583 3.03% 46.39% | 8652 2.74% 49.12% | 10210 3.23% 52.35% | 9818 3.10% 55.45% | 9760 3.09% 58.54% | 9707 3.07% 61.61% | 10012 3.17% 64.77% | 9864 3.12% 67.89% | 9722 3.07% 70.96% | 9786 3.09% 74.06% | 10077 3.19% 77.24% | 9920 3.14% 80.38% | 10087 3.19% 83.57% | 10790 3.41% 86.98% | 10587 3.35% 90.33% | 10505 3.32% 93.65% | 10419 3.29% 96.94% | 9676 3.06% 100.00% # Number of accesses per bank -system.ruby.dir_cntrl0.memBuffer.memBankCount::total 316330 # Number of accesses per bank +system.ruby.dir_cntrl0.memBuffer.memReq 316333 # Total number of memory requests +system.ruby.dir_cntrl0.memBuffer.memRead 174271 # Number of memory reads +system.ruby.dir_cntrl0.memBuffer.memWrite 142062 # Number of memory writes +system.ruby.dir_cntrl0.memBuffer.memRefresh 709010 # Number of memory refreshes +system.ruby.dir_cntrl0.memBuffer.memWaitCycles 938353 # Delay stalled at the head of the bank queue +system.ruby.dir_cntrl0.memBuffer.memInputQ 49 # Delay in the input queue +system.ruby.dir_cntrl0.memBuffer.memBankQ 6542 # Delay behind the head of the bank queue +system.ruby.dir_cntrl0.memBuffer.totalStalls 944944 # Total number of stall cycles +system.ruby.dir_cntrl0.memBuffer.stallsPerReq 2.987181 # Expected number of stall cycles per request +system.ruby.dir_cntrl0.memBuffer.memBankBusy 926785 # memory stalls due to busy bank +system.ruby.dir_cntrl0.memBuffer.memBusBusy 8256 # memory stalls due to busy bus +system.ruby.dir_cntrl0.memBuffer.memReadWriteBusy 98 # memory stalls due to read write turnaround +system.ruby.dir_cntrl0.memBuffer.memDataBusBusy 9 # memory stalls due to read read turnaround +system.ruby.dir_cntrl0.memBuffer.memArbWait 3205 # memory stalls due to arbitration +system.ruby.dir_cntrl0.memBuffer.memBankCount | 10282 3.25% 3.25% | 9688 3.06% 6.31% | 9618 3.04% 9.35% | 9663 3.05% 12.41% | 10044 3.18% 15.58% | 9949 3.15% 18.73% | 9819 3.10% 21.83% | 9702 3.07% 24.90% | 9851 3.11% 28.01% | 9707 3.07% 31.08% | 9714 3.07% 34.15% | 9748 3.08% 37.23% | 9782 3.09% 40.33% | 9588 3.03% 43.36% | 9583 3.03% 46.39% | 8652 2.74% 49.12% | 10210 3.23% 52.35% | 9818 3.10% 55.45% | 9760 3.09% 58.54% | 9707 3.07% 61.61% | 10012 3.17% 64.77% | 9864 3.12% 67.89% | 9722 3.07% 70.96% | 9786 3.09% 74.06% | 10077 3.19% 77.24% | 9920 3.14% 80.38% | 10090 3.19% 83.57% | 10790 3.41% 86.98% | 10587 3.35% 90.33% | 10505 3.32% 93.65% | 10419 3.29% 96.94% | 9676 3.06% 100.00% # Number of accesses per bank +system.ruby.dir_cntrl0.memBuffer.memBankCount::total 316333 # Number of accesses per bank system.ruby.network.routers3.percent_links_utilized 0.006678 -system.ruby.network.routers3.msg_count.Control::0 173809 -system.ruby.network.routers3.msg_count.Response_Data::1 271441 -system.ruby.network.routers3.msg_count.Response_Control::1 122868 +system.ruby.network.routers3.msg_count.Control::0 173811 +system.ruby.network.routers3.msg_count.Response_Data::1 271445 +system.ruby.network.routers3.msg_count.Response_Control::1 122871 system.ruby.network.routers3.msg_count.Writeback_Control::0 47547 system.ruby.network.routers3.msg_count.Writeback_Control::1 46736 -system.ruby.network.routers3.msg_bytes.Control::0 1390472 -system.ruby.network.routers3.msg_bytes.Response_Data::1 19543752 -system.ruby.network.routers3.msg_bytes.Response_Control::1 982944 +system.ruby.network.routers3.msg_bytes.Control::0 1390488 +system.ruby.network.routers3.msg_bytes.Response_Data::1 19544040 +system.ruby.network.routers3.msg_bytes.Response_Control::1 982968 system.ruby.network.routers3.msg_bytes.Writeback_Control::0 380376 system.ruby.network.routers3.msg_bytes.Writeback_Control::1 373888 system.ruby.network.routers4.percent_links_utilized 0.000239 @@ -419,37 +420,37 @@ system.ruby.network.routers4.msg_count.Writeback_Control::1 46736 system.ruby.network.routers4.msg_bytes.Response_Data::1 58392 system.ruby.network.routers4.msg_bytes.Writeback_Control::0 380376 system.ruby.network.routers4.msg_bytes.Writeback_Control::1 373888 -system.ruby.network.routers5.percent_links_utilized 0.037044 -system.ruby.network.routers5.msg_count.Control::0 2832497 -system.ruby.network.routers5.msg_count.Request_Control::0 81398 -system.ruby.network.routers5.msg_count.Response_Data::1 2933118 -system.ruby.network.routers5.msg_count.Response_Control::1 1860071 -system.ruby.network.routers5.msg_count.Response_Control::2 1757686 -system.ruby.network.routers5.msg_count.Writeback_Data::0 573827 +system.ruby.network.routers5.percent_links_utilized 0.037045 +system.ruby.network.routers5.msg_count.Control::0 2832571 +system.ruby.network.routers5.msg_count.Request_Control::2 81344 +system.ruby.network.routers5.msg_count.Response_Data::1 2933192 +system.ruby.network.routers5.msg_count.Response_Control::1 1860073 +system.ruby.network.routers5.msg_count.Response_Control::2 1757673 +system.ruby.network.routers5.msg_count.Writeback_Data::0 573852 system.ruby.network.routers5.msg_count.Writeback_Data::1 276 -system.ruby.network.routers5.msg_count.Writeback_Control::0 1156463 +system.ruby.network.routers5.msg_count.Writeback_Control::0 1156479 system.ruby.network.routers5.msg_count.Writeback_Control::1 46736 -system.ruby.network.routers5.msg_bytes.Control::0 22659976 -system.ruby.network.routers5.msg_bytes.Request_Control::0 651184 -system.ruby.network.routers5.msg_bytes.Response_Data::1 211184496 -system.ruby.network.routers5.msg_bytes.Response_Control::1 14880568 -system.ruby.network.routers5.msg_bytes.Response_Control::2 14061488 -system.ruby.network.routers5.msg_bytes.Writeback_Data::0 41315544 +system.ruby.network.routers5.msg_bytes.Control::0 22660568 +system.ruby.network.routers5.msg_bytes.Request_Control::2 650752 +system.ruby.network.routers5.msg_bytes.Response_Data::1 211189824 +system.ruby.network.routers5.msg_bytes.Response_Control::1 14880584 +system.ruby.network.routers5.msg_bytes.Response_Control::2 14061384 +system.ruby.network.routers5.msg_bytes.Writeback_Data::0 41317344 system.ruby.network.routers5.msg_bytes.Writeback_Data::1 19872 -system.ruby.network.routers5.msg_bytes.Writeback_Control::0 9251704 +system.ruby.network.routers5.msg_bytes.Writeback_Control::0 9251832 system.ruby.network.routers5.msg_bytes.Writeback_Control::1 373888 -system.ruby.network.msg_count.Control 8497491 -system.ruby.network.msg_count.Request_Control 242551 -system.ruby.network.msg_count.Response_Data 8799354 -system.ruby.network.msg_count.Response_Control 10853271 -system.ruby.network.msg_count.Writeback_Data 1722309 -system.ruby.network.msg_count.Writeback_Control 3609597 -system.ruby.network.msg_byte.Control 67979928 -system.ruby.network.msg_byte.Request_Control 1940408 -system.ruby.network.msg_byte.Response_Data 633553488 -system.ruby.network.msg_byte.Response_Control 86826168 -system.ruby.network.msg_byte.Writeback_Data 124006248 -system.ruby.network.msg_byte.Writeback_Control 28876776 +system.ruby.network.msg_count.Control 8497713 +system.ruby.network.msg_count.Request_Control 242389 +system.ruby.network.msg_count.Response_Data 8799576 +system.ruby.network.msg_count.Response_Control 10853238 +system.ruby.network.msg_count.Writeback_Data 1722384 +system.ruby.network.msg_count.Writeback_Control 3609645 +system.ruby.network.msg_byte.Control 67981704 +system.ruby.network.msg_byte.Request_Control 1939112 +system.ruby.network.msg_byte.Response_Data 633569472 +system.ruby.network.msg_byte.Response_Control 86825904 +system.ruby.network.msg_byte.Writeback_Data 124011648 +system.ruby.network.msg_byte.Writeback_Control 28877160 system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). system.pc.south_bridge.ide.disks0.dma_read_bytes 32768 # Number of bytes transfered via DMA reads (not PRD). system.pc.south_bridge.ide.disks0.dma_read_txs 30 # Number of DMA read transactions (not PRD). @@ -462,13 +463,13 @@ system.pc.south_bridge.ide.disks1.dma_read_txs 0 system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. -system.iobus.throughput 383259 # Throughput (bytes/s) -system.iobus.trans_dist::ReadReq 858443 # Transaction distribution -system.iobus.trans_dist::ReadResp 858443 # Transaction distribution -system.iobus.trans_dist::WriteReq 37726 # Transaction distribution -system.iobus.trans_dist::WriteResp 37726 # Transaction distribution -system.iobus.trans_dist::MessageReq 1924 # Transaction distribution -system.iobus.trans_dist::MessageResp 1924 # Transaction distribution +system.iobus.throughput 383266 # Throughput (bytes/s) +system.iobus.trans_dist::ReadReq 858445 # Transaction distribution +system.iobus.trans_dist::ReadResp 858445 # Transaction distribution +system.iobus.trans_dist::WriteReq 37732 # Transaction distribution +system.iobus.trans_dist::WriteResp 37732 # Transaction distribution +system.iobus.trans_dist::MessageReq 1926 # Transaction distribution +system.iobus.trans_dist::MessageResp 1926 # Transaction distribution system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1702 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 1646 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3348 # Packet count per connected master and slave (bytes) @@ -484,10 +485,10 @@ system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.p system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.i_dont_exist.pio 90 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 14492 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 743206 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 242 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 743214 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 244 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.pciconfig.pio 2126 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1703384 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1703394 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 16 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 4650 # Packet count per connected master and slave (bytes) @@ -503,10 +504,10 @@ system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.p system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 258 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 5244 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 89454 # Packet count per connected master and slave (bytes) -system.iobus.pkt_count::total 1796186 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 260 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 5252 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 89464 # Packet count per connected master and slave (bytes) +system.iobus.pkt_count::total 1796206 # Packet count per connected master and slave (bytes) system.iobus.tot_pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl0.sequencer.pio-slave-port 3404 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.pc.south_bridge.io_apic.int_master::system.ruby.l1_cntrl1.sequencer.pio-slave-port 3292 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.pc.south_bridge.io_apic.int_master::total 6696 # Cumulative packet size per connected master and slave (bytes) @@ -522,10 +523,10 @@ system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::syste system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.i_dont_exist.pio 45 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.com_1.pio 7246 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1486406 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 484 # Cumulative packet size per connected master and slave (bytes) +system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 1486422 # Cumulative packet size per connected master and slave (bytes) +system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 488 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::system.pc.pciconfig.pio 4252 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1972069 # Cumulative packet size per connected master and slave (bytes) +system.iobus.tot_pkt_size_system.ruby.l1_cntrl0.sequencer.mem-master-port::total 1972089 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.cmos.pio 8 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.south_bridge.ide.pio 3020 # Cumulative packet size per connected master and slave (bytes) @@ -541,22 +542,22 @@ system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::syste system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 516 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 10485 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 54229 # Cumulative packet size per connected master and slave (bytes) -system.iobus.tot_pkt_size::total 2032994 # Cumulative packet size per connected master and slave (bytes) -system.iobus.data_through_bus 2032994 # Total data (bytes) -system.iobus.reqLayer0.occupancy 45000 # Layer occupancy (ticks) +system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl0.sequencer.pio-slave-port 520 # Cumulative packet size per connected master and slave (bytes) +system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::system.ruby.l1_cntrl1.sequencer.pio-slave-port 10501 # Cumulative packet size per connected master and slave (bytes) +system.iobus.tot_pkt_size_system.ruby.l1_cntrl1.sequencer.mem-master-port::total 54249 # Cumulative packet size per connected master and slave (bytes) +system.iobus.tot_pkt_size::total 2033034 # Cumulative packet size per connected master and slave (bytes) +system.iobus.data_through_bus 2033034 # Total data (bytes) +system.iobus.reqLayer0.occupancy 44000 # Layer occupancy (ticks) system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer1.occupancy 7000 # Layer occupancy (ticks) +system.iobus.reqLayer1.occupancy 6500 # Layer occupancy (ticks) system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer2.occupancy 10111500 # Layer occupancy (ticks) +system.iobus.reqLayer2.occupancy 10235000 # Layer occupancy (ticks) system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer3.occupancy 143500 # Layer occupancy (ticks) +system.iobus.reqLayer3.occupancy 144000 # Layer occupancy (ticks) system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer4.occupancy 1076000 # Layer occupancy (ticks) +system.iobus.reqLayer4.occupancy 1064500 # Layer occupancy (ticks) system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer5.occupancy 95000 # Layer occupancy (ticks) +system.iobus.reqLayer5.occupancy 92000 # Layer occupancy (ticks) system.iobus.reqLayer5.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer6.occupancy 57500 # Layer occupancy (ticks) system.iobus.reqLayer6.utilization 0.0 # Layer utilization (%) @@ -564,65 +565,64 @@ system.iobus.reqLayer7.occupancy 30321000 # La system.iobus.reqLayer7.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer8.occupancy 467293000 # Layer occupancy (ticks) system.iobus.reqLayer8.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer9.occupancy 1240500 # Layer occupancy (ticks) +system.iobus.reqLayer9.occupancy 1237000 # Layer occupancy (ticks) system.iobus.reqLayer9.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer10.occupancy 41494500 # Layer occupancy (ticks) +system.iobus.reqLayer10.occupancy 41501500 # Layer occupancy (ticks) system.iobus.reqLayer10.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer11.occupancy 2000 # Layer occupancy (ticks) system.iobus.reqLayer11.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer12.occupancy 23487000 # Layer occupancy (ticks) +system.iobus.reqLayer12.occupancy 23566000 # Layer occupancy (ticks) system.iobus.reqLayer12.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer13.occupancy 12000 # Layer occupancy (ticks) system.iobus.reqLayer13.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer14.occupancy 9000 # Layer occupancy (ticks) +system.iobus.reqLayer14.occupancy 12000 # Layer occupancy (ticks) system.iobus.reqLayer14.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer15.occupancy 9000 # Layer occupancy (ticks) +system.iobus.reqLayer15.occupancy 12000 # Layer occupancy (ticks) system.iobus.reqLayer15.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer16.occupancy 10500 # Layer occupancy (ticks) +system.iobus.reqLayer16.occupancy 11000 # Layer occupancy (ticks) system.iobus.reqLayer16.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer17.occupancy 469626032 # Layer occupancy (ticks) +system.iobus.reqLayer17.occupancy 469636032 # Layer occupancy (ticks) system.iobus.reqLayer17.utilization 0.0 # Layer utilization (%) -system.iobus.reqLayer18.occupancy 7795368 # Layer occupancy (ticks) +system.iobus.reqLayer18.occupancy 7824868 # Layer occupancy (ticks) system.iobus.reqLayer18.utilization 0.0 # Layer utilization (%) system.iobus.reqLayer20.occupancy 1328500 # Layer occupancy (ticks) system.iobus.reqLayer20.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer0.occupancy 2413900 # Layer occupancy (ticks) +system.iobus.respLayer0.occupancy 2417900 # Layer occupancy (ticks) system.iobus.respLayer0.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer2.occupancy 1790216000 # Layer occupancy (ticks) +system.iobus.respLayer2.occupancy 1790325500 # Layer occupancy (ticks) system.iobus.respLayer2.utilization 0.0 # Layer utilization (%) -system.iobus.respLayer4.occupancy 80190500 # Layer occupancy (ticks) +system.iobus.respLayer4.occupancy 80269500 # Layer occupancy (ticks) system.iobus.respLayer4.utilization 0.0 # Layer utilization (%) -system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks -system.cpu0.numCycles 10608993500 # number of cpu cycles simulated +system.cpu0.numCycles 10608993599 # number of cpu cycles simulated system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu0.committedInsts 60258540 # Number of instructions committed -system.cpu0.committedOps 115564120 # Number of ops (including micro ops) committed -system.cpu0.num_int_alu_accesses 108491956 # Number of integer alu accesses +system.cpu0.committedInsts 60256011 # Number of instructions committed +system.cpu0.committedOps 115558641 # Number of ops (including micro ops) committed +system.cpu0.num_int_alu_accesses 108487069 # Number of integer alu accesses system.cpu0.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu0.num_func_calls 1055514 # number of times a function call or return occured -system.cpu0.num_conditional_control_insts 10262377 # number of instructions that are conditional controls -system.cpu0.num_int_insts 108491956 # number of integer instructions +system.cpu0.num_func_calls 1055482 # number of times a function call or return occured +system.cpu0.num_conditional_control_insts 10261722 # number of instructions that are conditional controls +system.cpu0.num_int_insts 108487069 # number of integer instructions system.cpu0.num_fp_insts 0 # number of float instructions -system.cpu0.num_int_register_reads 204960312 # number of times the integer registers were read -system.cpu0.num_int_register_writes 92002723 # number of times the integer registers were written +system.cpu0.num_int_register_reads 204952011 # number of times the integer registers were read +system.cpu0.num_int_register_writes 91998767 # number of times the integer registers were written system.cpu0.num_fp_register_reads 0 # number of times the floating registers were read system.cpu0.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu0.num_cc_register_reads 62457106 # number of times the CC registers were read -system.cpu0.num_cc_register_writes 44909896 # number of times the CC registers were written -system.cpu0.num_mem_refs 12954199 # number of memory refs -system.cpu0.num_load_insts 7847946 # Number of load instructions -system.cpu0.num_store_insts 5106253 # Number of store instructions -system.cpu0.num_idle_cycles 10082159440.950100 # Number of idle cycles -system.cpu0.num_busy_cycles 526834059.049901 # Number of busy cycles -system.cpu0.not_idle_fraction 0.049659 # Percentage of non-idle cycles -system.cpu0.idle_fraction 0.950341 # Percentage of idle cycles -system.cpu0.Branches 11678784 # Number of branches fetched -system.cpu0.op_class::No_OpClass 146088 0.13% 0.13% # Class of executed instruction -system.cpu0.op_class::IntAlu 102315691 88.54% 88.66% # Class of executed instruction -system.cpu0.op_class::IntMult 88423 0.08% 88.74% # Class of executed instruction -system.cpu0.op_class::IntDiv 60803 0.05% 88.79% # Class of executed instruction +system.cpu0.num_cc_register_reads 62453256 # number of times the CC registers were read +system.cpu0.num_cc_register_writes 44908337 # number of times the CC registers were written +system.cpu0.num_mem_refs 12953157 # number of memory refs +system.cpu0.num_load_insts 7847096 # Number of load instructions +system.cpu0.num_store_insts 5106061 # Number of store instructions +system.cpu0.num_idle_cycles 10082177996.950100 # Number of idle cycles +system.cpu0.num_busy_cycles 526815602.049901 # Number of busy cycles +system.cpu0.not_idle_fraction 0.049657 # Percentage of non-idle cycles +system.cpu0.idle_fraction 0.950343 # Percentage of idle cycles +system.cpu0.Branches 11678089 # Number of branches fetched +system.cpu0.op_class::No_OpClass 146086 0.13% 0.13% # Class of executed instruction +system.cpu0.op_class::IntAlu 102311234 88.54% 88.66% # Class of executed instruction +system.cpu0.op_class::IntMult 88422 0.08% 88.74% # Class of executed instruction +system.cpu0.op_class::IntDiv 60826 0.05% 88.79% # Class of executed instruction system.cpu0.op_class::FloatAdd 0 0.00% 88.79% # Class of executed instruction system.cpu0.op_class::FloatCmp 0 0.00% 88.79% # Class of executed instruction system.cpu0.op_class::FloatCvt 0 0.00% 88.79% # Class of executed instruction @@ -649,43 +649,43 @@ system.cpu0.op_class::SimdFloatMisc 0 0.00% 88.79% # Cl system.cpu0.op_class::SimdFloatMult 0 0.00% 88.79% # Class of executed instruction system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 88.79% # Class of executed instruction system.cpu0.op_class::SimdFloatSqrt 0 0.00% 88.79% # Class of executed instruction -system.cpu0.op_class::MemRead 7847946 6.79% 95.58% # Class of executed instruction -system.cpu0.op_class::MemWrite 5106253 4.42% 100.00% # Class of executed instruction +system.cpu0.op_class::MemRead 7847096 6.79% 95.58% # Class of executed instruction +system.cpu0.op_class::MemWrite 5106061 4.42% 100.00% # Class of executed instruction system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu0.op_class::total 115565204 # Class of executed instruction +system.cpu0.op_class::total 115559725 # Class of executed instruction system.cpu0.kern.inst.arm 0 # number of arm instructions executed system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed system.cpu1.apic_clk_domain.clock 8000 # Clock period in ticks -system.cpu1.numCycles 10606073624 # number of cpu cycles simulated +system.cpu1.numCycles 10606073781 # number of cpu cycles simulated system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu1.committedInsts 46603518 # Number of instructions committed -system.cpu1.committedOps 89333358 # Number of ops (including micro ops) committed -system.cpu1.num_int_alu_accesses 85695486 # Number of integer alu accesses +system.cpu1.committedInsts 46602187 # Number of instructions committed +system.cpu1.committedOps 89330625 # Number of ops (including micro ops) committed +system.cpu1.num_int_alu_accesses 85693039 # Number of integer alu accesses system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu1.num_func_calls 1689173 # number of times a function call or return occured -system.cpu1.num_conditional_control_insts 7994727 # number of instructions that are conditional controls -system.cpu1.num_int_insts 85695486 # number of integer instructions +system.cpu1.num_func_calls 1689151 # number of times a function call or return occured +system.cpu1.num_conditional_control_insts 7994407 # number of instructions that are conditional controls +system.cpu1.num_int_insts 85693039 # number of integer instructions system.cpu1.num_fp_insts 0 # number of float instructions -system.cpu1.num_int_register_reads 165899619 # number of times the integer registers were read -system.cpu1.num_int_register_writes 70976415 # number of times the integer registers were written +system.cpu1.num_int_register_reads 165895875 # number of times the integer registers were read +system.cpu1.num_int_register_writes 70974584 # number of times the integer registers were written system.cpu1.num_fp_register_reads 0 # number of times the floating registers were read system.cpu1.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu1.num_cc_register_reads 49188622 # number of times the CC registers were read -system.cpu1.num_cc_register_writes 31805425 # number of times the CC registers were written -system.cpu1.num_mem_refs 13507073 # number of memory refs -system.cpu1.num_load_insts 8734970 # Number of load instructions -system.cpu1.num_store_insts 4772103 # Number of store instructions -system.cpu1.num_idle_cycles 10285699632.922689 # Number of idle cycles -system.cpu1.num_busy_cycles 320373991.077311 # Number of busy cycles -system.cpu1.not_idle_fraction 0.030207 # Percentage of non-idle cycles -system.cpu1.idle_fraction 0.969793 # Percentage of idle cycles -system.cpu1.Branches 10261767 # Number of branches fetched -system.cpu1.op_class::No_OpClass 160875 0.18% 0.18% # Class of executed instruction -system.cpu1.op_class::IntAlu 75501866 84.52% 84.70% # Class of executed instruction -system.cpu1.op_class::IntMult 96299 0.11% 84.80% # Class of executed instruction -system.cpu1.op_class::IntDiv 67676 0.08% 84.88% # Class of executed instruction +system.cpu1.num_cc_register_reads 49186847 # number of times the CC registers were read +system.cpu1.num_cc_register_writes 31804657 # number of times the CC registers were written +system.cpu1.num_mem_refs 13506592 # number of memory refs +system.cpu1.num_load_insts 8734544 # Number of load instructions +system.cpu1.num_store_insts 4772048 # Number of store instructions +system.cpu1.num_idle_cycles 10285708583.748486 # Number of idle cycles +system.cpu1.num_busy_cycles 320365197.251515 # Number of busy cycles +system.cpu1.not_idle_fraction 0.030206 # Percentage of non-idle cycles +system.cpu1.idle_fraction 0.969794 # Percentage of idle cycles +system.cpu1.Branches 10261414 # Number of branches fetched +system.cpu1.op_class::No_OpClass 160911 0.18% 0.18% # Class of executed instruction +system.cpu1.op_class::IntAlu 75499496 84.52% 84.70% # Class of executed instruction +system.cpu1.op_class::IntMult 96292 0.11% 84.80% # Class of executed instruction +system.cpu1.op_class::IntDiv 67765 0.08% 84.88% # Class of executed instruction system.cpu1.op_class::FloatAdd 0 0.00% 84.88% # Class of executed instruction system.cpu1.op_class::FloatCmp 0 0.00% 84.88% # Class of executed instruction system.cpu1.op_class::FloatCvt 0 0.00% 84.88% # Class of executed instruction @@ -712,96 +712,96 @@ system.cpu1.op_class::SimdFloatMisc 0 0.00% 84.88% # Cl system.cpu1.op_class::SimdFloatMult 0 0.00% 84.88% # Class of executed instruction system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 84.88% # Class of executed instruction system.cpu1.op_class::SimdFloatSqrt 0 0.00% 84.88% # Class of executed instruction -system.cpu1.op_class::MemRead 8734970 9.78% 94.66% # Class of executed instruction -system.cpu1.op_class::MemWrite 4772103 5.34% 100.00% # Class of executed instruction +system.cpu1.op_class::MemRead 8734544 9.78% 94.66% # Class of executed instruction +system.cpu1.op_class::MemWrite 4772048 5.34% 100.00% # Class of executed instruction system.cpu1.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu1.op_class::total 89333789 # Class of executed instruction +system.cpu1.op_class::total 89331056 # Class of executed instruction system.cpu1.kern.inst.arm 0 # number of arm instructions executed system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed -system.ruby.network.routers0.throttle0.link_utilization 0.041639 -system.ruby.network.routers0.throttle0.msg_count.Request_Control::0 42551 -system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 918114 -system.ruby.network.routers0.throttle0.msg_count.Response_Control::1 529410 -system.ruby.network.routers0.throttle0.msg_bytes.Request_Control::0 340408 -system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::1 66104208 -system.ruby.network.routers0.throttle0.msg_bytes.Response_Control::1 4235280 -system.ruby.network.routers0.throttle1.link_utilization 0.023036 -system.ruby.network.routers0.throttle1.msg_count.Control::0 930345 -system.ruby.network.routers0.throttle1.msg_count.Response_Data::1 40412 -system.ruby.network.routers0.throttle1.msg_count.Response_Control::1 16233 -system.ruby.network.routers0.throttle1.msg_count.Response_Control::2 541988 -system.ruby.network.routers0.throttle1.msg_count.Writeback_Data::0 316326 +system.ruby.network.routers0.throttle0.link_utilization 0.041641 +system.ruby.network.routers0.throttle0.msg_count.Request_Control::2 42522 +system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 918158 +system.ruby.network.routers0.throttle0.msg_count.Response_Control::1 529385 +system.ruby.network.routers0.throttle0.msg_bytes.Request_Control::2 340176 +system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::1 66107376 +system.ruby.network.routers0.throttle0.msg_bytes.Response_Control::1 4235080 +system.ruby.network.routers0.throttle1.link_utilization 0.023034 +system.ruby.network.routers0.throttle1.msg_count.Control::0 930371 +system.ruby.network.routers0.throttle1.msg_count.Response_Data::1 40359 +system.ruby.network.routers0.throttle1.msg_count.Response_Control::1 16232 +system.ruby.network.routers0.throttle1.msg_count.Response_Control::2 541977 +system.ruby.network.routers0.throttle1.msg_count.Writeback_Data::0 316333 system.ruby.network.routers0.throttle1.msg_count.Writeback_Data::1 73 -system.ruby.network.routers0.throttle1.msg_count.Writeback_Control::0 187843 -system.ruby.network.routers0.throttle1.msg_bytes.Control::0 7442760 -system.ruby.network.routers0.throttle1.msg_bytes.Response_Data::1 2909664 -system.ruby.network.routers0.throttle1.msg_bytes.Response_Control::1 129864 -system.ruby.network.routers0.throttle1.msg_bytes.Response_Control::2 4335904 -system.ruby.network.routers0.throttle1.msg_bytes.Writeback_Data::0 22775472 +system.ruby.network.routers0.throttle1.msg_count.Writeback_Control::0 187850 +system.ruby.network.routers0.throttle1.msg_bytes.Control::0 7442968 +system.ruby.network.routers0.throttle1.msg_bytes.Response_Data::1 2905848 +system.ruby.network.routers0.throttle1.msg_bytes.Response_Control::1 129856 +system.ruby.network.routers0.throttle1.msg_bytes.Response_Control::2 4335816 +system.ruby.network.routers0.throttle1.msg_bytes.Writeback_Data::0 22775976 system.ruby.network.routers0.throttle1.msg_bytes.Writeback_Data::1 5256 -system.ruby.network.routers0.throttle1.msg_bytes.Writeback_Control::0 1502744 -system.ruby.network.routers1.throttle0.link_utilization 0.078726 -system.ruby.network.routers1.throttle0.msg_count.Request_Control::0 38847 -system.ruby.network.routers1.throttle0.msg_count.Response_Data::1 1718430 -system.ruby.network.routers1.throttle0.msg_count.Response_Control::1 1199317 -system.ruby.network.routers1.throttle0.msg_bytes.Request_Control::0 310776 -system.ruby.network.routers1.throttle0.msg_bytes.Response_Data::1 123726960 -system.ruby.network.routers1.throttle0.msg_bytes.Response_Control::1 9594536 -system.ruby.network.routers1.throttle1.link_utilization 0.030645 -system.ruby.network.routers1.throttle1.msg_count.Control::0 1728343 -system.ruby.network.routers1.throttle1.msg_count.Response_Data::1 33527 -system.ruby.network.routers1.throttle1.msg_count.Response_Control::1 16083 -system.ruby.network.routers1.throttle1.msg_count.Response_Control::2 1215698 -system.ruby.network.routers1.throttle1.msg_count.Writeback_Data::0 257501 +system.ruby.network.routers0.throttle1.msg_bytes.Writeback_Control::0 1502800 +system.ruby.network.routers1.throttle0.link_utilization 0.078728 +system.ruby.network.routers1.throttle0.msg_count.Request_Control::2 38822 +system.ruby.network.routers1.throttle0.msg_count.Response_Data::1 1718478 +system.ruby.network.routers1.throttle0.msg_count.Response_Control::1 1199341 +system.ruby.network.routers1.throttle0.msg_bytes.Request_Control::2 310576 +system.ruby.network.routers1.throttle0.msg_bytes.Response_Data::1 123730416 +system.ruby.network.routers1.throttle0.msg_bytes.Response_Control::1 9594728 +system.ruby.network.routers1.throttle1.link_utilization 0.030646 +system.ruby.network.routers1.throttle1.msg_count.Control::0 1728389 +system.ruby.network.routers1.throttle1.msg_count.Response_Data::1 33526 +system.ruby.network.routers1.throttle1.msg_count.Response_Control::1 16062 +system.ruby.network.routers1.throttle1.msg_count.Response_Control::2 1215696 +system.ruby.network.routers1.throttle1.msg_count.Writeback_Data::0 257519 system.ruby.network.routers1.throttle1.msg_count.Writeback_Data::1 203 -system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::0 921073 -system.ruby.network.routers1.throttle1.msg_bytes.Control::0 13826744 -system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::1 2413944 -system.ruby.network.routers1.throttle1.msg_bytes.Response_Control::1 128664 -system.ruby.network.routers1.throttle1.msg_bytes.Response_Control::2 9725584 -system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Data::0 18540072 +system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::0 921082 +system.ruby.network.routers1.throttle1.msg_bytes.Control::0 13827112 +system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::1 2413872 +system.ruby.network.routers1.throttle1.msg_bytes.Response_Control::1 128496 +system.ruby.network.routers1.throttle1.msg_bytes.Response_Control::2 9725568 +system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Data::0 18541368 system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Data::1 14616 -system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::0 7368584 +system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::0 7368656 system.ruby.network.routers2.throttle0.link_utilization 0.059393 -system.ruby.network.routers2.throttle0.msg_count.Control::0 2658688 -system.ruby.network.routers2.throttle0.msg_count.Response_Data::1 198942 -system.ruby.network.routers2.throttle0.msg_count.Response_Control::1 119244 -system.ruby.network.routers2.throttle0.msg_count.Response_Control::2 1757686 -system.ruby.network.routers2.throttle0.msg_count.Writeback_Data::0 573827 +system.ruby.network.routers2.throttle0.msg_count.Control::0 2658760 +system.ruby.network.routers2.throttle0.msg_count.Response_Data::1 198922 +system.ruby.network.routers2.throttle0.msg_count.Response_Control::1 119247 +system.ruby.network.routers2.throttle0.msg_count.Response_Control::2 1757673 +system.ruby.network.routers2.throttle0.msg_count.Writeback_Data::0 573852 system.ruby.network.routers2.throttle0.msg_count.Writeback_Data::1 276 -system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::0 1108916 -system.ruby.network.routers2.throttle0.msg_bytes.Control::0 21269504 -system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::1 14323824 -system.ruby.network.routers2.throttle0.msg_bytes.Response_Control::1 953952 -system.ruby.network.routers2.throttle0.msg_bytes.Response_Control::2 14061488 -system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Data::0 41315544 +system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::0 1108932 +system.ruby.network.routers2.throttle0.msg_bytes.Control::0 21270080 +system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::1 14322384 +system.ruby.network.routers2.throttle0.msg_bytes.Response_Control::1 953976 +system.ruby.network.routers2.throttle0.msg_bytes.Response_Control::2 14061384 +system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Data::0 41317344 system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Data::1 19872 -system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::0 8871328 -system.ruby.network.routers2.throttle1.link_utilization 0.123158 -system.ruby.network.routers2.throttle1.msg_count.Control::0 173809 -system.ruby.network.routers2.throttle1.msg_count.Request_Control::0 79755 -system.ruby.network.routers2.throttle1.msg_count.Response_Data::1 2684559 -system.ruby.network.routers2.throttle1.msg_count.Response_Control::1 1716987 -system.ruby.network.routers2.throttle1.msg_bytes.Control::0 1390472 -system.ruby.network.routers2.throttle1.msg_bytes.Request_Control::0 638040 -system.ruby.network.routers2.throttle1.msg_bytes.Response_Data::1 193288248 -system.ruby.network.routers2.throttle1.msg_bytes.Response_Control::1 13735896 +system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::0 8871456 +system.ruby.network.routers2.throttle1.link_utilization 0.123163 +system.ruby.network.routers2.throttle1.msg_count.Control::0 173811 +system.ruby.network.routers2.throttle1.msg_count.Request_Control::2 79701 +system.ruby.network.routers2.throttle1.msg_count.Response_Data::1 2684685 +system.ruby.network.routers2.throttle1.msg_count.Response_Control::1 1717008 +system.ruby.network.routers2.throttle1.msg_bytes.Control::0 1390488 +system.ruby.network.routers2.throttle1.msg_bytes.Request_Control::2 637608 +system.ruby.network.routers2.throttle1.msg_bytes.Response_Data::1 193297320 +system.ruby.network.routers2.throttle1.msg_bytes.Response_Control::1 13736064 system.ruby.network.routers3.throttle0.link_utilization 0.005207 -system.ruby.network.routers3.throttle0.msg_count.Control::0 173809 -system.ruby.network.routers3.throttle0.msg_count.Response_Data::1 96821 +system.ruby.network.routers3.throttle0.msg_count.Control::0 173811 +system.ruby.network.routers3.throttle0.msg_count.Response_Data::1 96823 system.ruby.network.routers3.throttle0.msg_count.Response_Control::1 12100 system.ruby.network.routers3.throttle0.msg_count.Writeback_Control::0 47547 -system.ruby.network.routers3.throttle0.msg_bytes.Control::0 1390472 -system.ruby.network.routers3.throttle0.msg_bytes.Response_Data::1 6971112 +system.ruby.network.routers3.throttle0.msg_bytes.Control::0 1390488 +system.ruby.network.routers3.throttle0.msg_bytes.Response_Data::1 6971256 system.ruby.network.routers3.throttle0.msg_bytes.Response_Control::1 96800 system.ruby.network.routers3.throttle0.msg_bytes.Writeback_Control::0 380376 system.ruby.network.routers3.throttle1.link_utilization 0.008149 -system.ruby.network.routers3.throttle1.msg_count.Response_Data::1 174620 -system.ruby.network.routers3.throttle1.msg_count.Response_Control::1 110768 +system.ruby.network.routers3.throttle1.msg_count.Response_Data::1 174622 +system.ruby.network.routers3.throttle1.msg_count.Response_Control::1 110771 system.ruby.network.routers3.throttle1.msg_count.Writeback_Control::1 46736 -system.ruby.network.routers3.throttle1.msg_bytes.Response_Data::1 12572640 -system.ruby.network.routers3.throttle1.msg_bytes.Response_Control::1 886144 +system.ruby.network.routers3.throttle1.msg_bytes.Response_Data::1 12572784 +system.ruby.network.routers3.throttle1.msg_bytes.Response_Control::1 886168 system.ruby.network.routers3.throttle1.msg_bytes.Writeback_Control::1 373888 system.ruby.network.routers4.throttle0.link_utilization 0.000255 system.ruby.network.routers4.throttle0.msg_count.Response_Data::1 811 @@ -811,42 +811,42 @@ system.ruby.network.routers4.throttle0.msg_bytes.Writeback_Control::1 3738 system.ruby.network.routers4.throttle1.link_utilization 0.000224 system.ruby.network.routers4.throttle1.msg_count.Writeback_Control::0 47547 system.ruby.network.routers4.throttle1.msg_bytes.Writeback_Control::0 380376 -system.ruby.network.routers5.throttle0.link_utilization 0.041639 -system.ruby.network.routers5.throttle0.msg_count.Request_Control::0 42551 -system.ruby.network.routers5.throttle0.msg_count.Response_Data::1 918114 -system.ruby.network.routers5.throttle0.msg_count.Response_Control::1 529410 -system.ruby.network.routers5.throttle0.msg_bytes.Request_Control::0 340408 -system.ruby.network.routers5.throttle0.msg_bytes.Response_Data::1 66104208 -system.ruby.network.routers5.throttle0.msg_bytes.Response_Control::1 4235280 -system.ruby.network.routers5.throttle1.link_utilization 0.078726 -system.ruby.network.routers5.throttle1.msg_count.Request_Control::0 38847 -system.ruby.network.routers5.throttle1.msg_count.Response_Data::1 1718430 -system.ruby.network.routers5.throttle1.msg_count.Response_Control::1 1199317 -system.ruby.network.routers5.throttle1.msg_bytes.Request_Control::0 310776 -system.ruby.network.routers5.throttle1.msg_bytes.Response_Data::1 123726960 -system.ruby.network.routers5.throttle1.msg_bytes.Response_Control::1 9594536 +system.ruby.network.routers5.throttle0.link_utilization 0.041641 +system.ruby.network.routers5.throttle0.msg_count.Request_Control::2 42522 +system.ruby.network.routers5.throttle0.msg_count.Response_Data::1 918158 +system.ruby.network.routers5.throttle0.msg_count.Response_Control::1 529385 +system.ruby.network.routers5.throttle0.msg_bytes.Request_Control::2 340176 +system.ruby.network.routers5.throttle0.msg_bytes.Response_Data::1 66107376 +system.ruby.network.routers5.throttle0.msg_bytes.Response_Control::1 4235080 +system.ruby.network.routers5.throttle1.link_utilization 0.078728 +system.ruby.network.routers5.throttle1.msg_count.Request_Control::2 38822 +system.ruby.network.routers5.throttle1.msg_count.Response_Data::1 1718478 +system.ruby.network.routers5.throttle1.msg_count.Response_Control::1 1199341 +system.ruby.network.routers5.throttle1.msg_bytes.Request_Control::2 310576 +system.ruby.network.routers5.throttle1.msg_bytes.Response_Data::1 123730416 +system.ruby.network.routers5.throttle1.msg_bytes.Response_Control::1 9594728 system.ruby.network.routers5.throttle2.link_utilization 0.059393 -system.ruby.network.routers5.throttle2.msg_count.Control::0 2658688 -system.ruby.network.routers5.throttle2.msg_count.Response_Data::1 198942 -system.ruby.network.routers5.throttle2.msg_count.Response_Control::1 119244 -system.ruby.network.routers5.throttle2.msg_count.Response_Control::2 1757686 -system.ruby.network.routers5.throttle2.msg_count.Writeback_Data::0 573827 +system.ruby.network.routers5.throttle2.msg_count.Control::0 2658760 +system.ruby.network.routers5.throttle2.msg_count.Response_Data::1 198922 +system.ruby.network.routers5.throttle2.msg_count.Response_Control::1 119247 +system.ruby.network.routers5.throttle2.msg_count.Response_Control::2 1757673 +system.ruby.network.routers5.throttle2.msg_count.Writeback_Data::0 573852 system.ruby.network.routers5.throttle2.msg_count.Writeback_Data::1 276 -system.ruby.network.routers5.throttle2.msg_count.Writeback_Control::0 1108916 -system.ruby.network.routers5.throttle2.msg_bytes.Control::0 21269504 -system.ruby.network.routers5.throttle2.msg_bytes.Response_Data::1 14323824 -system.ruby.network.routers5.throttle2.msg_bytes.Response_Control::1 953952 -system.ruby.network.routers5.throttle2.msg_bytes.Response_Control::2 14061488 -system.ruby.network.routers5.throttle2.msg_bytes.Writeback_Data::0 41315544 +system.ruby.network.routers5.throttle2.msg_count.Writeback_Control::0 1108932 +system.ruby.network.routers5.throttle2.msg_bytes.Control::0 21270080 +system.ruby.network.routers5.throttle2.msg_bytes.Response_Data::1 14322384 +system.ruby.network.routers5.throttle2.msg_bytes.Response_Control::1 953976 +system.ruby.network.routers5.throttle2.msg_bytes.Response_Control::2 14061384 +system.ruby.network.routers5.throttle2.msg_bytes.Writeback_Data::0 41317344 system.ruby.network.routers5.throttle2.msg_bytes.Writeback_Data::1 19872 -system.ruby.network.routers5.throttle2.msg_bytes.Writeback_Control::0 8871328 +system.ruby.network.routers5.throttle2.msg_bytes.Writeback_Control::0 8871456 system.ruby.network.routers5.throttle3.link_utilization 0.005207 -system.ruby.network.routers5.throttle3.msg_count.Control::0 173809 -system.ruby.network.routers5.throttle3.msg_count.Response_Data::1 96821 +system.ruby.network.routers5.throttle3.msg_count.Control::0 173811 +system.ruby.network.routers5.throttle3.msg_count.Response_Data::1 96823 system.ruby.network.routers5.throttle3.msg_count.Response_Control::1 12100 system.ruby.network.routers5.throttle3.msg_count.Writeback_Control::0 47547 -system.ruby.network.routers5.throttle3.msg_bytes.Control::0 1390472 -system.ruby.network.routers5.throttle3.msg_bytes.Response_Data::1 6971112 +system.ruby.network.routers5.throttle3.msg_bytes.Control::0 1390488 +system.ruby.network.routers5.throttle3.msg_bytes.Response_Data::1 6971256 system.ruby.network.routers5.throttle3.msg_bytes.Response_Control::1 96800 system.ruby.network.routers5.throttle3.msg_bytes.Writeback_Control::0 380376 system.ruby.network.routers5.throttle4.link_utilization 0.000255 @@ -856,295 +856,295 @@ system.ruby.network.routers5.throttle4.msg_bytes.Response_Data::1 58392 system.ruby.network.routers5.throttle4.msg_bytes.Writeback_Control::1 373888 system.ruby.delayVCHist.vnet_0::bucket_size 4 # delay histogram for vnet_0 system.ruby.delayVCHist.vnet_0::max_bucket 39 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::samples 6099117 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::mean 0.754514 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::stdev 2.340449 # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0 | 5524518 90.58% 90.58% | 380 0.01% 90.59% | 573810 9.41% 99.99% | 129 0.00% 100.00% | 227 0.00% 100.00% | 9 0.00% 100.00% | 44 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_0 -system.ruby.delayVCHist.vnet_0::total 6099117 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::samples 6099217 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::mean 0.754439 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::stdev 2.340051 # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0 | 5524579 90.58% 90.58% | 410 0.01% 90.59% | 573855 9.41% 99.99% | 123 0.00% 100.00% | 205 0.00% 100.00% | 8 0.00% 100.00% | 37 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_0 +system.ruby.delayVCHist.vnet_0::total 6099217 # delay histogram for vnet_0 system.ruby.delayVCHist.vnet_1::bucket_size 2 # delay histogram for vnet_1 system.ruby.delayVCHist.vnet_1::max_bucket 19 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::samples 4683733 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::mean 0.044886 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::stdev 0.594700 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1 | 4656826 99.43% 99.43% | 417 0.01% 99.43% | 407 0.01% 99.44% | 552 0.01% 99.45% | 25430 0.54% 100.00% | 99 0.00% 100.00% | 0 0.00% 100.00% | 1 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_1::total 4683733 # delay histogram for vnet_1 -system.ruby.delayVCHist.vnet_2::bucket_size 2 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::max_bucket 19 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::samples 81398 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::mean 0.027200 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::stdev 0.432471 # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2 | 80998 99.51% 99.51% | 98 0.12% 99.63% | 74 0.09% 99.72% | 96 0.12% 99.84% | 98 0.12% 99.96% | 30 0.04% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% | 2 0.00% 100.00% | 1 0.00% 100.00% # delay histogram for vnet_2 -system.ruby.delayVCHist.vnet_2::total 81398 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_1::samples 4683807 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::mean 0.044910 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::stdev 0.595023 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1 | 4656927 99.43% 99.43% | 381 0.01% 99.43% | 370 0.01% 99.44% | 589 0.01% 99.45% | 25416 0.54% 100.00% | 122 0.00% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_1::total 4683807 # delay histogram for vnet_1 +system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::samples 81344 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::mean 0.000123 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::stdev 0.015680 # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2 | 81339 99.99% 99.99% | 0 0.00% 99.99% | 5 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2 +system.ruby.delayVCHist.vnet_2::total 81344 # delay histogram for vnet_2 system.ruby.LD.latency_hist::bucket_size 16 system.ruby.LD.latency_hist::max_bucket 159 -system.ruby.LD.latency_hist::samples 14938551 -system.ruby.LD.latency_hist::mean 4.746751 -system.ruby.LD.latency_hist::gmean 3.589398 -system.ruby.LD.latency_hist::stdev 6.551138 -system.ruby.LD.latency_hist | 13551480 90.71% 90.71% | 1355950 9.08% 99.79% | 110 0.00% 99.79% | 0 0.00% 99.79% | 9645 0.06% 99.86% | 172 0.00% 99.86% | 20174 0.14% 99.99% | 799 0.01% 100.00% | 192 0.00% 100.00% | 29 0.00% 100.00% -system.ruby.LD.latency_hist::total 14938551 +system.ruby.LD.latency_hist::samples 14937313 +system.ruby.LD.latency_hist::mean 4.746801 +system.ruby.LD.latency_hist::gmean 3.589441 +system.ruby.LD.latency_hist::stdev 6.550511 +system.ruby.LD.latency_hist | 13550250 90.71% 90.71% | 1355967 9.08% 99.79% | 85 0.00% 99.79% | 0 0.00% 99.79% | 9654 0.06% 99.86% | 173 0.00% 99.86% | 20215 0.14% 99.99% | 758 0.01% 100.00% | 186 0.00% 100.00% | 25 0.00% 100.00% +system.ruby.LD.latency_hist::total 14937313 system.ruby.LD.hit_latency_hist::bucket_size 1 system.ruby.LD.hit_latency_hist::max_bucket 9 -system.ruby.LD.hit_latency_hist::samples 13551480 +system.ruby.LD.hit_latency_hist::samples 13550250 system.ruby.LD.hit_latency_hist::mean 3 system.ruby.LD.hit_latency_hist::gmean 3.000000 -system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 13551480 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.LD.hit_latency_hist::total 13551480 +system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 13550250 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.hit_latency_hist::total 13550250 system.ruby.LD.miss_latency_hist::bucket_size 16 system.ruby.LD.miss_latency_hist::max_bucket 159 -system.ruby.LD.miss_latency_hist::samples 1387071 -system.ruby.LD.miss_latency_hist::mean 21.812251 -system.ruby.LD.miss_latency_hist::gmean 20.706039 -system.ruby.LD.miss_latency_hist::stdev 11.881658 -system.ruby.LD.miss_latency_hist | 0 0.00% 0.00% | 1355950 97.76% 97.76% | 110 0.01% 97.76% | 0 0.00% 97.76% | 9645 0.70% 98.46% | 172 0.01% 98.47% | 20174 1.45% 99.93% | 799 0.06% 99.98% | 192 0.01% 100.00% | 29 0.00% 100.00% -system.ruby.LD.miss_latency_hist::total 1387071 +system.ruby.LD.miss_latency_hist::samples 1387063 +system.ruby.LD.miss_latency_hist::mean 21.811342 +system.ruby.LD.miss_latency_hist::gmean 20.705599 +system.ruby.LD.miss_latency_hist::stdev 11.877845 +system.ruby.LD.miss_latency_hist | 0 0.00% 0.00% | 1355967 97.76% 97.76% | 85 0.01% 97.76% | 0 0.00% 97.76% | 9654 0.70% 98.46% | 173 0.01% 98.47% | 20215 1.46% 99.93% | 758 0.05% 99.98% | 186 0.01% 100.00% | 25 0.00% 100.00% +system.ruby.LD.miss_latency_hist::total 1387063 system.ruby.ST.latency_hist::bucket_size 32 system.ruby.ST.latency_hist::max_bucket 319 -system.ruby.ST.latency_hist::samples 9501513 -system.ruby.ST.latency_hist::mean 4.608297 -system.ruby.ST.latency_hist::gmean 3.286796 -system.ruby.ST.latency_hist::stdev 10.645241 -system.ruby.ST.latency_hist | 9375847 98.68% 98.68% | 22 0.00% 98.68% | 64166 0.68% 99.35% | 60838 0.64% 99.99% | 636 0.01% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.latency_hist::total 9501513 +system.ruby.ST.latency_hist::samples 9501279 +system.ruby.ST.latency_hist::mean 4.608129 +system.ruby.ST.latency_hist::gmean 3.286792 +system.ruby.ST.latency_hist::stdev 10.643686 +system.ruby.ST.latency_hist | 9375615 98.68% 98.68% | 20 0.00% 98.68% | 64184 0.68% 99.35% | 60844 0.64% 99.99% | 614 0.01% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.latency_hist::total 9501279 system.ruby.ST.hit_latency_hist::bucket_size 1 system.ruby.ST.hit_latency_hist::max_bucket 9 -system.ruby.ST.hit_latency_hist::samples 9151298 +system.ruby.ST.hit_latency_hist::samples 9151065 system.ruby.ST.hit_latency_hist::mean 3 system.ruby.ST.hit_latency_hist::gmean 3.000000 -system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 9151298 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.hit_latency_hist::total 9151298 +system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 9151065 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.hit_latency_hist::total 9151065 system.ruby.ST.miss_latency_hist::bucket_size 32 system.ruby.ST.miss_latency_hist::max_bucket 319 -system.ruby.ST.miss_latency_hist::samples 350215 -system.ruby.ST.miss_latency_hist::mean 46.633933 -system.ruby.ST.miss_latency_hist::gmean 35.718031 -system.ruby.ST.miss_latency_hist::stdev 35.223868 -system.ruby.ST.miss_latency_hist | 224549 64.12% 64.12% | 22 0.01% 64.12% | 64166 18.32% 82.45% | 60838 17.37% 99.82% | 636 0.18% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.ST.miss_latency_hist::total 350215 +system.ruby.ST.miss_latency_hist::samples 350214 +system.ruby.ST.miss_latency_hist::mean 46.628404 +system.ruby.ST.miss_latency_hist::gmean 35.714857 +system.ruby.ST.miss_latency_hist::stdev 35.216783 +system.ruby.ST.miss_latency_hist | 224550 64.12% 64.12% | 20 0.01% 64.12% | 64184 18.33% 82.45% | 60844 17.37% 99.82% | 614 0.18% 100.00% | 2 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.miss_latency_hist::total 350214 system.ruby.IFETCH.latency_hist::bucket_size 16 system.ruby.IFETCH.latency_hist::max_bucket 159 -system.ruby.IFETCH.latency_hist::samples 126638834 -system.ruby.IFETCH.latency_hist::mean 3.112928 -system.ruby.IFETCH.latency_hist::gmean 3.036561 -system.ruby.IFETCH.latency_hist::stdev 1.654509 -system.ruby.IFETCH.latency_hist | 125821437 99.35% 99.35% | 801961 0.63% 99.99% | 5 0.00% 99.99% | 0 0.00% 99.99% | 3920 0.00% 99.99% | 23 0.00% 99.99% | 11193 0.01% 100.00% | 179 0.00% 100.00% | 116 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.latency_hist::total 126638834 +system.ruby.IFETCH.latency_hist::samples 126633666 +system.ruby.IFETCH.latency_hist::mean 3.112947 +system.ruby.IFETCH.latency_hist::gmean 3.036567 +system.ruby.IFETCH.latency_hist::stdev 1.654702 +system.ruby.IFETCH.latency_hist | 125816178 99.35% 99.35% | 802052 0.63% 99.99% | 5 0.00% 99.99% | 0 0.00% 99.99% | 3918 0.00% 99.99% | 22 0.00% 99.99% | 11172 0.01% 100.00% | 208 0.00% 100.00% | 111 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.latency_hist::total 126633666 system.ruby.IFETCH.hit_latency_hist::bucket_size 1 system.ruby.IFETCH.hit_latency_hist::max_bucket 9 -system.ruby.IFETCH.hit_latency_hist::samples 125821437 +system.ruby.IFETCH.hit_latency_hist::samples 125816178 system.ruby.IFETCH.hit_latency_hist::mean 3 system.ruby.IFETCH.hit_latency_hist::gmean 3.000000 -system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 125821437 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.hit_latency_hist::total 125821437 +system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 125816178 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.hit_latency_hist::total 125816178 system.ruby.IFETCH.miss_latency_hist::bucket_size 16 system.ruby.IFETCH.miss_latency_hist::max_bucket 159 -system.ruby.IFETCH.miss_latency_hist::samples 817397 -system.ruby.IFETCH.miss_latency_hist::mean 20.495847 -system.ruby.IFETCH.miss_latency_hist::gmean 19.596119 -system.ruby.IFETCH.miss_latency_hist::stdev 10.953317 -system.ruby.IFETCH.miss_latency_hist | 0 0.00% 0.00% | 801961 98.11% 98.11% | 5 0.00% 98.11% | 0 0.00% 98.11% | 3920 0.48% 98.59% | 23 0.00% 98.59% | 11193 1.37% 99.96% | 179 0.02% 99.99% | 116 0.01% 100.00% | 0 0.00% 100.00% -system.ruby.IFETCH.miss_latency_hist::total 817397 +system.ruby.IFETCH.miss_latency_hist::samples 817488 +system.ruby.IFETCH.miss_latency_hist::mean 20.496144 +system.ruby.IFETCH.miss_latency_hist::gmean 19.596306 +system.ruby.IFETCH.miss_latency_hist::stdev 10.954425 +system.ruby.IFETCH.miss_latency_hist | 0 0.00% 0.00% | 802052 98.11% 98.11% | 5 0.00% 98.11% | 0 0.00% 98.11% | 3918 0.48% 98.59% | 22 0.00% 98.59% | 11172 1.37% 99.96% | 208 0.03% 99.99% | 111 0.01% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.miss_latency_hist::total 817488 system.ruby.RMW_Read.latency_hist::bucket_size 16 system.ruby.RMW_Read.latency_hist::max_bucket 159 -system.ruby.RMW_Read.latency_hist::samples 494972 -system.ruby.RMW_Read.latency_hist::mean 5.895354 -system.ruby.RMW_Read.latency_hist::gmean 3.951188 -system.ruby.RMW_Read.latency_hist::stdev 8.211091 -system.ruby.RMW_Read.latency_hist | 429307 86.73% 86.73% | 64259 12.98% 99.72% | 8 0.00% 99.72% | 0 0.00% 99.72% | 988 0.20% 99.92% | 20 0.00% 99.92% | 359 0.07% 99.99% | 26 0.01% 100.00% | 5 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.RMW_Read.latency_hist::total 494972 +system.ruby.RMW_Read.latency_hist::samples 494951 +system.ruby.RMW_Read.latency_hist::mean 5.895220 +system.ruby.RMW_Read.latency_hist::gmean 3.951159 +system.ruby.RMW_Read.latency_hist::stdev 8.211294 +system.ruby.RMW_Read.latency_hist | 429288 86.73% 86.73% | 64260 12.98% 99.72% | 3 0.00% 99.72% | 0 0.00% 99.72% | 989 0.20% 99.92% | 21 0.00% 99.92% | 364 0.07% 99.99% | 22 0.00% 100.00% | 3 0.00% 100.00% | 1 0.00% 100.00% +system.ruby.RMW_Read.latency_hist::total 494951 system.ruby.RMW_Read.hit_latency_hist::bucket_size 1 system.ruby.RMW_Read.hit_latency_hist::max_bucket 9 -system.ruby.RMW_Read.hit_latency_hist::samples 429307 +system.ruby.RMW_Read.hit_latency_hist::samples 429288 system.ruby.RMW_Read.hit_latency_hist::mean 3 system.ruby.RMW_Read.hit_latency_hist::gmean 3.000000 -system.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 429307 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.RMW_Read.hit_latency_hist::total 429307 +system.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 429288 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.RMW_Read.hit_latency_hist::total 429288 system.ruby.RMW_Read.miss_latency_hist::bucket_size 16 system.ruby.RMW_Read.miss_latency_hist::max_bucket 159 -system.ruby.RMW_Read.miss_latency_hist::samples 65665 -system.ruby.RMW_Read.miss_latency_hist::mean 24.824701 -system.ruby.RMW_Read.miss_latency_hist::gmean 23.916335 -system.ruby.RMW_Read.miss_latency_hist::stdev 9.751364 -system.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 64259 97.86% 97.86% | 8 0.01% 97.87% | 0 0.00% 97.87% | 988 1.50% 99.38% | 20 0.03% 99.41% | 359 0.55% 99.95% | 26 0.04% 99.99% | 5 0.01% 100.00% | 0 0.00% 100.00% -system.ruby.RMW_Read.miss_latency_hist::total 65665 +system.ruby.RMW_Read.miss_latency_hist::samples 65663 +system.ruby.RMW_Read.miss_latency_hist::mean 24.823432 +system.ruby.RMW_Read.miss_latency_hist::gmean 23.914448 +system.ruby.RMW_Read.miss_latency_hist::stdev 9.754848 +system.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 64260 97.86% 97.86% | 3 0.00% 97.87% | 0 0.00% 97.87% | 989 1.51% 99.37% | 21 0.03% 99.41% | 364 0.55% 99.96% | 22 0.03% 99.99% | 3 0.00% 100.00% | 1 0.00% 100.00% +system.ruby.RMW_Read.miss_latency_hist::total 65663 system.ruby.Locked_RMW_Read.latency_hist::bucket_size 16 system.ruby.Locked_RMW_Read.latency_hist::max_bucket 159 -system.ruby.Locked_RMW_Read.latency_hist::samples 339641 -system.ruby.Locked_RMW_Read.latency_hist::mean 5.237030 -system.ruby.Locked_RMW_Read.latency_hist::gmean 3.762043 -system.ruby.Locked_RMW_Read.latency_hist::stdev 6.719404 -system.ruby.Locked_RMW_Read.latency_hist | 301301 88.71% 88.71% | 38004 11.19% 99.90% | 11 0.00% 99.90% | 0 0.00% 99.90% | 174 0.05% 99.96% | 4 0.00% 99.96% | 138 0.04% 100.00% | 6 0.00% 100.00% | 3 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Read.latency_hist::total 339641 +system.ruby.Locked_RMW_Read.latency_hist::samples 339622 +system.ruby.Locked_RMW_Read.latency_hist::mean 5.235927 +system.ruby.Locked_RMW_Read.latency_hist::gmean 3.761812 +system.ruby.Locked_RMW_Read.latency_hist::stdev 6.715360 +system.ruby.Locked_RMW_Read.latency_hist | 301290 88.71% 88.71% | 38000 11.19% 99.90% | 7 0.00% 99.90% | 0 0.00% 99.90% | 176 0.05% 99.96% | 2 0.00% 99.96% | 134 0.04% 100.00% | 12 0.00% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Read.latency_hist::total 339622 system.ruby.Locked_RMW_Read.hit_latency_hist::bucket_size 1 system.ruby.Locked_RMW_Read.hit_latency_hist::max_bucket 9 -system.ruby.Locked_RMW_Read.hit_latency_hist::samples 301301 +system.ruby.Locked_RMW_Read.hit_latency_hist::samples 301290 system.ruby.Locked_RMW_Read.hit_latency_hist::mean 3 system.ruby.Locked_RMW_Read.hit_latency_hist::gmean 3.000000 -system.ruby.Locked_RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 301301 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Read.hit_latency_hist::total 301301 +system.ruby.Locked_RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 301290 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Read.hit_latency_hist::total 301290 system.ruby.Locked_RMW_Read.miss_latency_hist::bucket_size 16 system.ruby.Locked_RMW_Read.miss_latency_hist::max_bucket 159 -system.ruby.Locked_RMW_Read.miss_latency_hist::samples 38340 -system.ruby.Locked_RMW_Read.miss_latency_hist::mean 22.817084 -system.ruby.Locked_RMW_Read.miss_latency_hist::gmean 22.281764 -system.ruby.Locked_RMW_Read.miss_latency_hist::stdev 7.182388 -system.ruby.Locked_RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 38004 99.12% 99.12% | 11 0.03% 99.15% | 0 0.00% 99.15% | 174 0.45% 99.61% | 4 0.01% 99.62% | 138 0.36% 99.98% | 6 0.02% 99.99% | 3 0.01% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Read.miss_latency_hist::total 38340 +system.ruby.Locked_RMW_Read.miss_latency_hist::samples 38332 +system.ruby.Locked_RMW_Read.miss_latency_hist::mean 22.810341 +system.ruby.Locked_RMW_Read.miss_latency_hist::gmean 22.276488 +system.ruby.Locked_RMW_Read.miss_latency_hist::stdev 7.169146 +system.ruby.Locked_RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 38000 99.13% 99.13% | 7 0.02% 99.15% | 0 0.00% 99.15% | 176 0.46% 99.61% | 2 0.01% 99.62% | 134 0.35% 99.97% | 12 0.03% 100.00% | 1 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Read.miss_latency_hist::total 38332 system.ruby.Locked_RMW_Write.latency_hist::bucket_size 1 system.ruby.Locked_RMW_Write.latency_hist::max_bucket 9 -system.ruby.Locked_RMW_Write.latency_hist::samples 339641 +system.ruby.Locked_RMW_Write.latency_hist::samples 339622 system.ruby.Locked_RMW_Write.latency_hist::mean 3 system.ruby.Locked_RMW_Write.latency_hist::gmean 3.000000 -system.ruby.Locked_RMW_Write.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339641 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Write.latency_hist::total 339641 +system.ruby.Locked_RMW_Write.latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339622 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Write.latency_hist::total 339622 system.ruby.Locked_RMW_Write.hit_latency_hist::bucket_size 1 system.ruby.Locked_RMW_Write.hit_latency_hist::max_bucket 9 -system.ruby.Locked_RMW_Write.hit_latency_hist::samples 339641 +system.ruby.Locked_RMW_Write.hit_latency_hist::samples 339622 system.ruby.Locked_RMW_Write.hit_latency_hist::mean 3 system.ruby.Locked_RMW_Write.hit_latency_hist::gmean 3.000000 -system.ruby.Locked_RMW_Write.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339641 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% -system.ruby.Locked_RMW_Write.hit_latency_hist::total 339641 -system.ruby.L1Cache_Controller.Load | 6584073 44.07% 44.07% | 8354478 55.93% 100.00% -system.ruby.L1Cache_Controller.Load::total 14938551 -system.ruby.L1Cache_Controller.Ifetch | 70408272 55.60% 55.60% | 56230567 44.40% 100.00% -system.ruby.L1Cache_Controller.Ifetch::total 126638839 -system.ruby.L1Cache_Controller.Store | 5552032 52.01% 52.01% | 5123735 47.99% 100.00% -system.ruby.L1Cache_Controller.Store::total 10675767 -system.ruby.L1Cache_Controller.Inv | 16306 50.03% 50.03% | 16286 49.97% 100.00% -system.ruby.L1Cache_Controller.Inv::total 32592 -system.ruby.L1Cache_Controller.L1_Replacement | 902872 34.67% 34.67% | 1701108 65.33% 100.00% -system.ruby.L1Cache_Controller.L1_Replacement::total 2603980 -system.ruby.L1Cache_Controller.Fwd_GETX | 12078 51.02% 51.02% | 11595 48.98% 100.00% -system.ruby.L1Cache_Controller.Fwd_GETX::total 23673 -system.ruby.L1Cache_Controller.Fwd_GETS | 14163 56.36% 56.36% | 10966 43.64% 100.00% -system.ruby.L1Cache_Controller.Fwd_GETS::total 25129 +system.ruby.Locked_RMW_Write.hit_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 339622 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Locked_RMW_Write.hit_latency_hist::total 339622 +system.ruby.L1Cache_Controller.Load | 6583252 44.07% 44.07% | 8354061 55.93% 100.00% +system.ruby.L1Cache_Controller.Load::total 14937313 +system.ruby.L1Cache_Controller.Ifetch | 70404850 55.60% 55.60% | 56228821 44.40% 100.00% +system.ruby.L1Cache_Controller.Ifetch::total 126633671 +system.ruby.L1Cache_Controller.Store | 5551807 52.01% 52.01% | 5123667 47.99% 100.00% +system.ruby.L1Cache_Controller.Store::total 10675474 +system.ruby.L1Cache_Controller.Inv | 16305 50.06% 50.06% | 16265 49.94% 100.00% +system.ruby.L1Cache_Controller.Inv::total 32570 +system.ruby.L1Cache_Controller.L1_Replacement | 902922 34.67% 34.67% | 1701187 65.33% 100.00% +system.ruby.L1Cache_Controller.L1_Replacement::total 2604109 +system.ruby.L1Cache_Controller.Fwd_GETX | 12075 51.03% 51.03% | 11588 48.97% 100.00% +system.ruby.L1Cache_Controller.Fwd_GETX::total 23663 +system.ruby.L1Cache_Controller.Fwd_GETS | 14138 56.31% 56.31% | 10969 43.69% 100.00% +system.ruby.L1Cache_Controller.Fwd_GETS::total 25107 system.ruby.L1Cache_Controller.Fwd_GET_INSTR | 4 100.00% 100.00% | 0 0.00% 100.00% system.ruby.L1Cache_Controller.Fwd_GET_INSTR::total 4 -system.ruby.L1Cache_Controller.Data | 779 45.93% 45.93% | 917 54.07% 100.00% -system.ruby.L1Cache_Controller.Data::total 1696 -system.ruby.L1Cache_Controller.Data_Exclusive | 274579 21.48% 21.48% | 1003754 78.52% 100.00% -system.ruby.L1Cache_Controller.Data_Exclusive::total 1278333 -system.ruby.L1Cache_Controller.DataS_fromL1 | 10966 43.63% 43.63% | 14167 56.37% 100.00% -system.ruby.L1Cache_Controller.DataS_fromL1::total 25133 -system.ruby.L1Cache_Controller.Data_all_Acks | 631790 47.45% 47.45% | 699592 52.55% 100.00% -system.ruby.L1Cache_Controller.Data_all_Acks::total 1331382 -system.ruby.L1Cache_Controller.Ack | 12231 55.23% 55.23% | 9913 44.77% 100.00% -system.ruby.L1Cache_Controller.Ack::total 22144 -system.ruby.L1Cache_Controller.Ack_all | 13010 54.57% 54.57% | 10830 45.43% 100.00% -system.ruby.L1Cache_Controller.Ack_all::total 23840 -system.ruby.L1Cache_Controller.WB_Ack | 504169 29.96% 29.96% | 1178574 70.04% 100.00% -system.ruby.L1Cache_Controller.WB_Ack::total 1682743 -system.ruby.L1Cache_Controller.NP.Load | 306633 22.41% 22.41% | 1061529 77.59% 100.00% -system.ruby.L1Cache_Controller.NP.Load::total 1368162 -system.ruby.L1Cache_Controller.NP.Ifetch | 358703 43.90% 43.90% | 458427 56.10% 100.00% -system.ruby.L1Cache_Controller.NP.Ifetch::total 817130 -system.ruby.L1Cache_Controller.NP.Store | 238560 56.70% 56.70% | 182176 43.30% 100.00% -system.ruby.L1Cache_Controller.NP.Store::total 420736 -system.ruby.L1Cache_Controller.NP.Inv | 5463 60.97% 60.97% | 3497 39.03% 100.00% -system.ruby.L1Cache_Controller.NP.Inv::total 8960 -system.ruby.L1Cache_Controller.I.Load | 8460 44.74% 44.74% | 10449 55.26% 100.00% -system.ruby.L1Cache_Controller.I.Load::total 18909 +system.ruby.L1Cache_Controller.Data | 776 45.81% 45.81% | 918 54.19% 100.00% +system.ruby.L1Cache_Controller.Data::total 1694 +system.ruby.L1Cache_Controller.Data_Exclusive | 274584 21.48% 21.48% | 1003769 78.52% 100.00% +system.ruby.L1Cache_Controller.Data_Exclusive::total 1278353 +system.ruby.L1Cache_Controller.DataS_fromL1 | 10969 43.68% 43.68% | 14142 56.32% 100.00% +system.ruby.L1Cache_Controller.DataS_fromL1::total 25111 +system.ruby.L1Cache_Controller.Data_all_Acks | 631829 47.45% 47.45% | 699649 52.55% 100.00% +system.ruby.L1Cache_Controller.Data_all_Acks::total 1331478 +system.ruby.L1Cache_Controller.Ack | 12213 55.20% 55.20% | 9911 44.80% 100.00% +system.ruby.L1Cache_Controller.Ack::total 22124 +system.ruby.L1Cache_Controller.Ack_all | 12989 54.53% 54.53% | 10829 45.47% 100.00% +system.ruby.L1Cache_Controller.Ack_all::total 23818 +system.ruby.L1Cache_Controller.WB_Ack | 504183 29.96% 29.96% | 1178601 70.04% 100.00% +system.ruby.L1Cache_Controller.WB_Ack::total 1682784 +system.ruby.L1Cache_Controller.NP.Load | 306639 22.41% 22.41% | 1061542 77.59% 100.00% +system.ruby.L1Cache_Controller.NP.Load::total 1368181 +system.ruby.L1Cache_Controller.NP.Ifetch | 358742 43.90% 43.90% | 458479 56.10% 100.00% +system.ruby.L1Cache_Controller.NP.Ifetch::total 817221 +system.ruby.L1Cache_Controller.NP.Store | 238565 56.70% 56.70% | 182190 43.30% 100.00% +system.ruby.L1Cache_Controller.NP.Store::total 420755 +system.ruby.L1Cache_Controller.NP.Inv | 5465 60.99% 60.99% | 3496 39.01% 100.00% +system.ruby.L1Cache_Controller.NP.Inv::total 8961 +system.ruby.L1Cache_Controller.I.Load | 8460 44.80% 44.80% | 10422 55.20% 100.00% +system.ruby.L1Cache_Controller.I.Load::total 18882 system.ruby.L1Cache_Controller.I.Ifetch | 106 39.70% 39.70% | 161 60.30% 100.00% system.ruby.L1Cache_Controller.I.Ifetch::total 267 -system.ruby.L1Cache_Controller.I.Store | 5652 49.84% 49.84% | 5688 50.16% 100.00% -system.ruby.L1Cache_Controller.I.Store::total 11340 -system.ruby.L1Cache_Controller.I.L1_Replacement | 8703 52.17% 52.17% | 7980 47.83% 100.00% -system.ruby.L1Cache_Controller.I.L1_Replacement::total 16683 -system.ruby.L1Cache_Controller.S.Load | 576678 53.66% 53.66% | 497974 46.34% 100.00% -system.ruby.L1Cache_Controller.S.Load::total 1074652 -system.ruby.L1Cache_Controller.S.Ifetch | 70049459 55.67% 55.67% | 55771978 44.33% 100.00% -system.ruby.L1Cache_Controller.S.Ifetch::total 125821437 -system.ruby.L1Cache_Controller.S.Store | 12231 55.23% 55.23% | 9913 44.77% 100.00% -system.ruby.L1Cache_Controller.S.Store::total 22144 -system.ruby.L1Cache_Controller.S.Inv | 10716 46.02% 46.02% | 12567 53.98% 100.00% -system.ruby.L1Cache_Controller.S.Inv::total 23283 -system.ruby.L1Cache_Controller.S.L1_Replacement | 390000 43.12% 43.12% | 514554 56.88% 100.00% -system.ruby.L1Cache_Controller.S.L1_Replacement::total 904554 -system.ruby.L1Cache_Controller.E.Load | 1291164 33.50% 33.50% | 2563076 66.50% 100.00% -system.ruby.L1Cache_Controller.E.Load::total 3854240 -system.ruby.L1Cache_Controller.E.Store | 85252 51.15% 51.15% | 81434 48.85% 100.00% -system.ruby.L1Cache_Controller.E.Store::total 166686 +system.ruby.L1Cache_Controller.I.Store | 5646 49.83% 49.83% | 5684 50.17% 100.00% +system.ruby.L1Cache_Controller.I.Store::total 11330 +system.ruby.L1Cache_Controller.I.L1_Replacement | 8703 52.15% 52.15% | 7984 47.85% 100.00% +system.ruby.L1Cache_Controller.I.L1_Replacement::total 16687 +system.ruby.L1Cache_Controller.S.Load | 576531 53.67% 53.67% | 497753 46.33% 100.00% +system.ruby.L1Cache_Controller.S.Load::total 1074284 +system.ruby.L1Cache_Controller.S.Ifetch | 70045998 55.67% 55.67% | 55770180 44.33% 100.00% +system.ruby.L1Cache_Controller.S.Ifetch::total 125816178 +system.ruby.L1Cache_Controller.S.Store | 12213 55.20% 55.20% | 9911 44.80% 100.00% +system.ruby.L1Cache_Controller.S.Store::total 22124 +system.ruby.L1Cache_Controller.S.Inv | 10713 46.06% 46.06% | 12547 53.94% 100.00% +system.ruby.L1Cache_Controller.S.Inv::total 23260 +system.ruby.L1Cache_Controller.S.L1_Replacement | 390036 43.12% 43.12% | 514602 56.88% 100.00% +system.ruby.L1Cache_Controller.S.L1_Replacement::total 904638 +system.ruby.L1Cache_Controller.E.Load | 1291134 33.50% 33.50% | 2563123 66.50% 100.00% +system.ruby.L1Cache_Controller.E.Load::total 3854257 +system.ruby.L1Cache_Controller.E.Store | 85252 51.14% 51.14% | 81438 48.86% 100.00% +system.ruby.L1Cache_Controller.E.Store::total 166690 system.ruby.L1Cache_Controller.E.Inv | 54 73.97% 73.97% | 19 26.03% 100.00% system.ruby.L1Cache_Controller.E.Inv::total 73 -system.ruby.L1Cache_Controller.E.L1_Replacement | 187843 16.94% 16.94% | 921073 83.06% 100.00% -system.ruby.L1Cache_Controller.E.L1_Replacement::total 1108916 -system.ruby.L1Cache_Controller.E.Fwd_GETX | 212 75.18% 75.18% | 70 24.82% 100.00% -system.ruby.L1Cache_Controller.E.Fwd_GETX::total 282 -system.ruby.L1Cache_Controller.E.Fwd_GETS | 1012 47.62% 47.62% | 1113 52.38% 100.00% -system.ruby.L1Cache_Controller.E.Fwd_GETS::total 2125 -system.ruby.L1Cache_Controller.M.Load | 4401138 51.04% 51.04% | 4221450 48.96% 100.00% -system.ruby.L1Cache_Controller.M.Load::total 8622588 -system.ruby.L1Cache_Controller.M.Store | 5210337 51.82% 51.82% | 4844524 48.18% 100.00% -system.ruby.L1Cache_Controller.M.Store::total 10054861 +system.ruby.L1Cache_Controller.E.L1_Replacement | 187850 16.94% 16.94% | 921082 83.06% 100.00% +system.ruby.L1Cache_Controller.E.L1_Replacement::total 1108932 +system.ruby.L1Cache_Controller.E.Fwd_GETX | 211 75.09% 75.09% | 70 24.91% 100.00% +system.ruby.L1Cache_Controller.E.Fwd_GETX::total 281 +system.ruby.L1Cache_Controller.E.Fwd_GETS | 1011 47.55% 47.55% | 1115 52.45% 100.00% +system.ruby.L1Cache_Controller.E.Fwd_GETS::total 2126 +system.ruby.L1Cache_Controller.M.Load | 4400488 51.04% 51.04% | 4221221 48.96% 100.00% +system.ruby.L1Cache_Controller.M.Load::total 8621709 +system.ruby.L1Cache_Controller.M.Store | 5210131 51.82% 51.82% | 4844444 48.18% 100.00% +system.ruby.L1Cache_Controller.M.Store::total 10054575 system.ruby.L1Cache_Controller.M.Inv | 73 26.45% 26.45% | 203 73.55% 100.00% system.ruby.L1Cache_Controller.M.Inv::total 276 -system.ruby.L1Cache_Controller.M.L1_Replacement | 316326 55.13% 55.13% | 257501 44.87% 100.00% -system.ruby.L1Cache_Controller.M.L1_Replacement::total 573827 -system.ruby.L1Cache_Controller.M.Fwd_GETX | 11866 50.73% 50.73% | 11525 49.27% 100.00% -system.ruby.L1Cache_Controller.M.Fwd_GETX::total 23391 -system.ruby.L1Cache_Controller.M.Fwd_GETS | 13151 57.17% 57.17% | 9853 42.83% 100.00% -system.ruby.L1Cache_Controller.M.Fwd_GETS::total 23004 +system.ruby.L1Cache_Controller.M.L1_Replacement | 316333 55.12% 55.12% | 257519 44.88% 100.00% +system.ruby.L1Cache_Controller.M.L1_Replacement::total 573852 +system.ruby.L1Cache_Controller.M.Fwd_GETX | 11864 50.74% 50.74% | 11518 49.26% 100.00% +system.ruby.L1Cache_Controller.M.Fwd_GETX::total 23382 +system.ruby.L1Cache_Controller.M.Fwd_GETS | 13127 57.12% 57.12% | 9854 42.88% 100.00% +system.ruby.L1Cache_Controller.M.Fwd_GETS::total 22981 system.ruby.L1Cache_Controller.M.Fwd_GET_INSTR | 4 100.00% 100.00% | 0 0.00% 100.00% system.ruby.L1Cache_Controller.M.Fwd_GET_INSTR::total 4 -system.ruby.L1Cache_Controller.IS.Data_Exclusive | 274579 21.48% 21.48% | 1003754 78.52% 100.00% -system.ruby.L1Cache_Controller.IS.Data_Exclusive::total 1278333 -system.ruby.L1Cache_Controller.IS.DataS_fromL1 | 10966 43.63% 43.63% | 14167 56.37% 100.00% -system.ruby.L1Cache_Controller.IS.DataS_fromL1::total 25133 -system.ruby.L1Cache_Controller.IS.Data_all_Acks | 388357 43.10% 43.10% | 512645 56.90% 100.00% -system.ruby.L1Cache_Controller.IS.Data_all_Acks::total 901002 -system.ruby.L1Cache_Controller.IM.Data | 779 45.93% 45.93% | 917 54.07% 100.00% -system.ruby.L1Cache_Controller.IM.Data::total 1696 -system.ruby.L1Cache_Controller.IM.Data_all_Acks | 243433 56.56% 56.56% | 186947 43.44% 100.00% -system.ruby.L1Cache_Controller.IM.Data_all_Acks::total 430380 -system.ruby.L1Cache_Controller.SM.Ack | 12231 55.23% 55.23% | 9913 44.77% 100.00% -system.ruby.L1Cache_Controller.SM.Ack::total 22144 -system.ruby.L1Cache_Controller.SM.Ack_all | 13010 54.57% 54.57% | 10830 45.43% 100.00% -system.ruby.L1Cache_Controller.SM.Ack_all::total 23840 +system.ruby.L1Cache_Controller.IS.Data_Exclusive | 274584 21.48% 21.48% | 1003769 78.52% 100.00% +system.ruby.L1Cache_Controller.IS.Data_Exclusive::total 1278353 +system.ruby.L1Cache_Controller.IS.DataS_fromL1 | 10969 43.68% 43.68% | 14142 56.32% 100.00% +system.ruby.L1Cache_Controller.IS.DataS_fromL1::total 25111 +system.ruby.L1Cache_Controller.IS.Data_all_Acks | 388394 43.10% 43.10% | 512693 56.90% 100.00% +system.ruby.L1Cache_Controller.IS.Data_all_Acks::total 901087 +system.ruby.L1Cache_Controller.IM.Data | 776 45.81% 45.81% | 918 54.19% 100.00% +system.ruby.L1Cache_Controller.IM.Data::total 1694 +system.ruby.L1Cache_Controller.IM.Data_all_Acks | 243435 56.56% 56.56% | 186956 43.44% 100.00% +system.ruby.L1Cache_Controller.IM.Data_all_Acks::total 430391 +system.ruby.L1Cache_Controller.SM.Ack | 12213 55.20% 55.20% | 9911 44.80% 100.00% +system.ruby.L1Cache_Controller.SM.Ack::total 22124 +system.ruby.L1Cache_Controller.SM.Ack_all | 12989 54.53% 54.53% | 10829 45.47% 100.00% +system.ruby.L1Cache_Controller.SM.Ack_all::total 23818 system.ruby.L1Cache_Controller.M_I.Ifetch | 4 80.00% 80.00% | 1 20.00% 100.00% system.ruby.L1Cache_Controller.M_I.Ifetch::total 5 -system.ruby.L1Cache_Controller.M_I.WB_Ack | 504169 29.96% 29.96% | 1178574 70.04% 100.00% -system.ruby.L1Cache_Controller.M_I.WB_Ack::total 1682743 -system.ruby.L2Cache_Controller.L1_GET_INSTR 817397 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_GETS 1387278 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_GETX 432076 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_UPGRADE 22144 0.00% 0.00% -system.ruby.L2Cache_Controller.L1_PUTX 1682743 0.00% 0.00% -system.ruby.L2Cache_Controller.L2_Replacement 94885 0.00% 0.00% +system.ruby.L1Cache_Controller.M_I.WB_Ack | 504183 29.96% 29.96% | 1178601 70.04% 100.00% +system.ruby.L1Cache_Controller.M_I.WB_Ack::total 1682784 +system.ruby.L2Cache_Controller.L1_GET_INSTR 817488 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_GETS 1387273 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_GETX 432085 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_UPGRADE 22124 0.00% 0.00% +system.ruby.L2Cache_Controller.L1_PUTX 1682784 0.00% 0.00% +system.ruby.L2Cache_Controller.L2_Replacement 94886 0.00% 0.00% system.ruby.L2Cache_Controller.L2_Replacement_clean 12189 0.00% 0.00% -system.ruby.L2Cache_Controller.Mem_Data 173809 0.00% 0.00% -system.ruby.L2Cache_Controller.Mem_Ack 108921 0.00% 0.00% -system.ruby.L2Cache_Controller.WB_Data 23284 0.00% 0.00% -system.ruby.L2Cache_Controller.WB_Data_clean 2125 0.00% 0.00% +system.ruby.L2Cache_Controller.Mem_Data 173811 0.00% 0.00% +system.ruby.L2Cache_Controller.Mem_Ack 108923 0.00% 0.00% +system.ruby.L2Cache_Controller.WB_Data 23261 0.00% 0.00% +system.ruby.L2Cache_Controller.WB_Data_clean 2126 0.00% 0.00% system.ruby.L2Cache_Controller.Ack 1643 0.00% 0.00% system.ruby.L2Cache_Controller.Ack_all 6833 0.00% 0.00% -system.ruby.L2Cache_Controller.Unblock 25133 0.00% 0.00% -system.ruby.L2Cache_Controller.Exclusive_Unblock 1732553 0.00% 0.00% -system.ruby.L2Cache_Controller.MEM_Inv 3694 0.00% 0.00% +system.ruby.L2Cache_Controller.Unblock 25111 0.00% 0.00% +system.ruby.L2Cache_Controller.Exclusive_Unblock 1732562 0.00% 0.00% +system.ruby.L2Cache_Controller.MEM_Inv 3696 0.00% 0.00% system.ruby.L2Cache_Controller.NP.L1_GET_INSTR 15431 0.00% 0.00% system.ruby.L2Cache_Controller.NP.L1_GETS 31011 0.00% 0.00% -system.ruby.L2Cache_Controller.NP.L1_GETX 127367 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_GET_INSTR 801934 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_GETS 83609 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_GETX 1731 0.00% 0.00% -system.ruby.L2Cache_Controller.SS.L1_UPGRADE 22144 0.00% 0.00% +system.ruby.L2Cache_Controller.NP.L1_GETX 127369 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_GET_INSTR 802025 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_GETS 83603 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_GETX 1729 0.00% 0.00% +system.ruby.L2Cache_Controller.SS.L1_UPGRADE 22124 0.00% 0.00% system.ruby.L2Cache_Controller.SS.L2_Replacement 253 0.00% 0.00% system.ruby.L2Cache_Controller.SS.L2_Replacement_clean 6503 0.00% 0.00% system.ruby.L2Cache_Controller.SS.MEM_Inv 4 0.00% 0.00% system.ruby.L2Cache_Controller.M.L1_GET_INSTR 28 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L1_GETS 1247322 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L1_GETX 279305 0.00% 0.00% -system.ruby.L2Cache_Controller.M.L2_Replacement 94479 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L1_GETS 1247342 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L1_GETX 279324 0.00% 0.00% +system.ruby.L2Cache_Controller.M.L2_Replacement 94480 0.00% 0.00% system.ruby.L2Cache_Controller.M.L2_Replacement_clean 5571 0.00% 0.00% -system.ruby.L2Cache_Controller.M.MEM_Inv 1762 0.00% 0.00% +system.ruby.L2Cache_Controller.M.MEM_Inv 1763 0.00% 0.00% system.ruby.L2Cache_Controller.MT.L1_GET_INSTR 4 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L1_GETS 25129 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L1_GETX 23673 0.00% 0.00% -system.ruby.L2Cache_Controller.MT.L1_PUTX 1682743 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_GETS 25107 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_GETX 23663 0.00% 0.00% +system.ruby.L2Cache_Controller.MT.L1_PUTX 1682784 0.00% 0.00% system.ruby.L2Cache_Controller.MT.L2_Replacement 153 0.00% 0.00% system.ruby.L2Cache_Controller.MT.L2_Replacement_clean 115 0.00% 0.00% system.ruby.L2Cache_Controller.MT.MEM_Inv 81 0.00% 0.00% -system.ruby.L2Cache_Controller.M_I.Mem_Ack 108921 0.00% 0.00% -system.ruby.L2Cache_Controller.M_I.MEM_Inv 1762 0.00% 0.00% +system.ruby.L2Cache_Controller.M_I.Mem_Ack 108923 0.00% 0.00% +system.ruby.L2Cache_Controller.M_I.MEM_Inv 1763 0.00% 0.00% system.ruby.L2Cache_Controller.MT_I.WB_Data 187 0.00% 0.00% system.ruby.L2Cache_Controller.MT_I.Ack_all 47 0.00% 0.00% system.ruby.L2Cache_Controller.MT_I.MEM_Inv 81 0.00% 0.00% @@ -1157,16 +1157,14 @@ system.ruby.L2Cache_Controller.S_I.Ack_all 257 0.00% 0.00% system.ruby.L2Cache_Controller.S_I.MEM_Inv 4 0.00% 0.00% system.ruby.L2Cache_Controller.ISS.Mem_Data 31011 0.00% 0.00% system.ruby.L2Cache_Controller.IS.Mem_Data 15431 0.00% 0.00% -system.ruby.L2Cache_Controller.IM.Mem_Data 127367 0.00% 0.00% -system.ruby.L2Cache_Controller.SS_MB.L1_GETS 165 0.00% 0.00% -system.ruby.L2Cache_Controller.SS_MB.Exclusive_Unblock 23875 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_MB.L1_GETS 42 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_MB.Exclusive_Unblock 1708678 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IIB.WB_Data 23006 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IIB.WB_Data_clean 2125 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IIB.Unblock 2 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_IB.WB_Data 2 0.00% 0.00% -system.ruby.L2Cache_Controller.MT_SB.Unblock 25131 0.00% 0.00% +system.ruby.L2Cache_Controller.IM.Mem_Data 127369 0.00% 0.00% +system.ruby.L2Cache_Controller.SS_MB.L1_GETS 164 0.00% 0.00% +system.ruby.L2Cache_Controller.SS_MB.Exclusive_Unblock 23853 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_MB.L1_GETS 46 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_MB.Exclusive_Unblock 1708709 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IIB.WB_Data 22985 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_IIB.WB_Data_clean 2126 0.00% 0.00% +system.ruby.L2Cache_Controller.MT_SB.Unblock 25111 0.00% 0.00% system.ruby.DMA_Controller.ReadRequest 811 0.00% 0.00% system.ruby.DMA_Controller.WriteRequest 46736 0.00% 0.00% system.ruby.DMA_Controller.Data 811 0.00% 0.00% @@ -1175,27 +1173,27 @@ system.ruby.DMA_Controller.READY.ReadRequest 811 0.00% 0.00% system.ruby.DMA_Controller.READY.WriteRequest 46736 0.00% 0.00% system.ruby.DMA_Controller.BUSY_RD.Data 811 0.00% 0.00% system.ruby.DMA_Controller.BUSY_WR.Ack 46736 0.00% 0.00% -system.ruby.Directory_Controller.Fetch 173809 0.00% 0.00% -system.ruby.Directory_Controller.Data 96821 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Data 174269 0.00% 0.00% -system.ruby.Directory_Controller.Memory_Ack 142061 0.00% 0.00% +system.ruby.Directory_Controller.Fetch 173811 0.00% 0.00% +system.ruby.Directory_Controller.Data 96823 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Data 174271 0.00% 0.00% +system.ruby.Directory_Controller.Memory_Ack 142062 0.00% 0.00% system.ruby.Directory_Controller.DMA_READ 811 0.00% 0.00% system.ruby.Directory_Controller.DMA_WRITE 46736 0.00% 0.00% system.ruby.Directory_Controller.CleanReplacement 12100 0.00% 0.00% -system.ruby.Directory_Controller.I.Fetch 173809 0.00% 0.00% +system.ruby.Directory_Controller.I.Fetch 173811 0.00% 0.00% system.ruby.Directory_Controller.I.DMA_READ 460 0.00% 0.00% -system.ruby.Directory_Controller.I.DMA_WRITE 45240 0.00% 0.00% +system.ruby.Directory_Controller.I.DMA_WRITE 45239 0.00% 0.00% system.ruby.Directory_Controller.ID.Memory_Data 460 0.00% 0.00% -system.ruby.Directory_Controller.ID_W.Memory_Ack 45240 0.00% 0.00% -system.ruby.Directory_Controller.M.Data 94974 0.00% 0.00% +system.ruby.Directory_Controller.ID_W.Memory_Ack 45239 0.00% 0.00% +system.ruby.Directory_Controller.M.Data 94975 0.00% 0.00% system.ruby.Directory_Controller.M.DMA_READ 351 0.00% 0.00% -system.ruby.Directory_Controller.M.DMA_WRITE 1496 0.00% 0.00% +system.ruby.Directory_Controller.M.DMA_WRITE 1497 0.00% 0.00% system.ruby.Directory_Controller.M.CleanReplacement 12100 0.00% 0.00% -system.ruby.Directory_Controller.IM.Memory_Data 173809 0.00% 0.00% -system.ruby.Directory_Controller.MI.Memory_Ack 94974 0.00% 0.00% +system.ruby.Directory_Controller.IM.Memory_Data 173811 0.00% 0.00% +system.ruby.Directory_Controller.MI.Memory_Ack 94975 0.00% 0.00% system.ruby.Directory_Controller.M_DRD.Data 351 0.00% 0.00% system.ruby.Directory_Controller.M_DRDI.Memory_Ack 351 0.00% 0.00% -system.ruby.Directory_Controller.M_DWR.Data 1496 0.00% 0.00% -system.ruby.Directory_Controller.M_DWRI.Memory_Ack 1496 0.00% 0.00% +system.ruby.Directory_Controller.M_DWR.Data 1497 0.00% 0.00% +system.ruby.Directory_Controller.M_DWRI.Memory_Ack 1497 0.00% 0.00% ---------- End Simulation Statistics ---------- diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini index bf000969d..925d90ad5 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.ini @@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000 [system] type=LinuxX86System -children=acpi_description_table_pointer apicbridge bridge clk_domain cpu0 cpu1 cpu2 cpu_clk_domain e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus voltage_domain +children=acpi_description_table_pointer apicbridge bridge clk_domain cpu0 cpu1 cpu2 cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache l2c membus pc physmem smbios_table toL2Bus voltage_domain acpi_description_table_pointer=system.acpi_description_table_pointer boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1 cache_line_size=64 @@ -20,14 +20,15 @@ eventq_index=0 init_param=0 intel_mp_pointer=system.intel_mp_pointer intel_mp_table=system.intel_mp_table -kernel=/home/stever/m5/m5_system_2.0b3/binaries/x86_64-vmlinux-2.6.22.9 +kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9 +kernel_addr_check=true load_addr_mask=18446744073709551615 load_offset=0 mem_mode=atomic mem_ranges=0:134217727 memories=system.physmem num_work_ids=16 -readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh smbios_table=system.smbios_table symbolfile= work_begin_ckpt_count=0 @@ -83,7 +84,9 @@ slave=system.membus.master[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu0] @@ -769,9 +772,19 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.e820_table] type=X86E820Table children=entries0 entries1 entries2 entries3 @@ -1194,7 +1207,7 @@ type=NoncoherentBus clk_domain=system.clk_domain eventq_index=0 header_cycles=1 -use_default_range=true +use_default_range=false width=8 default=system.pc.pciconfig.pio master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side @@ -1597,7 +1610,7 @@ table_size=65536 [system.pc.south_bridge.ide.disks0.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-x86.img +image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img read_only=true [system.pc.south_bridge.ide.disks1] @@ -1620,7 +1633,7 @@ table_size=65536 [system.pc.south_bridge.ide.disks1.image.child] type=RawDiskImage eventq_index=0 -image_file=/home/stever/m5/m5_system_2.0b3/disks/linux-bigswap2.img +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img read_only=true [system.pc.south_bridge.int_lines0] diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json index 4aa2b2aae..b8b06f12b 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/config.json @@ -60,23 +60,7 @@ "forward_snoops": true, "size": 4194304 }, - "acpi_description_table_pointer": { - "name": "acpi_description_table_pointer", - "xsdt": { - "name": "xsdt", - "creator_revision": 0, - "eventq_index": 0, - "cxx_class": "X86ISA::ACPI::XSDT", - "path": "system.acpi_description_table_pointer.xsdt", - "oem_revision": 0, - "type": "X86ACPIXSDT" - }, - "eventq_index": 0, - "cxx_class": "X86ISA::ACPI::RSDP", - "path": "system.acpi_description_table_pointer", - "type": "X86ACPIRSDP", - "revision": 2 - }, + "kernel_addr_check": true, "membus": { "slave": { "peer": [ @@ -175,7 +159,7 @@ "cxx_class": "NoncoherentBus", "path": "system.iobus", "type": "NoncoherentBus", - "use_default_range": true + "use_default_range": false }, "physmem": [ { @@ -720,14 +704,39 @@ "cxx_class": "LinuxX86System", "load_offset": 0, "work_end_ckpt_count": 0, + "smbios_table": { + "name": "smbios_table", + "structures": [ + { + "major": 0, + "name": "structures", + "emb_cont_firmware_major": 0, + "rom_size": 0, + "starting_addr_segment": 0, + "emb_cont_firmware_minor": 0, + "eventq_index": 0, + "cxx_class": "X86ISA::SMBios::BiosInformation", + "path": "system.smbios_table.structures", + "type": "X86SMBiosBiosInformation", + "minor": 0 + } + ], + "major_version": 2, + "minor_version": 5, + "eventq_index": 0, + "cxx_class": "X86ISA::SMBios::SMBiosTable", + "path": "system.smbios_table", + "type": "X86SMBiosSMBiosTable" + }, "work_begin_ckpt_count": 0, "clk_domain": { "name": "clk_domain", - "clock": 1e-09, + "init_perf_level": 0, "eventq_index": 0, "cxx_class": "SrcClockDomain", "path": "system.clk_domain", - "type": "SrcClockDomain" + "type": "SrcClockDomain", + "domain_id": -1 }, "pc": { "fake_com_4": { @@ -1372,54 +1381,31 @@ "path": "system.e820_table", "type": "X86E820Table" }, - "smbios_table": { - "name": "smbios_table", - "structures": [ - { - "major": 0, - "name": "structures", - "emb_cont_firmware_major": 0, - "rom_size": 0, - "starting_addr_segment": 0, - "emb_cont_firmware_minor": 0, - "eventq_index": 0, - "cxx_class": "X86ISA::SMBios::BiosInformation", - "path": "system.smbios_table.structures", - "type": "X86SMBiosBiosInformation", - "minor": 0 - } - ], - "major_version": 2, - "minor_version": 5, + "acpi_description_table_pointer": { + "name": "acpi_description_table_pointer", + "xsdt": { + "name": "xsdt", + "creator_revision": 0, + "eventq_index": 0, + "cxx_class": "X86ISA::ACPI::XSDT", + "path": "system.acpi_description_table_pointer.xsdt", + "oem_revision": 0, + "type": "X86ACPIXSDT" + }, "eventq_index": 0, - "cxx_class": "X86ISA::SMBios::SMBiosTable", - "path": "system.smbios_table", - "type": "X86SMBiosSMBiosTable" + "cxx_class": "X86ISA::ACPI::RSDP", + "path": "system.acpi_description_table_pointer", + "type": "X86ACPIRSDP", + "revision": 2 }, - "toL2Bus": { - "slave": { - "peer": [ - "system.cpu0.icache.mem_side", - "system.cpu0.dcache.mem_side", - "system.cpu0.itb.walker.port", - "system.cpu0.dtb.walker.port" - ], - "role": "SLAVE" - }, - "name": "toL2Bus", - "header_cycles": 1, - "width": 8, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "transition_latency": 9.999999999999999e-05, "eventq_index": 0, - "master": { - "peer": [ - "system.l2c.cpu_side" - ], - "role": "MASTER" - }, - "cxx_class": "CoherentBus", - "path": "system.toL2Bus", - "type": "CoherentBus", - "use_default_range": false + "cxx_class": "DVFSHandler", + "path": "system.dvfs_handler", + "type": "DVFSHandler" }, "work_end_exit_count": 0, "type": "LinuxX86System", @@ -1446,11 +1432,37 @@ "path": "system", "cpu_clk_domain": { "name": "cpu_clk_domain", - "clock": 5e-10, + "init_perf_level": 0, "eventq_index": 0, "cxx_class": "SrcClockDomain", "path": "system.cpu_clk_domain", - "type": "SrcClockDomain" + "type": "SrcClockDomain", + "domain_id": -1 + }, + "toL2Bus": { + "slave": { + "peer": [ + "system.cpu0.icache.mem_side", + "system.cpu0.dcache.mem_side", + "system.cpu0.itb.walker.port", + "system.cpu0.dtb.walker.port" + ], + "role": "SLAVE" + }, + "name": "toL2Bus", + "header_cycles": 1, + "width": 8, + "eventq_index": 0, + "master": { + "peer": [ + "system.l2c.cpu_side" + ], + "role": "MASTER" + }, + "cxx_class": "CoherentBus", + "path": "system.toL2Bus", + "type": "CoherentBus", + "use_default_range": false }, "iocache": { "assoc": 8, diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini index 477b3f3c7..f59a11c09 100644 --- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini +++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini @@ -10,35 +10,36 @@ time_sync_spin_threshold=200000 [system] type=SparcSystem -children=bridge clk_domain cpu cpu_clk_domain disk0 hypervisor_desc intrctrl iobus membus nvram partition_desc physmem0 physmem1 rom t1000 voltage_domain +children=bridge clk_domain cpu cpu_clk_domain disk0 dvfs_handler hypervisor_desc intrctrl iobus membus nvram partition_desc physmem0 physmem1 rom t1000 voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 hypervisor_addr=1099243257856 -hypervisor_bin=/dist/m5/system/binaries/q_new.bin +hypervisor_bin=/scratch/nilay/GEM5/system/binaries/q_new.bin hypervisor_desc=system.hypervisor_desc hypervisor_desc_addr=133446500352 -hypervisor_desc_bin=/dist/m5/system/binaries/1up-hv.bin +hypervisor_desc_bin=/scratch/nilay/GEM5/system/binaries/1up-hv.bin init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic mem_ranges=1048576:68157439 2147483648:2415919103 -memories=system.nvram system.rom system.hypervisor_desc system.physmem0 system.physmem1 system.partition_desc +memories=system.partition_desc system.rom system.nvram system.physmem1 system.hypervisor_desc system.physmem0 num_work_ids=16 nvram=system.nvram nvram_addr=133429198848 -nvram_bin=/dist/m5/system/binaries/nvram1 +nvram_bin=/scratch/nilay/GEM5/system/binaries/nvram1 openboot_addr=1099243716608 -openboot_bin=/dist/m5/system/binaries/openboot_new.bin +openboot_bin=/scratch/nilay/GEM5/system/binaries/openboot_new.bin partition_desc=system.partition_desc partition_desc_addr=133445976064 -partition_desc_bin=/dist/m5/system/binaries/1up-md.bin -readfile=/z/stever/hg/gem5/tests/halt.sh +partition_desc_bin=/scratch/nilay/GEM5/system/binaries/1up-md.bin +readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh reset_addr=1099243192320 -reset_bin=/dist/m5/system/binaries/reset_new.bin +reset_bin=/scratch/nilay/GEM5/system/binaries/reset_new.bin rom=system.rom symbolfile= work_begin_ckpt_count=0 @@ -64,7 +65,9 @@ slave=system.membus.master[2] [system.clk_domain] type=SrcClockDomain clock=2 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -132,7 +135,9 @@ eventq_index=0 [system.cpu_clk_domain] type=SrcClockDomain clock=2 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.disk0] @@ -158,9 +163,17 @@ table_size=65536 [system.disk0.image.child] type=RawDiskImage eventq_index=0 -image_file=/dist/m5/system/disks/disk.s10hw2 +image_file=/scratch/nilay/GEM5/system/disks/disk.s10hw2 read_only=true +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=200000 + [system.hypervisor_desc] type=SimpleMemory bandwidth=0.000000 diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json index 5f0592320..e4d168593 100644 --- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json +++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json @@ -20,42 +20,7 @@ "resp_size": 16, "type": "Bridge" }, - "iobus": { - "slave": { - "peer": [ - "system.bridge.master" - ], - "role": "SLAVE" - }, - "name": "iobus", - "header_cycles": 1, - "width": 8, - "eventq_index": 0, - "master": { - "peer": [ - "system.t1000.fake_clk.pio", - "system.t1000.fake_membnks.pio", - "system.t1000.fake_l2_1.pio", - "system.t1000.fake_l2_2.pio", - "system.t1000.fake_l2_3.pio", - "system.t1000.fake_l2_4.pio", - "system.t1000.fake_l2esr_1.pio", - "system.t1000.fake_l2esr_2.pio", - "system.t1000.fake_l2esr_3.pio", - "system.t1000.fake_l2esr_4.pio", - "system.t1000.fake_ssi.pio", - "system.t1000.fake_jbi.pio", - "system.t1000.puart0.pio", - "system.t1000.hvuart.pio", - "system.disk0.pio" - ], - "role": "MASTER" - }, - "cxx_class": "NoncoherentBus", - "path": "system.iobus", - "type": "NoncoherentBus", - "use_default_range": false - }, + "kernel_addr_check": true, "rom": { "latency": 3.0000000000000004e-08, "name": "rom", @@ -129,6 +94,42 @@ "type": "CoherentBus", "use_default_range": false }, + "iobus": { + "slave": { + "peer": [ + "system.bridge.master" + ], + "role": "SLAVE" + }, + "name": "iobus", + "header_cycles": 1, + "width": 8, + "eventq_index": 0, + "master": { + "peer": [ + "system.t1000.fake_clk.pio", + "system.t1000.fake_membnks.pio", + "system.t1000.fake_l2_1.pio", + "system.t1000.fake_l2_2.pio", + "system.t1000.fake_l2_3.pio", + "system.t1000.fake_l2_4.pio", + "system.t1000.fake_l2esr_1.pio", + "system.t1000.fake_l2esr_2.pio", + "system.t1000.fake_l2esr_3.pio", + "system.t1000.fake_l2esr_4.pio", + "system.t1000.fake_ssi.pio", + "system.t1000.fake_jbi.pio", + "system.t1000.puart0.pio", + "system.t1000.hvuart.pio", + "system.disk0.pio" + ], + "role": "MASTER" + }, + "cxx_class": "NoncoherentBus", + "path": "system.iobus", + "type": "NoncoherentBus", + "use_default_range": false + }, "t1000": { "htod": { "name": "htod", @@ -520,11 +521,12 @@ }, "clk_domain": { "name": "clk_domain", - "clock": 1e-09, + "init_perf_level": 0, "eventq_index": 0, "cxx_class": "SrcClockDomain", "path": "system.clk_domain", - "type": "SrcClockDomain" + "type": "SrcClockDomain", + "domain_id": -1 }, "hypervisor_desc": { "latency": 3.0000000000000004e-08, @@ -559,6 +561,15 @@ "in_addr_map": true }, "eventq_index": 0, + "dvfs_handler": { + "enable": false, + "name": "dvfs_handler", + "transition_latency": 9.999999999999999e-05, + "eventq_index": 0, + "cxx_class": "DVFSHandler", + "path": "system.dvfs_handler", + "type": "DVFSHandler" + }, "work_end_exit_count": 0, "type": "SparcSystem", "voltage_domain": { @@ -575,11 +586,12 @@ "path": "system", "cpu_clk_domain": { "name": "cpu_clk_domain", - "clock": 1e-09, + "init_perf_level": 0, "eventq_index": 0, "cxx_class": "SrcClockDomain", "path": "system.cpu_clk_domain", - "type": "SrcClockDomain" + "type": "SrcClockDomain", + "domain_id": -1 }, "mem_mode": "atomic", "name": "system", diff --git a/tests/long/se/10.mcf/ref/arm/linux/minor-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/minor-timing/config.ini index e291e1e5a..68be94d23 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/10.mcf/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,9 +753,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf gid=100 -input=/arm/projectscratch/pd/sysrandd/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini index 239f60df1..4a5a11c6e 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,9 +702,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf gid=100 -input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini index 000056a51..1ac296d57 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,9 +213,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf gid=100 -input=/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini index 5e43af11f..091559190 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,9 +322,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/mcf gid=100 -input=/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini index 6f2d20a8e..84ab5e292 100644 --- a/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -108,9 +114,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/sparc/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/sparc/linux/mcf gid=100 -input=/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -122,9 +128,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini b/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini index 95a36ae61..b0f5cdf9b 100644 --- a/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini +++ b/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -217,9 +223,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/sparc/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/sparc/linux/mcf gid=100 -input=/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -231,9 +237,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini index 0be389ad0..098c34f79 100644 --- a/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini +++ b/tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -634,9 +637,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf gid=100 -input=/home/stever/m5/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -648,9 +651,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini b/tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini index 6769a8e07..d838f1c87 100644 --- a/tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini +++ b/tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=apic_clk_domain dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -142,9 +148,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf gid=100 -input=/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -156,9 +162,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini b/tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini index 9efa1f6d6..31f143ff4 100644 --- a/tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -251,9 +257,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/mcf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/mcf gid=100 -input=/dist/cpu2000/data/mcf/smred/input/mcf.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/mcf/smred/input/mcf.in max_stack_size=67108864 output=cout pid=100 @@ -265,9 +271,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini b/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini index f1b635684..a5f2c0f8e 100644 --- a/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -96,6 +99,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -169,6 +173,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -208,6 +213,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -247,6 +253,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -286,6 +293,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -306,6 +314,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -470,6 +479,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -514,6 +524,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -644,9 +655,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/alpha/tru64/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/parser gid=100 -input=/arm/projectscratch/pd/sysrandd/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -658,9 +669,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -697,15 +718,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simerr b/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simerr index 506aa6e28..354ea5068 100644 --- a/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simerr +++ b/tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simerr @@ -2,4 +2,9 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway +warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway +warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway +warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway +warn: system.cpu.execute.inFlightInsts: No space to push data into queue of capacity 26, pushing anyway +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini index 0276b8a93..35eb71fc6 100644 --- a/tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,9 +753,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser gid=100 -input=/arm/projectscratch/pd/sysrandd/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini index 19f9758d3..3e9c4c1da 100644 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,9 +702,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser gid=100 -input=/home/stever/m5/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini index b14a667a9..1b406eef6 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,9 +213,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser gid=100 -input=/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini index ac28a9b86..dd4a92786 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,9 +322,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser gid=100 -input=/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini b/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini index 7faf76c14..5f45842db 100644 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -634,9 +637,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser gid=100 -input=/home/stever/m5/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -648,9 +651,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt index 45be2f3b2..bc10d06da 100644 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.456433 # Nu sim_ticks 456433328000 # Number of ticks simulated final_tick 456433328000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 93655 # Simulator instruction rate (inst/s) -host_op_rate 173179 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 51697488 # Simulator tick rate (ticks/s) -host_mem_usage 350856 # Number of bytes of host memory used -host_seconds 8828.93 # Real time elapsed on the host +host_inst_rate 81383 # Simulator instruction rate (inst/s) +host_op_rate 150486 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 44923021 # Simulator tick rate (ticks/s) +host_mem_usage 402504 # Number of bytes of host memory used +host_seconds 10160.34 # Real time elapsed on the host sim_insts 826877109 # Number of instructions simulated sim_ops 1528988701 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -419,10 +419,10 @@ system.cpu.iq.fu_full::MemWrite 2923144 13.85% 100.00% # at system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available system.cpu.iq.FU_type_0::No_OpClass 2650510 0.15% 0.15% # Type of FU issued -system.cpu.iq.FU_type_0::IntAlu 1189351111 66.06% 66.20% # Type of FU issued +system.cpu.iq.FU_type_0::IntAlu 1189351125 66.06% 66.20% # Type of FU issued system.cpu.iq.FU_type_0::IntMult 365099 0.02% 66.22% # Type of FU issued system.cpu.iq.FU_type_0::IntDiv 3880777 0.22% 66.44% # Type of FU issued -system.cpu.iq.FU_type_0::FloatAdd 71 0.00% 66.44% # Type of FU issued +system.cpu.iq.FU_type_0::FloatAdd 57 0.00% 66.44% # Type of FU issued system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.44% # Type of FU issued system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.44% # Type of FU issued system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.44% # Type of FU issued diff --git a/tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini b/tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini index bcd42cfa4..8134f7b0e 100644 --- a/tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini +++ b/tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=apic_clk_domain dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -142,9 +148,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser gid=100 -input=/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -156,9 +162,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini b/tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini index bd4e435a1..2b0e6b6be 100644 --- a/tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -251,9 +257,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/parser +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/parser gid=100 -input=/dist/cpu2000/data/parser/mdred/input/parser.in +input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -265,9 +271,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/config.ini index c27165d1c..34c34b8d3 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/config.ini +++ b/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -78,6 +82,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 stageTracing=false stageWidth=4 switched_out=false @@ -253,7 +258,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/eon gid=100 input=cin max_stack_size=67108864 @@ -267,9 +272,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -282,9 +297,9 @@ master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] -type=SimpleDRAM +type=DRAMCtrl activation_limit=4 -addr_mapping=RaBaChCo +addr_mapping=RoRaBaChCo banks_per_rank=8 burst_length=8 channels=1 @@ -295,27 +310,33 @@ device_rowbuffer_size=1024 devices_per_rank=8 eventq_index=0 in_addr_map=true +max_accesses_per_row=16 mem_sched_policy=frfcfs +min_writes_per_switch=16 null=false -page_policy=open +page_policy=open_adaptive range=0:134217727 ranks_per_channel=2 read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 -write_buffer_size=32 -write_high_thresh_perc=70 -write_low_thresh_perc=0 +tXAW=30000 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 port=system.membus.master[0] [system.voltage_domain] diff --git a/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/simerr b/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/simerr index abe1622a9..664365742 100755 --- a/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/simerr +++ b/tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/simerr @@ -48,4 +48,4 @@ Writing to chair.cook.ppm 12 8 14 13 8 14 14 8 14 -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/config.ini index e4aa5eab5..383c5c9aa 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -96,6 +99,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -169,6 +173,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -208,6 +213,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -247,6 +253,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -286,6 +293,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -306,6 +314,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -470,6 +479,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -514,6 +524,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -644,7 +655,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/alpha/tru64/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/eon gid=100 input=cin max_stack_size=67108864 @@ -658,9 +669,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -697,15 +718,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/simerr b/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/simerr index abe1622a9..664365742 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/simerr +++ b/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/simerr @@ -48,4 +48,4 @@ Writing to chair.cook.ppm 12 8 14 13 8 14 14 8 14 -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini index edbb4f97d..0aab988e5 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -109,7 +115,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/eon gid=100 input=cin max_stack_size=67108864 @@ -123,9 +129,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr index abe1622a9..664365742 100755 --- a/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr +++ b/tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr @@ -48,4 +48,4 @@ Writing to chair.cook.ppm 12 8 14 13 8 14 14 8 14 -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/config.ini index b264a599b..5569f2848 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -218,7 +224,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/eon gid=100 input=cin max_stack_size=67108864 @@ -232,9 +238,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simerr b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simerr index abe1622a9..664365742 100755 --- a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simerr +++ b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simerr @@ -48,4 +48,4 @@ Writing to chair.cook.ppm 12 8 14 13 8 14 14 8 14 -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/30.eon/ref/arm/linux/minor-timing/config.ini b/tests/long/se/30.eon/ref/arm/linux/minor-timing/config.ini index 396ce5f1d..3da78afde 100644 --- a/tests/long/se/30.eon/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/30.eon/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,7 +753,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon gid=100 input=cin max_stack_size=67108864 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini b/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini index 1aa11a694..521f5fb70 100644 --- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,7 +702,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon gid=100 input=cin max_stack_size=67108864 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini index d33135638..ea25a257f 100644 --- a/tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,7 +213,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon gid=100 input=cin max_stack_size=67108864 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini b/tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini index 3089e084a..e7e094253 100644 --- a/tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,7 +322,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/eon +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon gid=100 input=cin max_stack_size=67108864 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/config.ini index 0f4e284a7..acd11e636 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -96,6 +99,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -169,6 +173,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -208,6 +213,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -247,6 +253,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -286,6 +293,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -306,6 +314,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -470,6 +479,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -514,6 +524,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -644,7 +655,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/alpha/tru64/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -658,9 +669,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -697,15 +718,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/simerr index b38cab2f9..cf5d2b5cc 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/simerr @@ -2,5 +2,5 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(0, 1, ...) -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini index 3b24ee769..7c82d017b 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -109,7 +115,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -123,9 +129,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr index b38cab2f9..cf5d2b5cc 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr @@ -2,5 +2,5 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(0, 1, ...) -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini index 34c972fc4..354d6da6a 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -218,7 +224,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -232,9 +238,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr index b38cab2f9..cf5d2b5cc 100755 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr @@ -2,5 +2,5 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(0, 1, ...) -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/config.ini index 67ce4f8b9..901264c7e 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,7 +753,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini index 48782c31e..db65c79ef 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,7 +702,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini index 1d7b4f375..b0a290b06 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,7 +213,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini index 11c9b066a..e3c2da1c2 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,7 +322,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/perlbmk +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk gid=100 input=cin max_stack_size=67108864 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini index 20b5204d0..7b7e53586 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -78,6 +82,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 stageTracing=false stageWidth=4 switched_out=false @@ -253,7 +258,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex gid=100 input=cin max_stack_size=67108864 @@ -267,9 +272,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -282,9 +297,9 @@ master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] -type=SimpleDRAM +type=DRAMCtrl activation_limit=4 -addr_mapping=RaBaChCo +addr_mapping=RoRaBaChCo banks_per_rank=8 burst_length=8 channels=1 @@ -295,27 +310,33 @@ device_rowbuffer_size=1024 devices_per_rank=8 eventq_index=0 in_addr_map=true +max_accesses_per_row=16 mem_sched_policy=frfcfs +min_writes_per_switch=16 null=false -page_policy=open +page_policy=open_adaptive range=0:134217727 ranks_per_channel=2 read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 -write_buffer_size=32 -write_high_thresh_perc=70 -write_low_thresh_perc=0 +tXAW=30000 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 port=system.membus.master[0] [system.voltage_domain] diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr index 506aa6e28..de77515a1 100755 --- a/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr +++ b/tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/config.ini index 608f400a3..d2cfbc574 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -96,6 +99,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -169,6 +173,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -208,6 +213,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -247,6 +253,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -286,6 +293,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -306,6 +314,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -470,6 +479,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -514,6 +524,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -644,7 +655,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/alpha/tru64/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex gid=100 input=cin max_stack_size=67108864 @@ -658,9 +669,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -697,15 +718,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/simerr b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/simerr index 506aa6e28..de77515a1 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/simerr +++ b/tests/long/se/50.vortex/ref/alpha/tru64/minor-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini index 16ac17b8d..34c305ae5 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -109,7 +115,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex gid=100 input=cin max_stack_size=67108864 @@ -123,9 +129,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini index 927fb8fa4..d2c7c290f 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -218,7 +224,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex gid=100 input=cin max_stack_size=67108864 @@ -232,9 +238,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/arm/linux/minor-timing/config.ini b/tests/long/se/50.vortex/ref/arm/linux/minor-timing/config.ini index 4cb5c8ea2..6ff93edf5 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/50.vortex/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,7 +753,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/vortex gid=100 input=cin max_stack_size=67108864 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini index b90a29164..11661d187 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,7 +702,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/vortex gid=100 input=cin max_stack_size=67108864 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini index ba6e5f41a..7a9144759 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,7 +213,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/vortex gid=100 input=cin max_stack_size=67108864 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini b/tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini index de369d8f4..0709f1643 100644 --- a/tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,7 +322,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/vortex gid=100 input=cin max_stack_size=67108864 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini b/tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini index abfb7932e..d88b9c728 100644 --- a/tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -108,7 +114,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/sparc/linux/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/sparc/linux/vortex gid=100 input=cin max_stack_size=67108864 @@ -122,9 +128,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/config.ini b/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/config.ini index 937ce3e41..0fe5ca901 100644 --- a/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/config.ini +++ b/tests/long/se/50.vortex/ref/sparc/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -217,7 +223,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/sparc/linux/vortex +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/sparc/linux/vortex gid=100 input=cin max_stack_size=67108864 @@ -231,9 +237,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini b/tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini index 317ef3f76..c30f8c0fd 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -78,6 +82,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 stageTracing=false stageWidth=4 switched_out=false @@ -253,7 +258,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -267,9 +272,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -282,9 +297,9 @@ master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] -type=SimpleDRAM +type=DRAMCtrl activation_limit=4 -addr_mapping=RaBaChCo +addr_mapping=RoRaBaChCo banks_per_rank=8 burst_length=8 channels=1 @@ -295,27 +310,33 @@ device_rowbuffer_size=1024 devices_per_rank=8 eventq_index=0 in_addr_map=true +max_accesses_per_row=16 mem_sched_policy=frfcfs +min_writes_per_switch=16 null=false -page_policy=open +page_policy=open_adaptive range=0:134217727 ranks_per_channel=2 read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 -write_buffer_size=32 -write_high_thresh_perc=70 -write_low_thresh_perc=0 +tXAW=30000 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 port=system.membus.master[0] [system.voltage_domain] diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/config.ini b/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/config.ini index 18aec7159..581902389 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -96,6 +99,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -169,6 +173,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -208,6 +213,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -247,6 +253,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -286,6 +293,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -306,6 +314,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -470,6 +479,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -514,6 +524,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -644,7 +655,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/alpha/tru64/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -658,9 +669,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -697,15 +718,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/simerr b/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/simerr index 506aa6e28..de77515a1 100644..100755 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/simerr +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/minor-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini index 6cbd45db6..a048badbc 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -109,7 +115,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -123,9 +129,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/simerr index 506aa6e28..de77515a1 100755 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/simerr +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/config.ini index 2cb068091..d3adad404 100644 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -218,7 +224,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -232,9 +238,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/simerr b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/simerr index 506aa6e28..de77515a1 100755 --- a/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/simerr +++ b/tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/config.ini index f226b0fa2..0d07c139d 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,7 +753,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini index 25fa7870b..d2257e41a 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,7 +702,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini index ad0230a84..ec3a0574d 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,7 +213,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini b/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini index a5a5a4799..3e6b06c13 100644 --- a/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,7 +322,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini index 40d9825c1..abb41bc37 100644 --- a/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini +++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=apic_clk_domain dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -142,7 +148,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -156,9 +162,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini index 5c76444e5..eedfe9da7 100644 --- a/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -251,7 +257,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/bzip2 +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/bzip2 gid=100 input=cin max_stack_size=67108864 @@ -265,9 +271,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/config.ini b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/config.ini index 1a6e862fe..1547a2d4b 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/config.ini +++ b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -78,6 +82,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 stageTracing=false stageWidth=4 switched_out=false @@ -253,7 +258,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/twolf gid=100 input=cin max_stack_size=67108864 @@ -267,9 +272,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -282,9 +297,9 @@ master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] -type=SimpleDRAM +type=DRAMCtrl activation_limit=4 -addr_mapping=RaBaChCo +addr_mapping=RoRaBaChCo banks_per_rank=8 burst_length=8 channels=1 @@ -295,27 +310,33 @@ device_rowbuffer_size=1024 devices_per_rank=8 eventq_index=0 in_addr_map=true +max_accesses_per_row=16 mem_sched_policy=frfcfs +min_writes_per_switch=16 null=false -page_policy=open +page_policy=open_adaptive range=0:134217727 ranks_per_channel=2 read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 -write_buffer_size=32 -write_high_thresh_perc=70 -write_low_thresh_perc=0 +tXAW=30000 +write_buffer_size=64 +write_high_thresh_perc=85 +write_low_thresh_perc=50 port=system.membus.master[0] [system.voltage_domain] diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simerr b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simerr index 506aa6e28..de77515a1 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simerr +++ b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout index 66d60adf3..2875d7c3b 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout +++ b/tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout @@ -23,4 +23,4 @@ Authors: Carl Sechen, Bill Swartz 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 41680207000 because target called exit() +122 123 124 Exiting @ tick 41681685000 because target called exit() diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/config.ini b/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/config.ini index 4c4f72a25..11027e0cc 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/config.ini +++ b/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -96,6 +99,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -169,6 +173,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -208,6 +213,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -247,6 +253,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -286,6 +293,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -306,6 +314,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -470,6 +479,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -514,6 +524,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -644,7 +655,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/alpha/tru64/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/twolf gid=100 input=cin max_stack_size=67108864 @@ -658,9 +669,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -697,15 +718,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/simerr b/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/simerr index 506aa6e28..de77515a1 100644..100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/simerr +++ b/tests/long/se/70.twolf/ref/alpha/tru64/minor-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini b/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini index b06f5d885..881006e7f 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -109,7 +115,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/twolf gid=100 input=cin max_stack_size=67108864 @@ -123,9 +129,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr b/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr index 506aa6e28..de77515a1 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr +++ b/tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini b/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini index 3fa897910..896591c78 100644 --- a/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -218,7 +224,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/alpha/tru64/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/twolf gid=100 input=cin max_stack_size=67108864 @@ -232,9 +238,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr b/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr index 506aa6e28..de77515a1 100755 --- a/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr +++ b/tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr @@ -2,4 +2,4 @@ warn: Sockets disabled, not accepting gdb connections warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything warn: Prefetch instructions in Alpha do not do anything -warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) +warn: ignoring syscall sigprocmask(1, ...) diff --git a/tests/long/se/70.twolf/ref/arm/linux/minor-timing/config.ini b/tests/long/se/70.twolf/ref/arm/linux/minor-timing/config.ini index 990a8e3a4..e7e2c3de4 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/minor-timing/config.ini +++ b/tests/long/se/70.twolf/ref/arm/linux/minor-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -98,6 +101,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -207,6 +211,7 @@ funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.fun [system.cpu.executeFuncUnits.funcUnits0] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses @@ -246,6 +251,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits1] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses @@ -285,6 +291,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits2] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses @@ -324,6 +331,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits3] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=9 opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses @@ -344,6 +352,7 @@ opClass=IntDiv [system.cpu.executeFuncUnits.funcUnits4] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses @@ -508,6 +517,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits5] type=MinorFU children=opClasses timings +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses @@ -552,6 +562,7 @@ opClasses= [system.cpu.executeFuncUnits.funcUnits6] type=MinorFU children=opClasses +cantForwardFromFUIndices= eventq_index=0 issueLat=1 opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses @@ -742,7 +753,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/arm/projectscratch/pd/sysrandd/dist/cpu2000/binaries/arm/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -756,9 +767,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain @@ -795,15 +816,19 @@ read_buffer_size=32 static_backend_latency=10000 static_frontend_latency=10000 tBURST=5000 +tCK=1250 tCL=13750 tRAS=35000 tRCD=13750 tREFI=7800000 -tRFC=300000 +tRFC=260000 tRP=13750 -tRRD=6250 +tRRD=6000 +tRTP=7500 +tRTW=2500 +tWR=15000 tWTR=7500 -tXAW=40000 +tXAW=30000 write_buffer_size=64 write_high_thresh_perc=85 write_low_thresh_perc=50 diff --git a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini index 289d5c40d..d8488904a 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -699,7 +702,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -713,9 +716,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini index 8a9c45524..b37d84887 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=atomic @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -72,6 +76,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -208,7 +213,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -222,9 +227,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini index c1d62d90a..50fb5bed2 100644 --- a/tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -66,6 +70,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -317,7 +322,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/arm/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -331,9 +336,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini index ead3fce75..b76f802a9 100644 --- a/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini +++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -108,7 +114,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/sparc/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/sparc/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -122,9 +128,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini index 5f60b5786..fb7b292e6 100644 --- a/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini +++ b/tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -217,7 +223,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/sparc/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/sparc/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -231,9 +237,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini index 3c2ec0084..c83cd6a89 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini @@ -10,13 +10,14 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 load_offset=0 mem_mode=timing @@ -37,7 +38,9 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] @@ -634,7 +637,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/home/stever/m5/dist/cpu2000/binaries/x86/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -648,9 +651,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout index dda302f8a..22525bb08 100755 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout @@ -1,10 +1,12 @@ +Redirecting stdout to build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/simout +Redirecting stderr to build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jun 21 2014 11:13:07 -gem5 started Jun 21 2014 22:44:43 -gem5 executing on phenom -command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing +gem5 compiled Aug 28 2014 04:02:39 +gem5 started Aug 28 2014 04:26:16 +gem5 executing on ribera.cs.wisc.edu +command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/smred.sav Couldn't unlink build/X86/tests/opt/long/se/70.twolf/x86/linux/o3-timing/smred.sv2 Global frequency set at 1000000000000 ticks per second @@ -24,4 +26,4 @@ info: Increasing stack size by one page. 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 -122 123 124 Exiting @ tick 145782984000 because target called exit() +122 123 124 Exiting @ tick 145755370500 because target called exit() diff --git a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt index 87a35ab50..27be407ab 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt @@ -1,62 +1,62 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.145783 # Number of seconds simulated -sim_ticks 145782984000 # Number of ticks simulated -final_tick 145782984000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.145755 # Number of seconds simulated +sim_ticks 145755370500 # Number of ticks simulated +final_tick 145755370500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 75578 # Simulator instruction rate (inst/s) -host_op_rate 126676 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 83424852 # Simulator tick rate (ticks/s) -host_mem_usage 276072 # Number of bytes of host memory used -host_seconds 1747.48 # Real time elapsed on the host +host_inst_rate 67444 # Simulator instruction rate (inst/s) +host_op_rate 113042 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 74431489 # Simulator tick rate (ticks/s) +host_mem_usage 330012 # Number of bytes of host memory used +host_seconds 1958.25 # Real time elapsed on the host sim_insts 132071192 # Number of instructions simulated sim_ops 221363384 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks -system.physmem.bytes_read::cpu.inst 219712 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.data 125824 # Number of bytes read from this memory -system.physmem.bytes_read::total 345536 # Number of bytes read from this memory -system.physmem.bytes_inst_read::cpu.inst 219712 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::total 219712 # Number of instructions bytes read from this memory -system.physmem.num_reads::cpu.inst 3433 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.data 1966 # Number of read requests responded to by this memory -system.physmem.num_reads::total 5399 # Number of read requests responded to by this memory -system.physmem.bw_read::cpu.inst 1507117 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.data 863091 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 2370208 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::cpu.inst 1507117 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 1507117 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_total::cpu.inst 1507117 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.data 863091 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 2370208 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 5399 # Number of read requests accepted +system.physmem.bytes_read::cpu.inst 218240 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.data 125376 # Number of bytes read from this memory +system.physmem.bytes_read::total 343616 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu.inst 218240 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 218240 # Number of instructions bytes read from this memory +system.physmem.num_reads::cpu.inst 3410 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.data 1959 # Number of read requests responded to by this memory +system.physmem.num_reads::total 5369 # Number of read requests responded to by this memory +system.physmem.bw_read::cpu.inst 1497303 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 860181 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 2357484 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 1497303 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 1497303 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 1497303 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 860181 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 2357484 # Total bandwidth to/from this memory (bytes/s) +system.physmem.readReqs 5369 # Number of read requests accepted system.physmem.writeReqs 0 # Number of write requests accepted -system.physmem.readBursts 5399 # Number of DRAM read bursts, including those serviced by the write queue +system.physmem.readBursts 5369 # Number of DRAM read bursts, including those serviced by the write queue system.physmem.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue -system.physmem.bytesReadDRAM 345536 # Total number of bytes read from DRAM +system.physmem.bytesReadDRAM 343616 # Total number of bytes read from DRAM system.physmem.bytesReadWrQ 0 # Total number of bytes read from write queue system.physmem.bytesWritten 0 # Total number of bytes written to DRAM -system.physmem.bytesReadSys 345536 # Total read bytes from the system interface side +system.physmem.bytesReadSys 343616 # Total read bytes from the system interface side system.physmem.bytesWrittenSys 0 # Total written bytes from the system interface side system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one -system.physmem.neitherReadNorWriteReqs 225 # Number of requests that are neither read nor write -system.physmem.perBankRdBursts::0 296 # Per bank write bursts -system.physmem.perBankRdBursts::1 360 # Per bank write bursts -system.physmem.perBankRdBursts::2 450 # Per bank write bursts -system.physmem.perBankRdBursts::3 362 # Per bank write bursts +system.physmem.neitherReadNorWriteReqs 207 # Number of requests that are neither read nor write +system.physmem.perBankRdBursts::0 284 # Per bank write bursts +system.physmem.perBankRdBursts::1 359 # Per bank write bursts +system.physmem.perBankRdBursts::2 451 # Per bank write bursts +system.physmem.perBankRdBursts::3 358 # Per bank write bursts system.physmem.perBankRdBursts::4 334 # Per bank write bursts system.physmem.perBankRdBursts::5 327 # Per bank write bursts -system.physmem.perBankRdBursts::6 402 # Per bank write bursts -system.physmem.perBankRdBursts::7 379 # Per bank write bursts -system.physmem.perBankRdBursts::8 340 # Per bank write bursts -system.physmem.perBankRdBursts::9 280 # Per bank write bursts +system.physmem.perBankRdBursts::6 401 # Per bank write bursts +system.physmem.perBankRdBursts::7 381 # Per bank write bursts +system.physmem.perBankRdBursts::8 341 # Per bank write bursts +system.physmem.perBankRdBursts::9 279 # Per bank write bursts system.physmem.perBankRdBursts::10 232 # Per bank write bursts -system.physmem.perBankRdBursts::11 283 # Per bank write bursts -system.physmem.perBankRdBursts::12 213 # Per bank write bursts -system.physmem.perBankRdBursts::13 468 # Per bank write bursts -system.physmem.perBankRdBursts::14 388 # Per bank write bursts -system.physmem.perBankRdBursts::15 285 # Per bank write bursts +system.physmem.perBankRdBursts::11 279 # Per bank write bursts +system.physmem.perBankRdBursts::12 208 # Per bank write bursts +system.physmem.perBankRdBursts::13 464 # Per bank write bursts +system.physmem.perBankRdBursts::14 389 # Per bank write bursts +system.physmem.perBankRdBursts::15 282 # Per bank write bursts system.physmem.perBankWrBursts::0 0 # Per bank write bursts system.physmem.perBankWrBursts::1 0 # Per bank write bursts system.physmem.perBankWrBursts::2 0 # Per bank write bursts @@ -75,14 +75,14 @@ system.physmem.perBankWrBursts::14 0 # Pe system.physmem.perBankWrBursts::15 0 # Per bank write bursts system.physmem.numRdRetry 0 # Number of times read queue was full causing retry system.physmem.numWrRetry 0 # Number of times write queue was full causing retry -system.physmem.totGap 145782934000 # Total gap between requests +system.physmem.totGap 145755124000 # Total gap between requests system.physmem.readPktSize::0 0 # Read request sizes (log2) system.physmem.readPktSize::1 0 # Read request sizes (log2) system.physmem.readPktSize::2 0 # Read request sizes (log2) system.physmem.readPktSize::3 0 # Read request sizes (log2) system.physmem.readPktSize::4 0 # Read request sizes (log2) system.physmem.readPktSize::5 0 # Read request sizes (log2) -system.physmem.readPktSize::6 5399 # Read request sizes (log2) +system.physmem.readPktSize::6 5369 # Read request sizes (log2) system.physmem.writePktSize::0 0 # Write request sizes (log2) system.physmem.writePktSize::1 0 # Write request sizes (log2) system.physmem.writePktSize::2 0 # Write request sizes (log2) @@ -90,10 +90,10 @@ system.physmem.writePktSize::3 0 # Wr system.physmem.writePktSize::4 0 # Write request sizes (log2) system.physmem.writePktSize::5 0 # Write request sizes (log2) system.physmem.writePktSize::6 0 # Write request sizes (log2) -system.physmem.rdQLenPdf::0 4350 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::1 862 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::2 162 # What read queue length does an incoming req see -system.physmem.rdQLenPdf::3 23 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::0 4318 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::1 864 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::2 165 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::3 20 # What read queue length does an incoming req see system.physmem.rdQLenPdf::4 2 # What read queue length does an incoming req see system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see @@ -186,308 +186,308 @@ system.physmem.wrQLenPdf::60 0 # Wh system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.physmem.bytesPerActivate::samples 1099 # Bytes accessed per row activation -system.physmem.bytesPerActivate::mean 313.768881 # Bytes accessed per row activation -system.physmem.bytesPerActivate::gmean 183.938334 # Bytes accessed per row activation -system.physmem.bytesPerActivate::stdev 327.481688 # Bytes accessed per row activation -system.physmem.bytesPerActivate::0-127 421 38.31% 38.31% # Bytes accessed per row activation -system.physmem.bytesPerActivate::128-255 241 21.93% 60.24% # Bytes accessed per row activation -system.physmem.bytesPerActivate::256-383 100 9.10% 69.34% # Bytes accessed per row activation -system.physmem.bytesPerActivate::384-511 65 5.91% 75.25% # Bytes accessed per row activation -system.physmem.bytesPerActivate::512-639 56 5.10% 80.35% # Bytes accessed per row activation -system.physmem.bytesPerActivate::640-767 54 4.91% 85.26% # Bytes accessed per row activation -system.physmem.bytesPerActivate::768-895 19 1.73% 86.99% # Bytes accessed per row activation -system.physmem.bytesPerActivate::896-1023 20 1.82% 88.81% # Bytes accessed per row activation -system.physmem.bytesPerActivate::1024-1151 123 11.19% 100.00% # Bytes accessed per row activation -system.physmem.bytesPerActivate::total 1099 # Bytes accessed per row activation -system.physmem.totQLat 41267750 # Total ticks spent queuing -system.physmem.totMemAccLat 142499000 # Total ticks spent from burst creation until serviced by the DRAM -system.physmem.totBusLat 26995000 # Total ticks spent in databus transfers -system.physmem.avgQLat 7643.59 # Average queueing delay per DRAM burst +system.physmem.bytesPerActivate::samples 1076 # Bytes accessed per row activation +system.physmem.bytesPerActivate::mean 318.156134 # Bytes accessed per row activation +system.physmem.bytesPerActivate::gmean 184.849707 # Bytes accessed per row activation +system.physmem.bytesPerActivate::stdev 333.212521 # Bytes accessed per row activation +system.physmem.bytesPerActivate::0-127 414 38.48% 38.48% # Bytes accessed per row activation +system.physmem.bytesPerActivate::128-255 235 21.84% 60.32% # Bytes accessed per row activation +system.physmem.bytesPerActivate::256-383 101 9.39% 69.70% # Bytes accessed per row activation +system.physmem.bytesPerActivate::384-511 58 5.39% 75.09% # Bytes accessed per row activation +system.physmem.bytesPerActivate::512-639 43 4.00% 79.09% # Bytes accessed per row activation +system.physmem.bytesPerActivate::640-767 47 4.37% 83.46% # Bytes accessed per row activation +system.physmem.bytesPerActivate::768-895 34 3.16% 86.62% # Bytes accessed per row activation +system.physmem.bytesPerActivate::896-1023 19 1.77% 88.38% # Bytes accessed per row activation +system.physmem.bytesPerActivate::1024-1151 125 11.62% 100.00% # Bytes accessed per row activation +system.physmem.bytesPerActivate::total 1076 # Bytes accessed per row activation +system.physmem.totQLat 40846250 # Total ticks spent queuing +system.physmem.totMemAccLat 141515000 # Total ticks spent from burst creation until serviced by the DRAM +system.physmem.totBusLat 26845000 # Total ticks spent in databus transfers +system.physmem.avgQLat 7607.79 # Average queueing delay per DRAM burst system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst -system.physmem.avgMemAccLat 26393.59 # Average memory access latency per DRAM burst -system.physmem.avgRdBW 2.37 # Average DRAM read bandwidth in MiByte/s +system.physmem.avgMemAccLat 26357.79 # Average memory access latency per DRAM burst +system.physmem.avgRdBW 2.36 # Average DRAM read bandwidth in MiByte/s system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s -system.physmem.avgRdBWSys 2.37 # Average system read bandwidth in MiByte/s +system.physmem.avgRdBWSys 2.36 # Average system read bandwidth in MiByte/s system.physmem.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s system.physmem.busUtil 0.02 # Data bus utilization in percentage system.physmem.busUtilRead 0.02 # Data bus utilization in percentage for reads system.physmem.busUtilWrite 0.00 # Data bus utilization in percentage for writes -system.physmem.avgRdQLen 1.06 # Average read queue length when enqueuing +system.physmem.avgRdQLen 1.07 # Average read queue length when enqueuing system.physmem.avgWrQLen 0.00 # Average write queue length when enqueuing -system.physmem.readRowHits 4296 # Number of row buffer hits during reads +system.physmem.readRowHits 4285 # Number of row buffer hits during reads system.physmem.writeRowHits 0 # Number of row buffer hits during writes -system.physmem.readRowHitRate 79.57 # Row buffer hit rate for reads +system.physmem.readRowHitRate 79.81 # Row buffer hit rate for reads system.physmem.writeRowHitRate nan # Row buffer hit rate for writes -system.physmem.avgGap 27001839.97 # Average gap between requests -system.physmem.pageHitRate 79.57 # Row buffer hit rate, read and write combined -system.physmem.memoryStateTime::IDLE 139294402000 # Time in different power states -system.physmem.memoryStateTime::REF 4867980000 # Time in different power states +system.physmem.avgGap 27147536.60 # Average gap between requests +system.physmem.pageHitRate 79.81 # Row buffer hit rate, read and write combined +system.physmem.memoryStateTime::IDLE 139292792000 # Time in different power states +system.physmem.memoryStateTime::REF 4866940000 # Time in different power states system.physmem.memoryStateTime::PRE_PDN 0 # Time in different power states -system.physmem.memoryStateTime::ACT 1619857750 # Time in different power states +system.physmem.memoryStateTime::ACT 1591366500 # Time in different power states system.physmem.memoryStateTime::ACT_PDN 0 # Time in different power states -system.membus.throughput 2370208 # Throughput (bytes/s) -system.membus.trans_dist::ReadReq 3862 # Transaction distribution -system.membus.trans_dist::ReadResp 3862 # Transaction distribution -system.membus.trans_dist::UpgradeReq 225 # Transaction distribution -system.membus.trans_dist::UpgradeResp 225 # Transaction distribution +system.membus.throughput 2357484 # Throughput (bytes/s) +system.membus.trans_dist::ReadReq 3832 # Transaction distribution +system.membus.trans_dist::ReadResp 3832 # Transaction distribution +system.membus.trans_dist::UpgradeReq 207 # Transaction distribution +system.membus.trans_dist::UpgradeResp 207 # Transaction distribution system.membus.trans_dist::ReadExReq 1537 # Transaction distribution system.membus.trans_dist::ReadExResp 1537 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 11248 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.cpu.l2cache.mem_side::total 11248 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::total 11248 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 345536 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 345536 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::total 345536 # Cumulative packet size per connected master and slave (bytes) -system.membus.data_through_bus 345536 # Total data (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 11152 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::total 11152 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 11152 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 343616 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 343616 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 343616 # Cumulative packet size per connected master and slave (bytes) +system.membus.data_through_bus 343616 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) -system.membus.reqLayer0.occupancy 6776000 # Layer occupancy (ticks) +system.membus.reqLayer0.occupancy 6685000 # Layer occupancy (ticks) system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) -system.membus.respLayer1.occupancy 50906775 # Layer occupancy (ticks) +system.membus.respLayer1.occupancy 50563044 # Layer occupancy (ticks) system.membus.respLayer1.utilization 0.0 # Layer utilization (%) system.cpu_clk_domain.clock 500 # Clock period in ticks -system.cpu.branchPred.lookups 19251245 # Number of BP lookups -system.cpu.branchPred.condPredicted 19251245 # Number of conditional branches predicted -system.cpu.branchPred.condIncorrect 1503864 # Number of conditional branches incorrect -system.cpu.branchPred.BTBLookups 11794147 # Number of BTB lookups -system.cpu.branchPred.BTBHits 11185323 # Number of BTB hits +system.cpu.branchPred.lookups 19312355 # Number of BP lookups +system.cpu.branchPred.condPredicted 19312355 # Number of conditional branches predicted +system.cpu.branchPred.condIncorrect 1526222 # Number of conditional branches incorrect +system.cpu.branchPred.BTBLookups 12165390 # Number of BTB lookups +system.cpu.branchPred.BTBHits 11208509 # Number of BTB hits system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly. -system.cpu.branchPred.BTBHitPct 94.837914 # BTB Hit Percentage -system.cpu.branchPred.usedRAS 1363914 # Number of times the RAS was used to get a target. -system.cpu.branchPred.RASInCorrect 22896 # Number of incorrect RAS predictions. +system.cpu.branchPred.BTBHitPct 92.134399 # BTB Hit Percentage +system.cpu.branchPred.usedRAS 1374126 # Number of times the RAS was used to get a target. +system.cpu.branchPred.RASInCorrect 24109 # Number of incorrect RAS predictions. system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks system.cpu.workload.num_syscalls 400 # Number of system calls -system.cpu.numCycles 291881234 # number of cpu cycles simulated +system.cpu.numCycles 291824777 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu.fetch.icacheStallCycles 24212208 # Number of cycles fetch is stalled on an Icache miss -system.cpu.fetch.Insts 214052436 # Number of instructions fetch has processed -system.cpu.fetch.Branches 19251245 # Number of branches that fetch encountered -system.cpu.fetch.predictedBranches 12549237 # Number of branches that fetch has predicted taken -system.cpu.fetch.Cycles 55985392 # Number of cycles fetch has run and was not squashing or blocked -system.cpu.fetch.SquashCycles 16840264 # Number of cycles fetch has spent squashing -system.cpu.fetch.BlockedCycles 177008858 # Number of cycles fetch has spent blocked -system.cpu.fetch.MiscStallCycles 1283 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs -system.cpu.fetch.PendingTrapStallCycles 7024 # Number of stall cycles due to pending traps -system.cpu.fetch.IcacheWaitRetryStallCycles 65 # Number of stall cycles due to full MSHR -system.cpu.fetch.CacheLines 23136044 # Number of cache lines fetched -system.cpu.fetch.IcacheSquashes 282405 # Number of outstanding Icache misses that were squashed -system.cpu.fetch.rateDist::samples 272277792 # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::mean 1.296795 # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::stdev 2.780007 # Number of instructions fetched each cycle (Total) +system.cpu.fetch.icacheStallCycles 24324759 # Number of cycles fetch is stalled on an Icache miss +system.cpu.fetch.Insts 214691013 # Number of instructions fetch has processed +system.cpu.fetch.Branches 19312355 # Number of branches that fetch encountered +system.cpu.fetch.predictedBranches 12582635 # Number of branches that fetch has predicted taken +system.cpu.fetch.Cycles 56144836 # Number of cycles fetch has run and was not squashing or blocked +system.cpu.fetch.SquashCycles 16970936 # Number of cycles fetch has spent squashing +system.cpu.fetch.BlockedCycles 176562009 # Number of cycles fetch has spent blocked +system.cpu.fetch.MiscStallCycles 2090 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs +system.cpu.fetch.PendingTrapStallCycles 11526 # Number of stall cycles due to pending traps +system.cpu.fetch.IcacheWaitRetryStallCycles 39 # Number of stall cycles due to full MSHR +system.cpu.fetch.CacheLines 23234678 # Number of cache lines fetched +system.cpu.fetch.IcacheSquashes 287353 # Number of outstanding Icache misses that were squashed +system.cpu.fetch.rateDist::samples 272218372 # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::mean 1.300706 # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::stdev 2.783258 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::0 217778926 79.98% 79.98% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::1 2920418 1.07% 81.06% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::2 2383762 0.88% 81.93% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::3 2729411 1.00% 82.93% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::4 3335214 1.22% 84.16% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::5 3498463 1.28% 85.44% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::6 4001053 1.47% 86.91% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::7 2671434 0.98% 87.90% # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::8 32959111 12.10% 100.00% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::0 217566223 79.92% 79.92% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::1 2932645 1.08% 81.00% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::2 2385496 0.88% 81.88% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::3 2737910 1.01% 82.88% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::4 3337902 1.23% 84.11% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::5 3515947 1.29% 85.40% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::6 4015286 1.48% 86.88% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::7 2680056 0.98% 87.86% # Number of instructions fetched each cycle (Total) +system.cpu.fetch.rateDist::8 33046907 12.14% 100.00% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) -system.cpu.fetch.rateDist::total 272277792 # Number of instructions fetched each cycle (Total) -system.cpu.fetch.branchRate 0.065956 # Number of branch fetches per cycle -system.cpu.fetch.rate 0.733355 # Number of inst fetches per cycle -system.cpu.decode.IdleCycles 35864450 # Number of cycles decode is idle -system.cpu.decode.BlockedCycles 167881983 # Number of cycles decode is blocked -system.cpu.decode.RunCycles 44786392 # Number of cycles decode is running -system.cpu.decode.UnblockCycles 8682005 # Number of cycles decode is unblocking -system.cpu.decode.SquashCycles 15062962 # Number of cycles decode is squashing -system.cpu.decode.DecodedInsts 346567500 # Number of instructions handled by decode -system.cpu.rename.SquashCycles 15062962 # Number of cycles rename is squashing -system.cpu.rename.IdleCycles 42671339 # Number of cycles rename is idle -system.cpu.rename.BlockCycles 116778023 # Number of cycles rename is blocking -system.cpu.rename.serializeStallCycles 37081 # count of cycles rename stalled for serializing inst -system.cpu.rename.RunCycles 45654825 # Number of cycles rename is running -system.cpu.rename.UnblockCycles 52073562 # Number of cycles rename is unblocking -system.cpu.rename.RenamedInsts 340013592 # Number of instructions processed by rename -system.cpu.rename.ROBFullEvents 22387 # Number of times rename has blocked due to ROB full -system.cpu.rename.IQFullEvents 45742154 # Number of times rename has blocked due to IQ full -system.cpu.rename.LQFullEvents 5966467 # Number of times rename has blocked due to LQ full -system.cpu.rename.SQFullEvents 137065 # Number of times rename has blocked due to SQ full -system.cpu.rename.RenamedOperands 393960742 # Number of destination operands rename has renamed -system.cpu.rename.RenameLookups 945391670 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 624205941 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 4453971 # Number of floating rename lookups +system.cpu.fetch.rateDist::total 272218372 # Number of instructions fetched each cycle (Total) +system.cpu.fetch.branchRate 0.066178 # Number of branch fetches per cycle +system.cpu.fetch.rate 0.735685 # Number of inst fetches per cycle +system.cpu.decode.IdleCycles 35961276 # Number of cycles decode is idle +system.cpu.decode.BlockedCycles 167476538 # Number of cycles decode is blocked +system.cpu.decode.RunCycles 44947862 # Number of cycles decode is running +system.cpu.decode.UnblockCycles 8659583 # Number of cycles decode is unblocking +system.cpu.decode.SquashCycles 15173113 # Number of cycles decode is squashing +system.cpu.decode.DecodedInsts 347461862 # Number of instructions handled by decode +system.cpu.rename.SquashCycles 15173113 # Number of cycles rename is squashing +system.cpu.rename.IdleCycles 42752504 # Number of cycles rename is idle +system.cpu.rename.BlockCycles 116485143 # Number of cycles rename is blocking +system.cpu.rename.serializeStallCycles 31994 # count of cycles rename stalled for serializing inst +system.cpu.rename.RunCycles 45803186 # Number of cycles rename is running +system.cpu.rename.UnblockCycles 51972432 # Number of cycles rename is unblocking +system.cpu.rename.RenamedInsts 340800862 # Number of instructions processed by rename +system.cpu.rename.ROBFullEvents 21864 # Number of times rename has blocked due to ROB full +system.cpu.rename.IQFullEvents 45640903 # Number of times rename has blocked due to IQ full +system.cpu.rename.LQFullEvents 6024783 # Number of times rename has blocked due to LQ full +system.cpu.rename.SQFullEvents 135945 # Number of times rename has blocked due to SQ full +system.cpu.rename.RenamedOperands 394811664 # Number of destination operands rename has renamed +system.cpu.rename.RenameLookups 947446953 # Number of register rename lookups that rename has made +system.cpu.rename.int_rename_lookups 625588632 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 4495188 # Number of floating rename lookups system.cpu.rename.CommittedMaps 259429450 # Number of HB maps that are committed -system.cpu.rename.UndoneMaps 134531292 # Number of HB maps that are undone due to squashing -system.cpu.rename.serializingInsts 2243 # count of serializing insts renamed -system.cpu.rename.tempSerializingInsts 2238 # count of temporary serializing insts renamed -system.cpu.rename.skidInsts 90830827 # count of insts added to the skid buffer -system.cpu.memDep0.insertedLoads 87006444 # Number of loads inserted to the mem dependence unit. -system.cpu.memDep0.insertedStores 31074157 # Number of stores inserted to the mem dependence unit. -system.cpu.memDep0.conflictingLoads 61167406 # Number of conflicting loads. -system.cpu.memDep0.conflictingStores 20316475 # Number of conflicting stores. -system.cpu.iq.iqInstsAdded 332092429 # Number of instructions added to the IQ (excludes non-spec) -system.cpu.iq.iqNonSpecInstsAdded 4572 # Number of non-speculative instructions added to the IQ -system.cpu.iq.iqInstsIssued 263265541 # Number of instructions issued -system.cpu.iq.iqSquashedInstsIssued 182587 # Number of squashed instructions issued -system.cpu.iq.iqSquashedInstsExamined 110344895 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu.iq.iqSquashedOperandsExamined 231927910 # Number of squashed operands that are examined and possibly removed from graph -system.cpu.iq.iqSquashedNonSpecRemoved 3327 # Number of squashed non-spec instructions that were removed -system.cpu.iq.issued_per_cycle::samples 272277792 # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::mean 0.966901 # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::stdev 1.357293 # Number of insts issued each cycle +system.cpu.rename.UndoneMaps 135382214 # Number of HB maps that are undone due to squashing +system.cpu.rename.serializingInsts 2125 # count of serializing insts renamed +system.cpu.rename.tempSerializingInsts 2128 # count of temporary serializing insts renamed +system.cpu.rename.skidInsts 90643821 # count of insts added to the skid buffer +system.cpu.memDep0.insertedLoads 87211861 # Number of loads inserted to the mem dependence unit. +system.cpu.memDep0.insertedStores 31146341 # Number of stores inserted to the mem dependence unit. +system.cpu.memDep0.conflictingLoads 61275223 # Number of conflicting loads. +system.cpu.memDep0.conflictingStores 20328080 # Number of conflicting stores. +system.cpu.iq.iqInstsAdded 332778184 # Number of instructions added to the IQ (excludes non-spec) +system.cpu.iq.iqNonSpecInstsAdded 4631 # Number of non-speculative instructions added to the IQ +system.cpu.iq.iqInstsIssued 263626408 # Number of instructions issued +system.cpu.iq.iqSquashedInstsIssued 192005 # Number of squashed instructions issued +system.cpu.iq.iqSquashedInstsExamined 111021931 # Number of squashed instructions iterated over during squash; mainly for profiling +system.cpu.iq.iqSquashedOperandsExamined 233004479 # Number of squashed operands that are examined and possibly removed from graph +system.cpu.iq.iqSquashedNonSpecRemoved 3386 # Number of squashed non-spec instructions that were removed +system.cpu.iq.issued_per_cycle::samples 272218372 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::mean 0.968437 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::stdev 1.359512 # Number of insts issued each cycle system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::0 146114169 53.66% 53.66% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::1 54798888 20.13% 73.79% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::2 34241976 12.58% 86.37% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::3 18986540 6.97% 93.34% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::4 11181244 4.11% 97.45% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::5 4283756 1.57% 99.02% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::6 1956251 0.72% 99.74% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::7 577925 0.21% 99.95% # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::8 137043 0.05% 100.00% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::0 146051537 53.65% 53.65% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::1 54756567 20.11% 73.77% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::2 34141482 12.54% 86.31% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::3 19064760 7.00% 93.31% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::4 11177424 4.11% 97.42% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::5 4331751 1.59% 99.01% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::6 1975514 0.73% 99.74% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::7 583634 0.21% 99.95% # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::8 135703 0.05% 100.00% # Number of insts issued each cycle system.cpu.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle system.cpu.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle system.cpu.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle -system.cpu.iq.issued_per_cycle::total 272277792 # Number of insts issued each cycle +system.cpu.iq.issued_per_cycle::total 272218372 # Number of insts issued each cycle system.cpu.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available -system.cpu.iq.fu_full::IntAlu 142962 5.08% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::IntMult 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::IntDiv 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::FloatAdd 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::FloatCmp 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::FloatCvt 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::FloatMult 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::FloatDiv 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::FloatSqrt 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdAdd 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdAlu 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdCmp 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdCvt 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdMisc 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdMult 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdShift 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdSqrt 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 5.08% # attempts to use FU when none available -system.cpu.iq.fu_full::MemRead 2337044 83.10% 88.19% # attempts to use FU when none available -system.cpu.iq.fu_full::MemWrite 332186 11.81% 100.00% # attempts to use FU when none available +system.cpu.iq.fu_full::IntAlu 150028 5.32% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::IntMult 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::IntDiv 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatAdd 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatCmp 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatCvt 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatMult 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatDiv 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::FloatSqrt 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdAdd 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdAddAcc 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdAlu 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdCmp 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdCvt 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdMisc 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdMult 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdMultAcc 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdShift 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdShiftAcc 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdSqrt 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatAdd 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatAlu 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatCmp 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatCvt 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatDiv 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatMisc 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatMult 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatMultAcc 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::SimdFloatSqrt 0 0.00% 5.32% # attempts to use FU when none available +system.cpu.iq.fu_full::MemRead 2336090 82.83% 88.15% # attempts to use FU when none available +system.cpu.iq.fu_full::MemWrite 334182 11.85% 100.00% # attempts to use FU when none available system.cpu.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available system.cpu.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available -system.cpu.iq.FU_type_0::No_OpClass 1210901 0.46% 0.46% # Type of FU issued -system.cpu.iq.FU_type_0::IntAlu 164273729 62.40% 62.86% # Type of FU issued -system.cpu.iq.FU_type_0::IntMult 789732 0.30% 63.16% # Type of FU issued -system.cpu.iq.FU_type_0::IntDiv 7035869 2.67% 65.83% # Type of FU issued -system.cpu.iq.FU_type_0::FloatAdd 1461918 0.56% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdMult 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdShift 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdShiftAcc 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.39% # Type of FU issued -system.cpu.iq.FU_type_0::MemRead 65849141 25.01% 91.40% # Type of FU issued -system.cpu.iq.FU_type_0::MemWrite 22644251 8.60% 100.00% # Type of FU issued +system.cpu.iq.FU_type_0::No_OpClass 1210869 0.46% 0.46% # Type of FU issued +system.cpu.iq.FU_type_0::IntAlu 164756015 62.50% 62.96% # Type of FU issued +system.cpu.iq.FU_type_0::IntMult 789411 0.30% 63.25% # Type of FU issued +system.cpu.iq.FU_type_0::IntDiv 7036440 2.67% 65.92% # Type of FU issued +system.cpu.iq.FU_type_0::FloatAdd 1209865 0.46% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::FloatCmp 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::FloatCvt 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::FloatMult 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::FloatDiv 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::FloatSqrt 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdAdd 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdAddAcc 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdAlu 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdCmp 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdCvt 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdMisc 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdMult 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdMultAcc 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdShift 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdShiftAcc 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdSqrt 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatAdd 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatAlu 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatCmp 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatCvt 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatDiv 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatMisc 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatMult 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::SimdFloatSqrt 0 0.00% 66.38% # Type of FU issued +system.cpu.iq.FU_type_0::MemRead 65957948 25.02% 91.40% # Type of FU issued +system.cpu.iq.FU_type_0::MemWrite 22665860 8.60% 100.00% # Type of FU issued system.cpu.iq.FU_type_0::IprAccess 0 0.00% 100.00% # Type of FU issued system.cpu.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued -system.cpu.iq.FU_type_0::total 263265541 # Type of FU issued -system.cpu.iq.rate 0.901961 # Inst issue rate -system.cpu.iq.fu_busy_cnt 2812192 # FU busy when requested -system.cpu.iq.fu_busy_rate 0.010682 # FU busy rate (busy events/executed inst) -system.cpu.iq.int_inst_queue_reads 796857032 # Number of integer instruction queue reads -system.cpu.iq.int_inst_queue_writes 438700759 # Number of integer instruction queue writes -system.cpu.iq.int_inst_queue_wakeup_accesses 257701720 # Number of integer instruction queue wakeup accesses -system.cpu.iq.fp_inst_queue_reads 4946621 # Number of floating instruction queue reads -system.cpu.iq.fp_inst_queue_writes 4039797 # Number of floating instruction queue writes -system.cpu.iq.fp_inst_queue_wakeup_accesses 2377852 # Number of floating instruction queue wakeup accesses -system.cpu.iq.int_alu_accesses 262377827 # Number of integer alu accesses -system.cpu.iq.fp_alu_accesses 2489005 # Number of floating point alu accesses -system.cpu.iew.lsq.thread0.forwLoads 18800853 # Number of loads that had data forwarded from stores +system.cpu.iq.FU_type_0::total 263626408 # Type of FU issued +system.cpu.iq.rate 0.903372 # Inst issue rate +system.cpu.iq.fu_busy_cnt 2820300 # FU busy when requested +system.cpu.iq.fu_busy_rate 0.010698 # FU busy rate (busy events/executed inst) +system.cpu.iq.int_inst_queue_reads 797512450 # Number of integer instruction queue reads +system.cpu.iq.int_inst_queue_writes 440004694 # Number of integer instruction queue writes +system.cpu.iq.int_inst_queue_wakeup_accesses 258018761 # Number of integer instruction queue wakeup accesses +system.cpu.iq.fp_inst_queue_reads 4971043 # Number of floating instruction queue reads +system.cpu.iq.fp_inst_queue_writes 4096196 # Number of floating instruction queue writes +system.cpu.iq.fp_inst_queue_wakeup_accesses 2387913 # Number of floating instruction queue wakeup accesses +system.cpu.iq.int_alu_accesses 262734744 # Number of integer alu accesses +system.cpu.iq.fp_alu_accesses 2501095 # Number of floating point alu accesses +system.cpu.iew.lsq.thread0.forwLoads 18875446 # Number of loads that had data forwarded from stores system.cpu.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address -system.cpu.iew.lsq.thread0.squashedLoads 30356857 # Number of loads squashed -system.cpu.iew.lsq.thread0.ignoredResponses 18134 # Number of memory responses ignored because the instruction is squashed -system.cpu.iew.lsq.thread0.memOrderViolation 304082 # Number of memory ordering violations -system.cpu.iew.lsq.thread0.squashedStores 10558440 # Number of stores squashed +system.cpu.iew.lsq.thread0.squashedLoads 30562274 # Number of loads squashed +system.cpu.iew.lsq.thread0.ignoredResponses 18312 # Number of memory responses ignored because the instruction is squashed +system.cpu.iew.lsq.thread0.memOrderViolation 301481 # Number of memory ordering violations +system.cpu.iew.lsq.thread0.squashedStores 10630624 # Number of stores squashed system.cpu.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address system.cpu.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding -system.cpu.iew.lsq.thread0.rescheduledLoads 49872 # Number of loads that were rescheduled +system.cpu.iew.lsq.thread0.rescheduledLoads 50310 # Number of loads that were rescheduled system.cpu.iew.lsq.thread0.cacheBlocked 1 # Number of times an access to memory failed due to the cache being blocked system.cpu.iew.iewIdleCycles 0 # Number of cycles IEW is idle -system.cpu.iew.iewSquashCycles 15062962 # Number of cycles IEW is squashing -system.cpu.iew.iewBlockCycles 84436601 # Number of cycles IEW is blocking -system.cpu.iew.iewUnblockCycles 5827541 # Number of cycles IEW is unblocking -system.cpu.iew.iewDispatchedInsts 332097001 # Number of instructions dispatched to IQ -system.cpu.iew.iewDispSquashedInsts 93155 # Number of squashed instructions skipped by dispatch -system.cpu.iew.iewDispLoadInsts 87006444 # Number of dispatched load instructions -system.cpu.iew.iewDispStoreInsts 31074157 # Number of dispatched store instructions -system.cpu.iew.iewDispNonSpecInsts 2159 # Number of dispatched non-speculative instructions -system.cpu.iew.iewIQFullEvents 2868922 # Number of times the IQ has become full, causing a stall -system.cpu.iew.iewLSQFullEvents 287074 # Number of times the LSQ has become full, causing a stall -system.cpu.iew.memOrderViolationEvents 304082 # Number of memory order violations -system.cpu.iew.predictedTakenIncorrect 649398 # Number of branches that were predicted taken incorrectly -system.cpu.iew.predictedNotTakenIncorrect 907392 # Number of branches that were predicted not taken incorrectly -system.cpu.iew.branchMispredicts 1556790 # Number of branch mispredicts detected at execute -system.cpu.iew.iewExecutedInsts 261390422 # Number of executed instructions -system.cpu.iew.iewExecLoadInsts 65051182 # Number of load instructions executed -system.cpu.iew.iewExecSquashedInsts 1875119 # Number of squashed instructions skipped in execute +system.cpu.iew.iewSquashCycles 15173113 # Number of cycles IEW is squashing +system.cpu.iew.iewBlockCycles 84276429 # Number of cycles IEW is blocking +system.cpu.iew.iewUnblockCycles 5906270 # Number of cycles IEW is unblocking +system.cpu.iew.iewDispatchedInsts 332782815 # Number of instructions dispatched to IQ +system.cpu.iew.iewDispSquashedInsts 102069 # Number of squashed instructions skipped by dispatch +system.cpu.iew.iewDispLoadInsts 87211861 # Number of dispatched load instructions +system.cpu.iew.iewDispStoreInsts 31146341 # Number of dispatched store instructions +system.cpu.iew.iewDispNonSpecInsts 2037 # Number of dispatched non-speculative instructions +system.cpu.iew.iewIQFullEvents 2851984 # Number of times the IQ has become full, causing a stall +system.cpu.iew.iewLSQFullEvents 388220 # Number of times the LSQ has become full, causing a stall +system.cpu.iew.memOrderViolationEvents 301481 # Number of memory order violations +system.cpu.iew.predictedTakenIncorrect 659051 # Number of branches that were predicted taken incorrectly +system.cpu.iew.predictedNotTakenIncorrect 922496 # Number of branches that were predicted not taken incorrectly +system.cpu.iew.branchMispredicts 1581547 # Number of branch mispredicts detected at execute +system.cpu.iew.iewExecutedInsts 261729032 # Number of executed instructions +system.cpu.iew.iewExecLoadInsts 65162827 # Number of load instructions executed +system.cpu.iew.iewExecSquashedInsts 1897376 # Number of squashed instructions skipped in execute system.cpu.iew.exec_swp 0 # number of swp insts executed system.cpu.iew.exec_nop 0 # number of nop insts executed -system.cpu.iew.exec_refs 87491108 # number of memory reference insts executed -system.cpu.iew.exec_branches 14410736 # Number of branches executed -system.cpu.iew.exec_stores 22439926 # Number of stores executed -system.cpu.iew.exec_rate 0.895537 # Inst execution rate -system.cpu.iew.wb_sent 260730148 # cumulative count of insts sent to commit -system.cpu.iew.wb_count 260079572 # cumulative count of insts written-back -system.cpu.iew.wb_producers 208603284 # num instructions producing a value -system.cpu.iew.wb_consumers 373821854 # num instructions consuming a value +system.cpu.iew.exec_refs 87627279 # number of memory reference insts executed +system.cpu.iew.exec_branches 14424837 # Number of branches executed +system.cpu.iew.exec_stores 22464452 # Number of stores executed +system.cpu.iew.exec_rate 0.896870 # Inst execution rate +system.cpu.iew.wb_sent 261068756 # cumulative count of insts sent to commit +system.cpu.iew.wb_count 260406674 # cumulative count of insts written-back +system.cpu.iew.wb_producers 208884231 # num instructions producing a value +system.cpu.iew.wb_consumers 374053492 # num instructions consuming a value system.cpu.iew.wb_penalized 0 # number of instrctions required to write to 'other' IQ -system.cpu.iew.wb_rate 0.891046 # insts written-back per cycle -system.cpu.iew.wb_fanout 0.558029 # average fanout of values written-back +system.cpu.iew.wb_rate 0.892339 # insts written-back per cycle +system.cpu.iew.wb_fanout 0.558434 # average fanout of values written-back system.cpu.iew.wb_penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ -system.cpu.commit.commitSquashedInsts 110904752 # The number of squashed insts skipped by commit +system.cpu.commit.commitSquashedInsts 111590930 # The number of squashed insts skipped by commit system.cpu.commit.commitNonSpecStalls 1245 # The number of times commit has been forced to stall to communicate backwards -system.cpu.commit.branchMispredicts 1504927 # The number of times a branch was mispredicted -system.cpu.commit.committed_per_cycle::samples 257214830 # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::mean 0.860617 # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::stdev 1.643182 # Number of insts commited each cycle +system.cpu.commit.branchMispredicts 1527972 # The number of times a branch was mispredicted +system.cpu.commit.committed_per_cycle::samples 257045259 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::mean 0.861184 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::stdev 1.643795 # Number of insts commited each cycle system.cpu.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::0 157256344 61.14% 61.14% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::1 57715541 22.44% 83.58% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::2 14223073 5.53% 89.11% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::3 12060500 4.69% 93.80% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::4 4224463 1.64% 95.44% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::5 2956145 1.15% 96.59% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::6 920096 0.36% 96.94% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::7 1048300 0.41% 97.35% # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::8 6810368 2.65% 100.00% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::0 157102684 61.12% 61.12% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::1 57671303 22.44% 83.55% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::2 14254075 5.55% 89.10% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::3 12075323 4.70% 93.80% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::4 4232227 1.65% 95.44% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::5 2930251 1.14% 96.58% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::6 914346 0.36% 96.94% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::7 1028677 0.40% 97.34% # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::8 6836373 2.66% 100.00% # Number of insts commited each cycle system.cpu.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle system.cpu.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle system.cpu.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle -system.cpu.commit.committed_per_cycle::total 257214830 # Number of insts commited each cycle +system.cpu.commit.committed_per_cycle::total 257045259 # Number of insts commited each cycle system.cpu.commit.committedInsts 132071192 # Number of instructions committed system.cpu.commit.committedOps 221363384 # Number of ops (including micro ops) committed system.cpu.commit.swp_count 0 # Number of s/w prefetches committed @@ -499,10 +499,10 @@ system.cpu.commit.fp_insts 2162459 # Nu system.cpu.commit.int_insts 219019985 # Number of committed integer instructions. system.cpu.commit.function_calls 797818 # Number of function calls committed. system.cpu.commit.op_class_0::No_OpClass 1176721 0.53% 0.53% # Class of committed instruction -system.cpu.commit.op_class_0::IntAlu 133863962 60.47% 61.00% # Class of committed instruction -system.cpu.commit.op_class_0::IntMult 772953 0.35% 61.35% # Class of committed instruction -system.cpu.commit.op_class_0::IntDiv 7031501 3.18% 64.53% # Class of committed instruction -system.cpu.commit.op_class_0::FloatAdd 1352943 0.61% 65.14% # Class of committed instruction +system.cpu.commit.op_class_0::IntAlu 134111832 60.58% 61.12% # Class of committed instruction +system.cpu.commit.op_class_0::IntMult 772953 0.35% 61.47% # Class of committed instruction +system.cpu.commit.op_class_0::IntDiv 7031501 3.18% 64.64% # Class of committed instruction +system.cpu.commit.op_class_0::FloatAdd 1105073 0.50% 65.14% # Class of committed instruction system.cpu.commit.op_class_0::FloatCmp 0 0.00% 65.14% # Class of committed instruction system.cpu.commit.op_class_0::FloatCvt 0 0.00% 65.14% # Class of committed instruction system.cpu.commit.op_class_0::FloatMult 0 0.00% 65.14% # Class of committed instruction @@ -533,241 +533,241 @@ system.cpu.commit.op_class_0::MemWrite 20515717 9.27% 100.00% # Cl system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 221363384 # Class of committed instruction -system.cpu.commit.bw_lim_events 6810368 # number cycles where commit BW limit reached +system.cpu.commit.bw_lim_events 6836373 # number cycles where commit BW limit reached system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits -system.cpu.rob.rob_reads 582672598 # The number of ROB reads -system.cpu.rob.rob_writes 679632792 # The number of ROB writes -system.cpu.timesIdled 5976195 # Number of times that the entire CPU went into an idle state and unscheduled itself -system.cpu.idleCycles 19603442 # Total number of cycles that the CPU has spent unscheduled due to idling +system.cpu.rob.rob_reads 583163200 # The number of ROB reads +system.cpu.rob.rob_writes 681115892 # The number of ROB writes +system.cpu.timesIdled 5968247 # Number of times that the entire CPU went into an idle state and unscheduled itself +system.cpu.idleCycles 19606405 # Total number of cycles that the CPU has spent unscheduled due to idling system.cpu.committedInsts 132071192 # Number of Instructions Simulated system.cpu.committedOps 221363384 # Number of Ops (including micro ops) Simulated -system.cpu.cpi 2.210030 # CPI: Cycles Per Instruction -system.cpu.cpi_total 2.210030 # CPI: Total CPI of All Threads -system.cpu.ipc 0.452483 # IPC: Instructions Per Cycle -system.cpu.ipc_total 0.452483 # IPC: Total IPC of All Threads -system.cpu.int_regfile_reads 453366407 # number of integer regfile reads -system.cpu.int_regfile_writes 236319036 # number of integer regfile writes -system.cpu.fp_regfile_reads 3248620 # number of floating regfile reads -system.cpu.fp_regfile_writes 2037591 # number of floating regfile writes -system.cpu.cc_regfile_reads 102911292 # number of cc regfile reads -system.cpu.cc_regfile_writes 59928663 # number of cc regfile writes -system.cpu.misc_regfile_reads 134914047 # number of misc regfile reads +system.cpu.cpi 2.209602 # CPI: Cycles Per Instruction +system.cpu.cpi_total 2.209602 # CPI: Total CPI of All Threads +system.cpu.ipc 0.452570 # IPC: Instructions Per Cycle +system.cpu.ipc_total 0.452570 # IPC: Total IPC of All Threads +system.cpu.int_regfile_reads 453845201 # number of integer regfile reads +system.cpu.int_regfile_writes 236601026 # number of integer regfile writes +system.cpu.fp_regfile_reads 3267567 # number of floating regfile reads +system.cpu.fp_regfile_writes 2048085 # number of floating regfile writes +system.cpu.cc_regfile_reads 102937064 # number of cc regfile reads +system.cpu.cc_regfile_writes 59977801 # number of cc regfile writes +system.cpu.misc_regfile_reads 135125313 # number of misc regfile reads system.cpu.misc_regfile_writes 1689 # number of misc regfile writes -system.cpu.toL2Bus.throughput 4027905 # Throughput (bytes/s) -system.cpu.toL2Bus.trans_dist::ReadReq 7620 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadResp 7618 # Transaction distribution -system.cpu.toL2Bus.trans_dist::Writeback 13 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeReq 226 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeResp 226 # Transaction distribution +system.cpu.toL2Bus.throughput 4014617 # Throughput (bytes/s) +system.cpu.toL2Bus.trans_dist::ReadReq 7586 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadResp 7585 # Transaction distribution +system.cpu.toL2Bus.trans_dist::Writeback 14 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeReq 208 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeResp 208 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 1544 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 1544 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 14075 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 4490 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count::total 18565 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 443136 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 129600 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size::total 572736 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.data_through_bus 572736 # Total data (bytes) -system.cpu.toL2Bus.snoop_data_through_bus 14464 # Total snoop data (bytes) -system.cpu.toL2Bus.reqLayer0.occupancy 4714500 # Layer occupancy (ticks) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 14042 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 4438 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 18480 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 442624 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 129152 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 571776 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.data_through_bus 571776 # Total data (bytes) +system.cpu.toL2Bus.snoop_data_through_bus 13376 # Total snoop data (bytes) +system.cpu.toL2Bus.reqLayer0.occupancy 4690000 # Layer occupancy (ticks) system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%) -system.cpu.toL2Bus.respLayer0.occupancy 11320000 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer0.occupancy 11276499 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) -system.cpu.toL2Bus.respLayer1.occupancy 3508475 # Layer occupancy (ticks) +system.cpu.toL2Bus.respLayer1.occupancy 3488206 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%) -system.cpu.icache.tags.replacements 4955 # number of replacements -system.cpu.icache.tags.tagsinuse 1627.815791 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 23126816 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 6924 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 3340.094743 # Average number of references to valid blocks. +system.cpu.icache.tags.replacements 4946 # number of replacements +system.cpu.icache.tags.tagsinuse 1631.815497 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 23225438 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 6919 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 3356.762249 # Average number of references to valid blocks. system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1627.815791 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.794832 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.794832 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_task_id_blocks::1024 1969 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::0 96 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::1 196 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::2 748 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::3 136 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::4 793 # Occupied blocks per task id -system.cpu.icache.tags.occ_task_id_percent::1024 0.961426 # Percentage of cache occupancy per task id -system.cpu.icache.tags.tag_accesses 46279236 # Number of tag accesses -system.cpu.icache.tags.data_accesses 46279236 # Number of data accesses -system.cpu.icache.ReadReq_hits::cpu.inst 23126816 # number of ReadReq hits -system.cpu.icache.ReadReq_hits::total 23126816 # number of ReadReq hits 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-system.cpu.icache.demand_miss_latency::cpu.inst 376330999 # number of demand (read+write) miss cycles -system.cpu.icache.demand_miss_latency::total 376330999 # number of demand (read+write) miss cycles -system.cpu.icache.overall_miss_latency::cpu.inst 376330999 # number of overall miss cycles -system.cpu.icache.overall_miss_latency::total 376330999 # number of overall miss cycles -system.cpu.icache.ReadReq_accesses::cpu.inst 23136043 # number of ReadReq accesses(hits+misses) -system.cpu.icache.ReadReq_accesses::total 23136043 # number of ReadReq accesses(hits+misses) -system.cpu.icache.demand_accesses::cpu.inst 23136043 # number of demand (read+write) accesses -system.cpu.icache.demand_accesses::total 23136043 # number of demand (read+write) accesses -system.cpu.icache.overall_accesses::cpu.inst 23136043 # number of overall (read+write) accesses -system.cpu.icache.overall_accesses::total 23136043 # number of overall (read+write) accesses -system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.000399 # miss rate for ReadReq accesses -system.cpu.icache.ReadReq_miss_rate::total 0.000399 # miss rate for ReadReq accesses -system.cpu.icache.demand_miss_rate::cpu.inst 0.000399 # miss rate for demand accesses -system.cpu.icache.demand_miss_rate::total 0.000399 # miss rate for demand accesses -system.cpu.icache.overall_miss_rate::cpu.inst 0.000399 # miss rate for overall accesses -system.cpu.icache.overall_miss_rate::total 0.000399 # miss rate for overall accesses -system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 40785.845779 # average ReadReq miss latency -system.cpu.icache.ReadReq_avg_miss_latency::total 40785.845779 # average ReadReq miss latency -system.cpu.icache.demand_avg_miss_latency::cpu.inst 40785.845779 # average overall miss latency -system.cpu.icache.demand_avg_miss_latency::total 40785.845779 # average overall miss latency -system.cpu.icache.overall_avg_miss_latency::cpu.inst 40785.845779 # average overall miss latency -system.cpu.icache.overall_avg_miss_latency::total 40785.845779 # average overall miss latency -system.cpu.icache.blocked_cycles::no_mshrs 1569 # number of cycles access was blocked +system.cpu.icache.tags.occ_blocks::cpu.inst 1631.815497 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.796785 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.796785 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 1973 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 90 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 175 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 771 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::3 126 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::4 811 # Occupied blocks per task id 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number of demand (read+write) misses +system.cpu.icache.overall_misses::cpu.inst 9238 # number of overall misses +system.cpu.icache.overall_misses::total 9238 # number of overall misses +system.cpu.icache.ReadReq_miss_latency::cpu.inst 372844498 # number of ReadReq miss cycles +system.cpu.icache.ReadReq_miss_latency::total 372844498 # number of ReadReq miss cycles +system.cpu.icache.demand_miss_latency::cpu.inst 372844498 # number of demand (read+write) miss cycles +system.cpu.icache.demand_miss_latency::total 372844498 # number of demand (read+write) miss cycles +system.cpu.icache.overall_miss_latency::cpu.inst 372844498 # number of overall miss cycles +system.cpu.icache.overall_miss_latency::total 372844498 # number of overall miss cycles +system.cpu.icache.ReadReq_accesses::cpu.inst 23234677 # number of ReadReq accesses(hits+misses) +system.cpu.icache.ReadReq_accesses::total 23234677 # number of ReadReq accesses(hits+misses) +system.cpu.icache.demand_accesses::cpu.inst 23234677 # number of demand (read+write) accesses +system.cpu.icache.demand_accesses::total 23234677 # number of demand (read+write) accesses +system.cpu.icache.overall_accesses::cpu.inst 23234677 # number of overall (read+write) accesses +system.cpu.icache.overall_accesses::total 23234677 # number of overall (read+write) accesses +system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.000398 # miss rate for ReadReq accesses +system.cpu.icache.ReadReq_miss_rate::total 0.000398 # miss rate for ReadReq accesses +system.cpu.icache.demand_miss_rate::cpu.inst 0.000398 # miss rate for demand accesses +system.cpu.icache.demand_miss_rate::total 0.000398 # miss rate for demand accesses +system.cpu.icache.overall_miss_rate::cpu.inst 0.000398 # miss rate for overall accesses +system.cpu.icache.overall_miss_rate::total 0.000398 # miss rate for overall accesses +system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 40359.872050 # average ReadReq miss latency +system.cpu.icache.ReadReq_avg_miss_latency::total 40359.872050 # average ReadReq miss latency +system.cpu.icache.demand_avg_miss_latency::cpu.inst 40359.872050 # average overall miss latency +system.cpu.icache.demand_avg_miss_latency::total 40359.872050 # average overall miss latency +system.cpu.icache.overall_avg_miss_latency::cpu.inst 40359.872050 # average overall miss latency +system.cpu.icache.overall_avg_miss_latency::total 40359.872050 # average overall miss latency +system.cpu.icache.blocked_cycles::no_mshrs 1450 # number of cycles access was blocked system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 16 # number of cycles access was blocked system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.avg_blocked_cycles::no_mshrs 98.062500 # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs 90.625000 # average number of cycles each access was blocked system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed -system.cpu.icache.ReadReq_mshr_hits::cpu.inst 2076 # number of ReadReq MSHR hits -system.cpu.icache.ReadReq_mshr_hits::total 2076 # number of ReadReq MSHR hits -system.cpu.icache.demand_mshr_hits::cpu.inst 2076 # number of demand (read+write) MSHR hits -system.cpu.icache.demand_mshr_hits::total 2076 # number of demand (read+write) MSHR hits -system.cpu.icache.overall_mshr_hits::cpu.inst 2076 # number of overall MSHR hits -system.cpu.icache.overall_mshr_hits::total 2076 # number of overall MSHR hits -system.cpu.icache.ReadReq_mshr_misses::cpu.inst 7151 # number of ReadReq MSHR misses -system.cpu.icache.ReadReq_mshr_misses::total 7151 # number of ReadReq MSHR misses -system.cpu.icache.demand_mshr_misses::cpu.inst 7151 # number of demand (read+write) MSHR misses -system.cpu.icache.demand_mshr_misses::total 7151 # number of demand (read+write) MSHR misses -system.cpu.icache.overall_mshr_misses::cpu.inst 7151 # number of overall MSHR misses -system.cpu.icache.overall_mshr_misses::total 7151 # number of overall MSHR misses -system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 279771249 # number of ReadReq MSHR miss cycles -system.cpu.icache.ReadReq_mshr_miss_latency::total 279771249 # number of ReadReq MSHR miss cycles -system.cpu.icache.demand_mshr_miss_latency::cpu.inst 279771249 # number of demand (read+write) MSHR miss cycles -system.cpu.icache.demand_mshr_miss_latency::total 279771249 # number of demand (read+write) MSHR miss cycles -system.cpu.icache.overall_mshr_miss_latency::cpu.inst 279771249 # number of overall MSHR miss cycles -system.cpu.icache.overall_mshr_miss_latency::total 279771249 # number of overall MSHR miss cycles -system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.000309 # mshr miss rate for ReadReq accesses -system.cpu.icache.ReadReq_mshr_miss_rate::total 0.000309 # mshr miss rate for ReadReq accesses -system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.000309 # mshr miss rate for demand accesses -system.cpu.icache.demand_mshr_miss_rate::total 0.000309 # mshr miss rate for demand accesses -system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.000309 # mshr miss rate for overall accesses -system.cpu.icache.overall_mshr_miss_rate::total 0.000309 # mshr miss rate for overall accesses -system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 39123.374213 # average ReadReq mshr miss latency -system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 39123.374213 # average ReadReq mshr miss latency -system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 39123.374213 # average overall mshr miss latency -system.cpu.icache.demand_avg_mshr_miss_latency::total 39123.374213 # average overall mshr miss latency -system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 39123.374213 # average overall mshr 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# Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 2267.439437 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 310.786239 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_percent::writebacks 0.000056 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::cpu.inst 0.069197 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::cpu.data 0.009484 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.078738 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_task_id_blocks::1024 3865 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::0 49 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::1 196 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::2 868 # Occupied blocks per task id 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(read+write) hits +system.cpu.l2cache.overall_hits::cpu.inst 3506 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.data 45 # number of overall hits +system.cpu.l2cache.overall_hits::total 3551 # number of overall hits +system.cpu.l2cache.ReadReq_misses::cpu.inst 3411 # number of ReadReq misses +system.cpu.l2cache.ReadReq_misses::cpu.data 422 # number of ReadReq misses +system.cpu.l2cache.ReadReq_misses::total 3833 # number of ReadReq misses +system.cpu.l2cache.UpgradeReq_misses::cpu.data 207 # number of UpgradeReq misses +system.cpu.l2cache.UpgradeReq_misses::total 207 # number of UpgradeReq misses system.cpu.l2cache.ReadExReq_misses::cpu.data 1537 # number of ReadExReq misses system.cpu.l2cache.ReadExReq_misses::total 1537 # number of ReadExReq misses -system.cpu.l2cache.demand_misses::cpu.inst 3434 # number of demand (read+write) misses -system.cpu.l2cache.demand_misses::cpu.data 1966 # number of demand (read+write) misses -system.cpu.l2cache.demand_misses::total 5400 # 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system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -776,125 +776,125 @@ system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.l2cache.fast_writes 0 # number of fast writes performed system.cpu.l2cache.cache_copies 0 # number of cache copies performed -system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst 3434 # number of ReadReq MSHR misses -system.cpu.l2cache.ReadReq_mshr_misses::cpu.data 429 # number of ReadReq MSHR misses -system.cpu.l2cache.ReadReq_mshr_misses::total 3863 # number of ReadReq MSHR misses -system.cpu.l2cache.UpgradeReq_mshr_misses::cpu.data 225 # number of UpgradeReq MSHR misses -system.cpu.l2cache.UpgradeReq_mshr_misses::total 225 # number of UpgradeReq MSHR misses +system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst 3411 # number of ReadReq MSHR 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latency +system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 54790.338321 # average ReadExReq mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 56820.946936 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 57120.980092 # average overall mshr miss latency +system.cpu.l2cache.demand_avg_mshr_miss_latency::total 56930.400372 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 56820.946936 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 57120.980092 # average overall mshr miss latency +system.cpu.l2cache.overall_avg_mshr_miss_latency::total 56930.400372 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.dcache.tags.replacements 57 # number of replacements -system.cpu.dcache.tags.tagsinuse 1441.863444 # Cycle average of tags in use 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-system.cpu.dcache.tags.occ_task_id_blocks::1024 1955 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::0 15 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::1 36 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::2 70 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::3 432 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::4 1402 # Occupied blocks per task id -system.cpu.dcache.tags.occ_task_id_percent::1024 0.477295 # Percentage of cache occupancy per task id -system.cpu.dcache.tags.tag_accesses 133220616 # Number of tag accesses -system.cpu.dcache.tags.data_accesses 133220616 # Number of data accesses -system.cpu.dcache.ReadReq_hits::cpu.data 46092554 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 46092554 # number of ReadReq hits -system.cpu.dcache.WriteReq_hits::cpu.data 20513960 # number of WriteReq hits -system.cpu.dcache.WriteReq_hits::total 20513960 # number of WriteReq hits -system.cpu.dcache.demand_hits::cpu.data 66606514 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 66606514 # number of demand (read+write) hits -system.cpu.dcache.overall_hits::cpu.data 66606514 # number of overall hits -system.cpu.dcache.overall_hits::total 66606514 # number of overall hits -system.cpu.dcache.ReadReq_misses::cpu.data 1017 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 1017 # number of ReadReq misses -system.cpu.dcache.WriteReq_misses::cpu.data 1771 # number of WriteReq misses -system.cpu.dcache.WriteReq_misses::total 1771 # number of WriteReq misses -system.cpu.dcache.demand_misses::cpu.data 2788 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 2788 # number of demand (read+write) misses -system.cpu.dcache.overall_misses::cpu.data 2788 # number of overall misses -system.cpu.dcache.overall_misses::total 2788 # number of overall misses -system.cpu.dcache.ReadReq_miss_latency::cpu.data 61229380 # number of ReadReq miss cycles -system.cpu.dcache.ReadReq_miss_latency::total 61229380 # number of ReadReq miss cycles -system.cpu.dcache.WriteReq_miss_latency::cpu.data 115680725 # number of WriteReq miss cycles -system.cpu.dcache.WriteReq_miss_latency::total 115680725 # number of WriteReq miss cycles -system.cpu.dcache.demand_miss_latency::cpu.data 176910105 # number of demand (read+write) miss cycles -system.cpu.dcache.demand_miss_latency::total 176910105 # number of demand (read+write) miss cycles -system.cpu.dcache.overall_miss_latency::cpu.data 176910105 # number of overall miss cycles -system.cpu.dcache.overall_miss_latency::total 176910105 # number of overall miss cycles -system.cpu.dcache.ReadReq_accesses::cpu.data 46093571 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.ReadReq_accesses::total 46093571 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.tags.occ_blocks::cpu.data 1440.781031 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.351753 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.351753 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 1947 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 14 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 34 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 71 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::3 428 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::4 1400 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 0.475342 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 133284338 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 133284338 # Number of data accesses +system.cpu.dcache.ReadReq_hits::cpu.data 46124427 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::total 46124427 # number of ReadReq hits +system.cpu.dcache.WriteReq_hits::cpu.data 20513978 # number of WriteReq hits +system.cpu.dcache.WriteReq_hits::total 20513978 # number of WriteReq hits +system.cpu.dcache.demand_hits::cpu.data 66638405 # number of demand (read+write) hits +system.cpu.dcache.demand_hits::total 66638405 # number of demand (read+write) hits +system.cpu.dcache.overall_hits::cpu.data 66638405 # number of overall hits +system.cpu.dcache.overall_hits::total 66638405 # number of overall hits +system.cpu.dcache.ReadReq_misses::cpu.data 1009 # number of ReadReq misses +system.cpu.dcache.ReadReq_misses::total 1009 # number of ReadReq misses +system.cpu.dcache.WriteReq_misses::cpu.data 1753 # number of WriteReq misses +system.cpu.dcache.WriteReq_misses::total 1753 # number of WriteReq misses +system.cpu.dcache.demand_misses::cpu.data 2762 # number of demand (read+write) misses +system.cpu.dcache.demand_misses::total 2762 # number of demand (read+write) misses +system.cpu.dcache.overall_misses::cpu.data 2762 # number of overall misses +system.cpu.dcache.overall_misses::total 2762 # number of overall misses +system.cpu.dcache.ReadReq_miss_latency::cpu.data 63292597 # number of ReadReq miss cycles +system.cpu.dcache.ReadReq_miss_latency::total 63292597 # number of ReadReq miss cycles +system.cpu.dcache.WriteReq_miss_latency::cpu.data 114179456 # number of WriteReq miss cycles +system.cpu.dcache.WriteReq_miss_latency::total 114179456 # number of WriteReq miss cycles +system.cpu.dcache.demand_miss_latency::cpu.data 177472053 # number of demand (read+write) miss cycles +system.cpu.dcache.demand_miss_latency::total 177472053 # number of demand (read+write) miss cycles +system.cpu.dcache.overall_miss_latency::cpu.data 177472053 # number of overall miss cycles +system.cpu.dcache.overall_miss_latency::total 177472053 # number of overall miss cycles +system.cpu.dcache.ReadReq_accesses::cpu.data 46125436 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.ReadReq_accesses::total 46125436 # number of ReadReq accesses(hits+misses) system.cpu.dcache.WriteReq_accesses::cpu.data 20515731 # number of WriteReq accesses(hits+misses) system.cpu.dcache.WriteReq_accesses::total 20515731 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.demand_accesses::cpu.data 66609302 # number of demand (read+write) accesses -system.cpu.dcache.demand_accesses::total 66609302 # number of demand (read+write) accesses -system.cpu.dcache.overall_accesses::cpu.data 66609302 # number of overall (read+write) accesses -system.cpu.dcache.overall_accesses::total 66609302 # number of overall (read+write) accesses +system.cpu.dcache.demand_accesses::cpu.data 66641167 # number of demand (read+write) accesses +system.cpu.dcache.demand_accesses::total 66641167 # number of demand (read+write) accesses +system.cpu.dcache.overall_accesses::cpu.data 66641167 # number of overall (read+write) accesses +system.cpu.dcache.overall_accesses::total 66641167 # number of overall (read+write) accesses system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.000022 # miss rate for ReadReq accesses system.cpu.dcache.ReadReq_miss_rate::total 0.000022 # miss rate for ReadReq accesses -system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.000086 # miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_miss_rate::total 0.000086 # miss rate for WriteReq accesses -system.cpu.dcache.demand_miss_rate::cpu.data 0.000042 # miss rate for demand accesses -system.cpu.dcache.demand_miss_rate::total 0.000042 # miss rate for demand accesses -system.cpu.dcache.overall_miss_rate::cpu.data 0.000042 # miss rate for overall accesses -system.cpu.dcache.overall_miss_rate::total 0.000042 # miss rate for overall accesses -system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 60205.880039 # average ReadReq miss latency -system.cpu.dcache.ReadReq_avg_miss_latency::total 60205.880039 # average ReadReq miss latency -system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 65319.438171 # average WriteReq miss latency -system.cpu.dcache.WriteReq_avg_miss_latency::total 65319.438171 # average WriteReq miss latency -system.cpu.dcache.demand_avg_miss_latency::cpu.data 63454.126614 # average overall miss latency -system.cpu.dcache.demand_avg_miss_latency::total 63454.126614 # average overall miss latency -system.cpu.dcache.overall_avg_miss_latency::cpu.data 63454.126614 # average overall miss latency -system.cpu.dcache.overall_avg_miss_latency::total 63454.126614 # average overall miss latency +system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.000085 # miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_miss_rate::total 0.000085 # miss rate for WriteReq accesses +system.cpu.dcache.demand_miss_rate::cpu.data 0.000041 # miss rate for demand accesses +system.cpu.dcache.demand_miss_rate::total 0.000041 # miss rate for demand accesses +system.cpu.dcache.overall_miss_rate::cpu.data 0.000041 # miss rate for overall accesses +system.cpu.dcache.overall_miss_rate::total 0.000041 # miss rate for overall accesses +system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 62728.044599 # average ReadReq miss latency +system.cpu.dcache.ReadReq_avg_miss_latency::total 62728.044599 # average ReadReq miss latency +system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 65133.745579 # average WriteReq miss latency +system.cpu.dcache.WriteReq_avg_miss_latency::total 65133.745579 # average WriteReq miss latency +system.cpu.dcache.demand_avg_miss_latency::cpu.data 64254.906951 # average overall miss latency +system.cpu.dcache.demand_avg_miss_latency::total 64254.906951 # average overall miss latency +system.cpu.dcache.overall_avg_miss_latency::cpu.data 64254.906951 # average overall miss latency +system.cpu.dcache.overall_avg_miss_latency::total 64254.906951 # average overall miss latency system.cpu.dcache.blocked_cycles::no_mshrs 94 # number of cycles access was blocked system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 2 # number of cycles access was blocked @@ -903,48 +903,48 @@ system.cpu.dcache.avg_blocked_cycles::no_mshrs 47 system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed -system.cpu.dcache.writebacks::writebacks 13 # number of writebacks -system.cpu.dcache.writebacks::total 13 # number of writebacks -system.cpu.dcache.ReadReq_mshr_hits::cpu.data 547 # number of ReadReq MSHR hits -system.cpu.dcache.ReadReq_mshr_hits::total 547 # number of ReadReq MSHR hits +system.cpu.dcache.writebacks::writebacks 14 # number of writebacks +system.cpu.dcache.writebacks::total 14 # number of writebacks +system.cpu.dcache.ReadReq_mshr_hits::cpu.data 548 # number of ReadReq MSHR hits +system.cpu.dcache.ReadReq_mshr_hits::total 548 # number of ReadReq MSHR hits system.cpu.dcache.WriteReq_mshr_hits::cpu.data 2 # number of WriteReq MSHR hits system.cpu.dcache.WriteReq_mshr_hits::total 2 # number of WriteReq MSHR hits -system.cpu.dcache.demand_mshr_hits::cpu.data 549 # number of demand (read+write) MSHR hits -system.cpu.dcache.demand_mshr_hits::total 549 # number of demand (read+write) MSHR hits -system.cpu.dcache.overall_mshr_hits::cpu.data 549 # number of overall MSHR hits -system.cpu.dcache.overall_mshr_hits::total 549 # number of overall MSHR hits -system.cpu.dcache.ReadReq_mshr_misses::cpu.data 470 # number of ReadReq MSHR misses -system.cpu.dcache.ReadReq_mshr_misses::total 470 # number of ReadReq MSHR misses -system.cpu.dcache.WriteReq_mshr_misses::cpu.data 1769 # number of WriteReq MSHR misses -system.cpu.dcache.WriteReq_mshr_misses::total 1769 # number of WriteReq MSHR misses -system.cpu.dcache.demand_mshr_misses::cpu.data 2239 # number of demand (read+write) MSHR misses -system.cpu.dcache.demand_mshr_misses::total 2239 # number of demand (read+write) MSHR misses -system.cpu.dcache.overall_mshr_misses::cpu.data 2239 # number of overall MSHR misses -system.cpu.dcache.overall_mshr_misses::total 2239 # number of overall MSHR misses -system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 34113000 # number of ReadReq MSHR miss cycles -system.cpu.dcache.ReadReq_mshr_miss_latency::total 34113000 # number of ReadReq MSHR miss cycles -system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 111361525 # number of WriteReq MSHR miss cycles -system.cpu.dcache.WriteReq_mshr_miss_latency::total 111361525 # number of WriteReq MSHR miss cycles -system.cpu.dcache.demand_mshr_miss_latency::cpu.data 145474525 # number of demand (read+write) MSHR miss cycles -system.cpu.dcache.demand_mshr_miss_latency::total 145474525 # number of demand (read+write) MSHR miss cycles -system.cpu.dcache.overall_mshr_miss_latency::cpu.data 145474525 # number of overall MSHR miss cycles -system.cpu.dcache.overall_mshr_miss_latency::total 145474525 # number of overall MSHR miss cycles +system.cpu.dcache.demand_mshr_hits::cpu.data 550 # number of demand (read+write) MSHR hits +system.cpu.dcache.demand_mshr_hits::total 550 # number of demand (read+write) MSHR hits +system.cpu.dcache.overall_mshr_hits::cpu.data 550 # number of overall MSHR hits +system.cpu.dcache.overall_mshr_hits::total 550 # number of overall MSHR hits +system.cpu.dcache.ReadReq_mshr_misses::cpu.data 461 # number of ReadReq MSHR misses +system.cpu.dcache.ReadReq_mshr_misses::total 461 # number of ReadReq MSHR misses +system.cpu.dcache.WriteReq_mshr_misses::cpu.data 1751 # number of WriteReq MSHR misses +system.cpu.dcache.WriteReq_mshr_misses::total 1751 # number of WriteReq MSHR misses +system.cpu.dcache.demand_mshr_misses::cpu.data 2212 # number of demand (read+write) MSHR misses +system.cpu.dcache.demand_mshr_misses::total 2212 # number of demand (read+write) MSHR misses +system.cpu.dcache.overall_mshr_misses::cpu.data 2212 # number of overall MSHR misses +system.cpu.dcache.overall_mshr_misses::total 2212 # number of overall MSHR misses +system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 33831000 # number of ReadReq MSHR miss cycles +system.cpu.dcache.ReadReq_mshr_miss_latency::total 33831000 # number of ReadReq MSHR miss cycles +system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 109893794 # number of WriteReq MSHR miss cycles +system.cpu.dcache.WriteReq_mshr_miss_latency::total 109893794 # number of WriteReq MSHR miss cycles +system.cpu.dcache.demand_mshr_miss_latency::cpu.data 143724794 # number of demand (read+write) MSHR miss cycles +system.cpu.dcache.demand_mshr_miss_latency::total 143724794 # number of demand (read+write) MSHR miss cycles +system.cpu.dcache.overall_mshr_miss_latency::cpu.data 143724794 # number of overall MSHR miss cycles +system.cpu.dcache.overall_mshr_miss_latency::total 143724794 # number of overall MSHR miss cycles system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.000010 # mshr miss rate for ReadReq accesses system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.000010 # mshr miss rate for ReadReq accesses -system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.000086 # mshr miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.000086 # mshr miss rate for WriteReq accesses -system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.000034 # mshr miss rate for demand accesses -system.cpu.dcache.demand_mshr_miss_rate::total 0.000034 # mshr miss rate for demand accesses -system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.000034 # mshr miss rate for overall accesses -system.cpu.dcache.overall_mshr_miss_rate::total 0.000034 # mshr miss rate for overall accesses -system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 72580.851064 # average ReadReq mshr miss latency -system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 72580.851064 # average ReadReq mshr miss latency -system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62951.681741 # average WriteReq mshr miss latency -system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62951.681741 # average WriteReq mshr miss latency -system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 64972.990174 # average overall mshr miss latency -system.cpu.dcache.demand_avg_mshr_miss_latency::total 64972.990174 # average overall mshr miss latency -system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 64972.990174 # average overall mshr miss latency -system.cpu.dcache.overall_avg_mshr_miss_latency::total 64972.990174 # average overall mshr miss latency +system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.000085 # mshr miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.000085 # mshr miss rate for WriteReq accesses +system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.000033 # mshr miss rate for demand accesses +system.cpu.dcache.demand_mshr_miss_rate::total 0.000033 # mshr miss rate for demand accesses +system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.000033 # mshr miss rate for overall accesses +system.cpu.dcache.overall_mshr_miss_rate::total 0.000033 # mshr miss rate for overall accesses +system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 73386.117137 # average ReadReq mshr miss latency +system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 73386.117137 # average ReadReq mshr miss latency +system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 62760.590520 # average WriteReq mshr miss latency +system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 62760.590520 # average WriteReq mshr miss latency +system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 64975.042495 # average overall mshr miss latency +system.cpu.dcache.demand_avg_mshr_miss_latency::total 64975.042495 # average overall mshr miss latency +system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 64975.042495 # average overall mshr miss latency +system.cpu.dcache.overall_avg_mshr_miss_latency::total 64975.042495 # average overall mshr miss latency system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate ---------- End Simulation Statistics ---------- diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini b/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini index 4ce0c4345..6e31ea4d2 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini +++ b/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=atomic mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=AtomicSimpleCPU children=apic_clk_domain dtb interrupts isa itb tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -69,6 +74,7 @@ simpoint_profile_file=simpoint.bb.gz simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -142,7 +148,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -156,9 +162,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt index 5240cde6c..12058b878 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt @@ -67,10 +67,10 @@ system.cpu.not_idle_fraction 1 # Pe system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 12326938 # Number of branches fetched system.cpu.op_class::No_OpClass 1176721 0.53% 0.53% # Class of executed instruction -system.cpu.op_class::IntAlu 133863963 60.47% 61.00% # Class of executed instruction -system.cpu.op_class::IntMult 772953 0.35% 61.35% # Class of executed instruction -system.cpu.op_class::IntDiv 7031501 3.18% 64.53% # Class of executed instruction -system.cpu.op_class::FloatAdd 1352943 0.61% 65.14% # Class of executed instruction +system.cpu.op_class::IntAlu 134111833 60.58% 61.12% # Class of executed instruction +system.cpu.op_class::IntMult 772953 0.35% 61.47% # Class of executed instruction +system.cpu.op_class::IntDiv 7031501 3.18% 64.64% # Class of executed instruction +system.cpu.op_class::FloatAdd 1105073 0.50% 65.14% # Class of executed instruction system.cpu.op_class::FloatCmp 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatCvt 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatMult 0 0.00% 65.14% # Class of executed instruction diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini index b3c95dee1..3e9d33bf3 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini @@ -10,14 +10,16 @@ time_sync_spin_threshold=100000000 [system] type=System -children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain +children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain eventq_index=0 init_param=0 kernel= +kernel_addr_check=true load_addr_mask=1099511627775 +load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem @@ -36,12 +38,15 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload +branchPred=Null checker=Null clk_domain=system.cpu_clk_domain cpu_id=0 @@ -63,6 +68,7 @@ numThreads=1 profile=0 progress_interval=0 simpoint_start_insts= +socket_id=0 switched_out=false system=system tracer=system.cpu.tracer @@ -251,7 +257,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/dist/cpu2000/binaries/x86/linux/twolf +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/twolf gid=100 input=cin max_stack_size=67108864 @@ -265,9 +271,19 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +domain_id=-1 eventq_index=0 +init_perf_level=0 voltage_domain=system.voltage_domain +[system.dvfs_handler] +type=DVFSHandler +domains= +enable=false +eventq_index=0 +sys_clk_domain=system.clk_domain +transition_latency=100000000 + [system.membus] type=CoherentBus clk_domain=system.clk_domain diff --git a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt index 9d2ef868e..7a7cefa91 100644 --- a/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt @@ -75,10 +75,10 @@ system.cpu.not_idle_fraction 1 # Pe system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 12326938 # Number of branches fetched system.cpu.op_class::No_OpClass 1176721 0.53% 0.53% # Class of executed instruction -system.cpu.op_class::IntAlu 133863963 60.47% 61.00% # Class of executed instruction -system.cpu.op_class::IntMult 772953 0.35% 61.35% # Class of executed instruction -system.cpu.op_class::IntDiv 7031501 3.18% 64.53% # Class of executed instruction -system.cpu.op_class::FloatAdd 1352943 0.61% 65.14% # Class of executed instruction +system.cpu.op_class::IntAlu 134111833 60.58% 61.12% # Class of executed instruction +system.cpu.op_class::IntMult 772953 0.35% 61.47% # Class of executed instruction +system.cpu.op_class::IntDiv 7031501 3.18% 64.64% # Class of executed instruction +system.cpu.op_class::FloatAdd 1105073 0.50% 65.14% # Class of executed instruction system.cpu.op_class::FloatCmp 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatCvt 0 0.00% 65.14% # Class of executed instruction system.cpu.op_class::FloatMult 0 0.00% 65.14% # Class of executed instruction |