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-rw-r--r--tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt16
1 files changed, 8 insertions, 8 deletions
diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
index 752b7fee0..d48699882 100644
--- a/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
@@ -1,13 +1,13 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 53768 # Simulator instruction rate (inst/s)
-host_mem_usage 213396 # Number of bytes of host memory used
-host_seconds 0.12 # Real time elapsed on the host
-host_tick_rate 2308748 # Simulator tick rate (ticks/s)
+host_inst_rate 23386 # Simulator instruction rate (inst/s)
+host_mem_usage 227472 # Number of bytes of host memory used
+host_seconds 0.27 # Real time elapsed on the host
+host_tick_rate 1019507 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_insts 6404 # Number of instructions simulated
-sim_seconds 0.000275 # Number of seconds simulated
-sim_ticks 275313 # Number of ticks simulated
+sim_seconds 0.000279 # Number of seconds simulated
+sim_ticks 279353 # Number of ticks simulated
system.cpu.dtb.data_accesses 2060 # DTB accesses
system.cpu.dtb.data_acv 0 # DTB access violations
system.cpu.dtb.data_hits 2050 # DTB hits
@@ -42,10 +42,10 @@ system.cpu.itb.write_acv 0 # DT
system.cpu.itb.write_hits 0 # DTB write hits
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.numCycles 275313 # number of cpu cycles simulated
+system.cpu.numCycles 279353 # number of cpu cycles simulated
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.num_busy_cycles 275313 # Number of busy cycles
+system.cpu.num_busy_cycles 279353 # Number of busy cycles
system.cpu.num_conditional_control_insts 750 # number of instructions that are conditional controls
system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses
system.cpu.num_fp_insts 10 # number of float instructions