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Diffstat (limited to 'tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini')
-rw-r--r--tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini14
1 files changed, 12 insertions, 2 deletions
diff --git a/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini b/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
index c95e2e383..78fe6c01f 100644
--- a/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini
@@ -11,12 +11,14 @@ physmem=system.physmem
[system.cpu]
type=TimingSimpleCPU
-children=dcache icache l2cache toL2Bus tracer workload
+children=dcache dtb icache itb l2cache toL2Bus tracer workload
clock=500
cpu_id=0
defer_registration=false
+dtb=system.cpu.dtb
function_trace=false
function_trace_start=0
+itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
@@ -65,6 +67,10 @@ write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.port[1]
+[system.cpu.dtb]
+type=AlphaDTB
+size=64
+
[system.cpu.icache]
type=BaseCache
addr_range=0:18446744073709551615
@@ -101,6 +107,10 @@ write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.port[0]
+[system.cpu.itb]
+type=AlphaITB
+size=48
+
[system.cpu.l2cache]
type=BaseCache
addr_range=0:18446744073709551615
@@ -156,7 +166,7 @@ cwd=
egid=100
env=
euid=100
-executable=tests/test-progs/hello/bin/alpha/linux/hello
+executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello
gid=100
input=cin
output=cout