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Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini')
-rw-r--r--tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini8
1 files changed, 5 insertions, 3 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
index c7e464eb4..f0e8b9ebf 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini
@@ -10,6 +10,7 @@ type=System
children=cpu membus physmem
mem_mode=atomic
memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -18,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=DerivO3CPU
@@ -477,7 +479,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[1]
+mem_side=system.membus.port[2]
[system.cpu.toL2Bus]
type=Bus
@@ -519,7 +521,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.l2cache.mem_side
+port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
[system.physmem]
type=PhysicalMemory
@@ -529,5 +531,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]