diff options
Diffstat (limited to 'tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt')
-rw-r--r-- | tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt index 4b2eade71..220cf8ff6 100644 --- a/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 53715 # Simulator instruction rate (inst/s) -host_mem_usage 201548 # Number of bytes of host memory used -host_seconds 0.04 # Real time elapsed on the host -host_tick_rate 160751052 # Simulator tick rate (ticks/s) +host_inst_rate 72174 # Simulator instruction rate (inst/s) +host_mem_usage 203356 # Number of bytes of host memory used +host_seconds 0.03 # Real time elapsed on the host +host_tick_rate 215783466 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 2387 # Number of instructions simulated sim_seconds 0.000007 # Number of seconds simulated @@ -19,10 +19,10 @@ system.cpu.BPredUnit.usedRAS 165 # Nu system.cpu.commit.COM:branches 396 # Number of branches committed system.cpu.commit.COM:bw_lim_events 38 # number cycles where commit BW limit reached system.cpu.commit.COM:bw_limited 0 # number of insts not committed due to BW limits -system.cpu.commit.COM:committed_per_cycle::samples 6196 +system.cpu.commit.COM:committed_per_cycle::samples 6197 system.cpu.commit.COM:committed_per_cycle::min_value 0 system.cpu.commit.COM:committed_per_cycle::underflows 0 0.00% -system.cpu.commit.COM:committed_per_cycle::0-1 5239 84.55% +system.cpu.commit.COM:committed_per_cycle::0-1 5240 84.56% system.cpu.commit.COM:committed_per_cycle::1-2 263 4.24% system.cpu.commit.COM:committed_per_cycle::2-3 334 5.39% system.cpu.commit.COM:committed_per_cycle::3-4 134 2.16% @@ -32,10 +32,10 @@ system.cpu.commit.COM:committed_per_cycle::6-7 32 0.52% system.cpu.commit.COM:committed_per_cycle::7-8 20 0.32% system.cpu.commit.COM:committed_per_cycle::8 38 0.61% system.cpu.commit.COM:committed_per_cycle::overflows 0 0.00% -system.cpu.commit.COM:committed_per_cycle::total 6196 +system.cpu.commit.COM:committed_per_cycle::total 6197 system.cpu.commit.COM:committed_per_cycle::max_value 8 -system.cpu.commit.COM:committed_per_cycle::mean 0.415752 -system.cpu.commit.COM:committed_per_cycle::stdev 1.208059 +system.cpu.commit.COM:committed_per_cycle::mean 0.415685 +system.cpu.commit.COM:committed_per_cycle::stdev 1.207973 system.cpu.commit.COM:count 2576 # Number of instructions committed system.cpu.commit.COM:loads 415 # Number of loads committed system.cpu.commit.COM:membars 0 # Number of memory barriers committed @@ -144,7 +144,7 @@ system.cpu.fetch.CacheLines 747 # Nu system.cpu.fetch.Cycles 1709 # Number of cycles fetch has run and was not squashing or blocked system.cpu.fetch.IcacheSquashes 115 # Number of outstanding Icache misses that were squashed system.cpu.fetch.Insts 5393 # Number of instructions fetch has processed -system.cpu.fetch.SquashCycles 240 # Number of cycles fetch has spent squashing +system.cpu.fetch.SquashCycles 239 # Number of cycles fetch has spent squashing system.cpu.fetch.branchRate 0.059790 # Number of branch fetches per cycle system.cpu.fetch.icacheStallCycles 747 # Number of cycles fetch is stalled on an Icache miss system.cpu.fetch.predictedBranches 363 # Number of branches that fetch has predicted taken |