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-rw-r--r--tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini14
-rw-r--r--tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats26
-rwxr-xr-xtests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout8
-rw-r--r--tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt26
4 files changed, 50 insertions, 24 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
index a4ed53868..b7bfb0aae 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
@@ -1,13 +1,22 @@
[root]
type=Root
children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000
+time_sync_spin_threshold=100000
[system]
type=System
children=cpu dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby
mem_mode=timing
physmem=system.physmem
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
[system.cpu]
type=TimingSimpleCPU
@@ -54,7 +63,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=tests/test-progs/hello/bin/alpha/tru64/hello
+executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/alpha/tru64/hello
gid=100
input=cin
max_stack_size=67108864
@@ -186,6 +195,7 @@ tracer=system.ruby.tracer
[system.ruby.cpu_ruby_ports]
type=RubySequencer
+access_phys_mem=true
dcache=system.l1_cntrl0.L1DcacheMemory
deadlock_threshold=500000
icache=system.l1_cntrl0.L1IcacheMemory
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
index 4efa8de79..027313a2c 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
@@ -34,27 +34,27 @@ periodic_stats_period: 1000000
================ End RubySystem Configuration Print ================
-Real time: Jan/13/2011 22:36:30
+Real time: Feb/06/2011 20:42:15
Profiler Stats
--------------
-Elapsed_time_in_seconds: 2
-Elapsed_time_in_minutes: 0.0333333
-Elapsed_time_in_hours: 0.000555556
-Elapsed_time_in_days: 2.31481e-05
+Elapsed_time_in_seconds: 0
+Elapsed_time_in_minutes: 0
+Elapsed_time_in_hours: 0
+Elapsed_time_in_days: 0
-Virtual_time_in_seconds: 0.79
-Virtual_time_in_minutes: 0.0131667
-Virtual_time_in_hours: 0.000219444
-Virtual_time_in_days: 9.14352e-06
+Virtual_time_in_seconds: 0.37
+Virtual_time_in_minutes: 0.00616667
+Virtual_time_in_hours: 0.000102778
+Virtual_time_in_days: 4.28241e-06
Ruby_current_time: 103637
Ruby_start_time: 0
Ruby_cycles: 103637
-mbytes_resident: 20.9219
-mbytes_total: 156.062
-resident_ratio: 0.134111
+mbytes_resident: 35.7305
+mbytes_total: 209.473
+resident_ratio: 0.170611
ruby_cycles_executed: [ 103638 ]
@@ -119,7 +119,7 @@ Resource Usage
page_size: 4096
user_time: 0
system_time: 0
-page_reclaims: 6028
+page_reclaims: 10361
page_faults: 0
swaps: 0
block_inputs: 0
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
index 5c8b35b72..be2d10449 100755
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Jan 13 2011 22:36:25
-M5 revision 81b32f1a8f29 7836 default MESI_CMP_update_ref.patch qtip tip
-M5 started Jan 13 2011 22:36:28
-M5 executing on scamorza.cs.wisc.edu
+M5 compiled Feb 6 2011 15:12:58
+M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates
+M5 started Feb 6 2011 20:42:15
+M5 executing on SC2B0617
command line: build/ALPHA_SE_MESI_CMP_directory/m5.fast -d build/ALPHA_SE_MESI_CMP_directory/tests/fast/quick/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_SE_MESI_CMP_directory/tests/fast/quick/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
index 5b40ee1fb..25c8ba580 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2534 # Simulator instruction rate (inst/s)
-host_mem_usage 159812 # Number of bytes of host memory used
-host_seconds 1.02 # Real time elapsed on the host
-host_tick_rate 101843 # Simulator tick rate (ticks/s)
+host_inst_rate 29262 # Simulator instruction rate (inst/s)
+host_mem_usage 214504 # Number of bytes of host memory used
+host_seconds 0.09 # Real time elapsed on the host
+host_tick_rate 1174597 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
sim_insts 2577 # Number of instructions simulated
sim_seconds 0.000104 # Number of seconds simulated
@@ -43,8 +43,24 @@ system.cpu.itb.write_hits 0 # DT
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 103637 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 103637 # Number of busy cycles
+system.cpu.num_conditional_control_insts 238 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 6 # Number of float alu accesses
+system.cpu.num_fp_insts 6 # number of float instructions
+system.cpu.num_fp_register_reads 6 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu.num_func_calls 140 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 2577 # Number of instructions executed
-system.cpu.num_refs 717 # Number of memory references
+system.cpu.num_int_alu_accesses 2375 # Number of integer alu accesses
+system.cpu.num_int_insts 2375 # number of integer instructions
+system.cpu.num_int_register_reads 2998 # number of times the integer registers were read
+system.cpu.num_int_register_writes 1768 # number of times the integer registers were written
+system.cpu.num_load_insts 419 # Number of load instructions
+system.cpu.num_mem_refs 717 # number of memory refs
+system.cpu.num_store_insts 298 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 4 # Number of system calls
---------- End Simulation Statistics ----------