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-rw-r--r--tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt10
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt
index 942cc1b79..60bfb7de8 100644
--- a/tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt
+++ b/tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 123219 # Simulator instruction rate (inst/s)
-host_mem_usage 178996 # Number of bytes of host memory used
-host_seconds 0.02 # Real time elapsed on the host
-host_tick_rate 443932267 # Simulator tick rate (ticks/s)
+host_inst_rate 178240 # Simulator instruction rate (inst/s)
+host_mem_usage 195696 # Number of bytes of host memory used
+host_seconds 0.01 # Real time elapsed on the host
+host_tick_rate 641473527 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 2577 # Number of instructions simulated
sim_seconds 0.000009 # Number of seconds simulated
@@ -239,7 +239,7 @@ system.cpu.l2cache.total_refs 0 # To
system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.writebacks 0 # number of writebacks
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
-system.cpu.numCycles 9438000 # number of cpu cycles simulated
+system.cpu.numCycles 18876 # number of cpu cycles simulated
system.cpu.num_insts 2577 # Number of instructions executed
system.cpu.num_refs 717 # Number of memory references
system.cpu.workload.PROG:num_syscalls 4 # Number of system calls