summaryrefslogtreecommitdiff
path: root/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini')
-rw-r--r--tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini12
1 files changed, 3 insertions, 9 deletions
diff --git a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
index 766c4f486..5d677c743 100644
--- a/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
+++ b/tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini
@@ -11,7 +11,7 @@ physmem=system.physmem
[system.cpu]
type=AtomicSimpleCPU
-children=dtb itb tlb tracer workload
+children=dtb itb tracer workload
CP0_Config=0
CP0_Config1=0
CP0_Config1_C2=false
@@ -66,7 +66,6 @@ CP0_PerfCtr_M=false
CP0_PerfCtr_W=false
CP0_SrsCtl_HSS=0
CP0_WatchHi_M=false
-UnifiedTLB=true
checker=Null
clock=500
cpu_id=0
@@ -87,7 +86,6 @@ progress_interval=0
simulate_data_stalls=false
simulate_inst_stalls=false
system=system
-tlb=system.cpu.tlb
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
@@ -95,15 +93,11 @@ dcache_port=system.membus.port[2]
icache_port=system.membus.port[1]
[system.cpu.dtb]
-type=MipsDTB
+type=MipsTLB
size=64
[system.cpu.itb]
-type=MipsITB
-size=64
-
-[system.cpu.tlb]
-type=MipsUTB
+type=MipsTLB
size=64
[system.cpu.tracer]