summaryrefslogtreecommitdiff
path: root/tests/quick/00.hello/ref/x86/linux/o3-timing/simerr
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/00.hello/ref/x86/linux/o3-timing/simerr')
-rwxr-xr-xtests/quick/00.hello/ref/x86/linux/o3-timing/simerr16
1 files changed, 7 insertions, 9 deletions
diff --git a/tests/quick/00.hello/ref/x86/linux/o3-timing/simerr b/tests/quick/00.hello/ref/x86/linux/o3-timing/simerr
index 562787dcb..94d399eab 100755
--- a/tests/quick/00.hello/ref/x86/linux/o3-timing/simerr
+++ b/tests/quick/00.hello/ref/x86/linux/o3-timing/simerr
@@ -1,9 +1,7 @@
-Traceback (most recent call last):
- File "<string>", line 1, in <module>
- File "/proj/radl_extra/users/bbeckman/noc_m5/src/python/m5/main.py", line 359, in main
- exec filecode in scope
- File "tests/run.py", line 70, in <module>
- execfile(joinpath(tests_root, 'configs', test_filename + '.py'))
- File "tests/configs/o3-timing.py", line 40, in <module>
- cpu = DerivO3CPU(cpu_id=0)
-NameError: name 'DerivO3CPU' is not defined
+warn: Sockets disabled, not accepting gdb connections
+For more information see: http://www.m5sim.org/warn/d946bea6
+warn: instruction 'fnstcw_Mw' unimplemented
+For more information see: http://www.m5sim.org/warn/437d5238
+warn: instruction 'fldcw_Mw' unimplemented
+For more information see: http://www.m5sim.org/warn/437d5238
+hack: be nice to actually delete the event here