diff options
Diffstat (limited to 'tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt')
| -rw-r--r-- | tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt b/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt index 0a112c922..182e72d25 100644 --- a/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt +++ b/tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 48300 # Simulator instruction rate (inst/s) -host_mem_usage 226820 # Number of bytes of host memory used -host_seconds 0.20 # Real time elapsed on the host -host_tick_rate 67673766 # Simulator tick rate (ticks/s) +host_inst_rate 47133 # Simulator instruction rate (inst/s) +host_mem_usage 227692 # Number of bytes of host memory used +host_seconds 0.21 # Real time elapsed on the host +host_tick_rate 66053082 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 9809 # Number of instructions simulated sim_seconds 0.000014 # Number of seconds simulated @@ -37,6 +37,9 @@ system.cpu.commit.COM:committed_per_cycle::min_value 0 system.cpu.commit.COM:committed_per_cycle::max_value 8 # Number of insts commited each cycle system.cpu.commit.COM:committed_per_cycle::total 15124 # Number of insts commited each cycle system.cpu.commit.COM:count 9809 # Number of instructions committed +system.cpu.commit.COM:fp_insts 0 # Number of committed floating point instructions. +system.cpu.commit.COM:function_calls 0 # Number of function calls committed. +system.cpu.commit.COM:int_insts 9714 # Number of committed integer instructions. system.cpu.commit.COM:loads 1056 # Number of loads committed system.cpu.commit.COM:membars 0 # Number of memory barriers committed system.cpu.commit.COM:refs 1990 # Number of memory references committed @@ -150,6 +153,7 @@ system.cpu.fetch.rateDist::overflows 0 0.00% 100.00% # Nu system.cpu.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total) system.cpu.fetch.rateDist::total 15845 # Number of instructions fetched each cycle (Total) +system.cpu.fp_regfile_reads 2 # number of floating regfile reads system.cpu.icache.ReadReq_accesses 1255 # number of ReadReq accesses(hits+misses) system.cpu.icache.ReadReq_avg_miss_latency 37417.543860 # average ReadReq miss latency system.cpu.icache.ReadReq_avg_mshr_miss_latency 35040.697674 # average ReadReq mshr miss latency @@ -249,6 +253,8 @@ system.cpu.iew.lsq.thread.0.squashedStores 304 # system.cpu.iew.memOrderViolationEvents 7 # Number of memory order violations system.cpu.iew.predictedNotTakenIncorrect 390 # Number of branches that were predicted not taken incorrectly system.cpu.iew.predictedTakenIncorrect 97 # Number of branches that were predicted taken incorrectly +system.cpu.int_regfile_reads 25083 # number of integer regfile reads +system.cpu.int_regfile_writes 11189 # number of integer regfile writes system.cpu.ipc 0.356263 # IPC: Instructions Per Cycle system.cpu.ipc_total 0.356263 # IPC: Total IPC of All Threads system.cpu.iq.ISSUE:FU_type_0::No_OpClass 3 0.02% 0.02% # Type of FU issued @@ -340,6 +346,14 @@ system.cpu.iq.ISSUE:issued_per_cycle::min_value 0 system.cpu.iq.ISSUE:issued_per_cycle::max_value 6 # Number of insts issued each cycle system.cpu.iq.ISSUE:issued_per_cycle::total 15845 # Number of insts issued each cycle system.cpu.iq.ISSUE:rate 0.454146 # Inst issue rate +system.cpu.iq.fp_alu_accesses 4 # Number of floating point alu accesses +system.cpu.iq.fp_inst_queue_reads 8 # Number of floating instruction queue reads +system.cpu.iq.fp_inst_queue_wakeup_accesses 2 # Number of floating instruction queue wakeup accesses +system.cpu.iq.fp_inst_queue_writes 8 # Number of floating instruction queue writes +system.cpu.iq.int_alu_accesses 12501 # Number of integer alu accesses +system.cpu.iq.int_inst_queue_reads 40849 # Number of integer instruction queue reads +system.cpu.iq.int_inst_queue_wakeup_accesses 11816 # Number of integer instruction queue wakeup accesses +system.cpu.iq.int_inst_queue_writes 16975 # Number of integer instruction queue writes system.cpu.iq.iqInstsAdded 13618 # Number of instructions added to the IQ (excludes non-spec) system.cpu.iq.iqInstsIssued 12504 # Number of instructions issued system.cpu.iq.iqNonSpecInstsAdded 17 # Number of non-speculative instructions added to the IQ @@ -414,7 +428,10 @@ system.cpu.memDep0.conflictingLoads 4 # Nu system.cpu.memDep0.conflictingStores 0 # Number of conflicting stores. system.cpu.memDep0.insertedLoads 1535 # Number of loads inserted to the mem dependence unit. system.cpu.memDep0.insertedStores 1238 # Number of stores inserted to the mem dependence unit. +system.cpu.misc_regfile_reads 5334 # number of misc regfile reads system.cpu.numCycles 27533 # number of cpu cycles simulated +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.rename.RENAME:BlockCycles 105 # Number of cycles rename is blocking system.cpu.rename.RENAME:CommittedMaps 9368 # Number of HB maps that are committed system.cpu.rename.RENAME:IQFullEvents 6 # Number of times rename has blocked due to IQ full @@ -427,10 +444,14 @@ system.cpu.rename.RENAME:RunCycles 8027 # Nu system.cpu.rename.RENAME:SquashCycles 721 # Number of cycles rename is squashing system.cpu.rename.RENAME:UnblockCycles 108 # Number of cycles rename is unblocking system.cpu.rename.RENAME:UndoneMaps 4419 # Number of HB maps that are undone due to squashing +system.cpu.rename.RENAME:fp_rename_lookups 16 # Number of floating rename lookups +system.cpu.rename.RENAME:int_rename_lookups 38648 # Number of integer rename lookups system.cpu.rename.RENAME:serializeStallCycles 281 # count of cycles rename stalled for serializing inst system.cpu.rename.RENAME:serializingInsts 20 # count of serializing insts renamed system.cpu.rename.RENAME:skidInsts 169 # count of insts added to the skid buffer system.cpu.rename.RENAME:tempSerializingInsts 17 # count of temporary serializing insts renamed +system.cpu.rob.rob_reads 28728 # The number of ROB reads +system.cpu.rob.rob_writes 28005 # The number of ROB writes system.cpu.timesIdled 208 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu.workload.PROG:num_syscalls 11 # Number of system calls |