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-rw-r--r--tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini11
-rwxr-xr-xtests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr1
-rwxr-xr-xtests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout16
-rw-r--r--tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt19
4 files changed, 28 insertions, 19 deletions
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
index 15ddd6551..421dd8a46 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini
@@ -9,6 +9,8 @@ time_sync_spin_threshold=100000000
type=System
children=cpu membus physmem
mem_mode=atomic
+memories=system.physmem
+num_work_ids=16
physmem=system.physmem
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
@@ -17,6 +19,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
+system_port=system.membus.port[0]
[system.cpu]
type=AtomicSimpleCPU
@@ -44,8 +47,8 @@ system=system
tracer=system.cpu.tracer
width=1
workload=system.cpu.workload
-dcache_port=system.membus.port[2]
-icache_port=system.membus.port[1]
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
[system.cpu.dtb]
type=SparcTLB
@@ -85,7 +88,7 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
+port=system.system_port system.physmem.port[0] system.cpu.icache_port system.cpu.dcache_port
[system.physmem]
type=PhysicalMemory
@@ -95,5 +98,5 @@ latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[0]
+port=system.membus.port[1]
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
index eabe42249..e45cd058f 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr
@@ -1,3 +1,2 @@
warn: Sockets disabled, not accepting gdb connections
-For more information see: http://www.m5sim.org/warn/d946bea6
hack: be nice to actually delete the event here
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
index c90052363..df7964c68 100755
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout
@@ -1,14 +1,10 @@
-M5 Simulator System
+gem5 Simulator System. http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
-Copyright (c) 2001-2008
-The Regents of The University of Michigan
-All Rights Reserved
-
-
-M5 compiled Apr 19 2011 12:19:46
-M5 started Apr 19 2011 12:21:33
-M5 executing on maize
-command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic
+gem5 compiled Jan 23 2012 04:02:00
+gem5 started Jan 23 2012 04:24:24
+gem5 executing on zizzer
+command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/opt/quick/02.insttest/sparc/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
Begining test of difficult SPARC instructions...
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
index 070242574..389636d62 100644
--- a/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
@@ -2,12 +2,23 @@
---------- Begin Simulation Statistics ----------
sim_seconds 0.000008 # Number of seconds simulated
sim_ticks 7618500 # Number of ticks simulated
+final_tick 7618500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 391175 # Simulator instruction rate (inst/s)
-host_tick_rate 196252250 # Simulator tick rate (ticks/s)
-host_mem_usage 216204 # Number of bytes of host memory used
-host_seconds 0.04 # Real time elapsed on the host
+host_inst_rate 296178 # Simulator instruction rate (inst/s)
+host_tick_rate 148615294 # Simulator tick rate (ticks/s)
+host_mem_usage 203776 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 15175 # Number of instructions simulated
+system.physmem.bytes_read 72223 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 60880 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 9042 # Number of bytes written to this memory
+system.physmem.num_reads 17446 # Number of read requests responded to by this memory
+system.physmem.num_writes 1442 # Number of write requests responded to by this memory
+system.physmem.num_other 6 # Number of other requests responded to by this memory
+system.physmem.bw_read 9479950121 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 7991074358 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 1186847805 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 10666797926 # Total bandwidth to/from this memory (bytes/s)
system.cpu.workload.num_syscalls 18 # Number of system calls
system.cpu.numCycles 15238 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started