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-rwxr-xr-xtests/quick/02.insttest/ref/sparc/linux/simple-timing/simout27
1 files changed, 27 insertions, 0 deletions
diff --git a/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout
new file mode 100755
index 000000000..796520389
--- /dev/null
+++ b/tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout
@@ -0,0 +1,27 @@
+M5 Simulator System
+
+Copyright (c) 2001-2008
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Nov 5 2008 22:40:47
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov 5 2008 22:43:56
+M5 executing on zizzer
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-timing -re --stdout-file stdout --stderr-file stderr tests/run.py quick/02.insttest/sparc/linux/simple-timing
+Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0. Starting simulation...
+Begining test of difficult SPARC instructions...
+LDSTUB: Passed
+SWAP: Passed
+CAS FAIL: Passed
+CAS WORK: Passed
+CASX FAIL: Passed
+CASX WORK: Passed
+LDTX: Passed
+LDTW: Passed
+STTW: Passed
+Done
+Exiting @ tick 42735000 because target called exit()