diff options
Diffstat (limited to 'tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt')
| -rw-r--r-- | tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt b/tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt index 8b571b3ea..5e1d5b2a8 100644 --- a/tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt +++ b/tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1546136 # Simulator instruction rate (inst/s) -host_mem_usage 364716 # Number of bytes of host memory used -host_seconds 170.97 # Real time elapsed on the host -host_tick_rate 30388572127 # Simulator tick rate (ticks/s) +host_inst_rate 2432424 # Simulator instruction rate (inst/s) +host_mem_usage 346476 # Number of bytes of host memory used +host_seconds 108.67 # Real time elapsed on the host +host_tick_rate 47808116930 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 264339287 # Number of instructions simulated sim_seconds 5.195470 # Number of seconds simulated @@ -80,8 +80,8 @@ system.cpu.dcache.demand_mshr_misses 1626168 # nu system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.occ_%::0 0.999995 # Average percentage of cache occupancy system.cpu.dcache.occ_blocks::0 511.997312 # Average occupied blocks per context +system.cpu.dcache.occ_percent::0 0.999995 # Average percentage of cache occupancy system.cpu.dcache.overall_accesses::0 21635359 # number of overall (read+write) accesses system.cpu.dcache.overall_accesses::1 0 # number of overall (read+write) accesses system.cpu.dcache.overall_accesses::total 21635359 # number of overall (read+write) accesses @@ -166,8 +166,8 @@ system.cpu.dtb_walker_cache.demand_mshr_misses 8896 system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed system.cpu.dtb_walker_cache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dtb_walker_cache.occ_%::1 0.315775 # Average percentage of cache occupancy system.cpu.dtb_walker_cache.occ_blocks::1 5.052403 # Average occupied blocks per context +system.cpu.dtb_walker_cache.occ_percent::1 0.315775 # Average percentage of cache occupancy system.cpu.dtb_walker_cache.overall_accesses::0 0 # number of overall (read+write) accesses system.cpu.dtb_walker_cache.overall_accesses::1 21947 # number of overall (read+write) accesses system.cpu.dtb_walker_cache.overall_accesses::total 21947 # number of overall (read+write) accesses @@ -252,8 +252,8 @@ system.cpu.icache.demand_mshr_misses 788658 # nu system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.icache.occ_%::0 0.996799 # Average percentage of cache occupancy system.cpu.icache.occ_blocks::0 510.361283 # Average occupied blocks per context +system.cpu.icache.occ_percent::0 0.996799 # Average percentage of cache occupancy system.cpu.icache.overall_accesses::0 159222590 # number of overall (read+write) accesses system.cpu.icache.overall_accesses::1 0 # number of overall (read+write) accesses system.cpu.icache.overall_accesses::total 159222590 # number of overall (read+write) accesses @@ -343,8 +343,8 @@ system.cpu.itb_walker_cache.demand_mshr_misses 4602 system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed system.cpu.itb_walker_cache.mshr_cap_events 0 # number of times MSHR cap was activated system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.itb_walker_cache.occ_%::1 0.191913 # Average percentage of cache occupancy system.cpu.itb_walker_cache.occ_blocks::1 3.070606 # Average occupied blocks per context +system.cpu.itb_walker_cache.occ_percent::1 0.191913 # Average percentage of cache occupancy system.cpu.itb_walker_cache.overall_accesses::0 0 # number of overall (read+write) accesses system.cpu.itb_walker_cache.overall_accesses::1 12223 # number of overall (read+write) accesses system.cpu.itb_walker_cache.overall_accesses::total 12223 # number of overall (read+write) accesses @@ -464,8 +464,8 @@ system.iocache.demand_mshr_misses 47564 # nu system.iocache.fast_writes 0 # number of fast writes performed system.iocache.mshr_cap_events 0 # number of times MSHR cap was activated system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate -system.iocache.occ_%::1 0.007537 # Average percentage of cache occupancy system.iocache.occ_blocks::1 0.120586 # Average occupied blocks per context +system.iocache.occ_percent::1 0.007537 # Average percentage of cache occupancy system.iocache.overall_accesses::0 0 # number of overall (read+write) accesses system.iocache.overall_accesses::1 47564 # number of overall (read+write) accesses system.iocache.overall_accesses::total 47564 # number of overall (read+write) accesses @@ -597,10 +597,10 @@ system.l2c.demand_mshr_misses 170998 # nu system.l2c.fast_writes 0 # number of fast writes performed system.l2c.mshr_cap_events 0 # number of times MSHR cap was activated system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate -system.l2c.occ_%::0 0.120711 # Average percentage of cache occupancy -system.l2c.occ_%::1 0.358261 # Average percentage of cache occupancy system.l2c.occ_blocks::0 7910.895776 # Average occupied blocks per context system.l2c.occ_blocks::1 23478.999694 # Average occupied blocks per context +system.l2c.occ_percent::0 0.120711 # Average percentage of cache occupancy +system.l2c.occ_percent::1 0.358261 # Average percentage of cache occupancy system.l2c.overall_accesses::0 2411815 # number of overall (read+write) accesses system.l2c.overall_accesses::1 9584 # number of overall (read+write) accesses system.l2c.overall_accesses::total 2421399 # number of overall (read+write) accesses |