summaryrefslogtreecommitdiff
path: root/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr')
-rwxr-xr-xtests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr18
1 files changed, 9 insertions, 9 deletions
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr
index 9c12ebd20..47fb3b40c 100755
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr
@@ -1,9 +1,9 @@
-Traceback (most recent call last):
- File "<string>", line 1, in <module>
- File "/arm/scratch/alisai01/m5/src/python/m5/main.py", line 359, in main
- exec filecode in scope
- File "tests/run.py", line 78, in <module>
- execfile(joinpath(tests_root, category, name, 'test.py'))
- File "tests/quick/20.eio-short/test.py", line 29, in <module>
- root.system.cpu.workload = EioProcess(file = binpath('anagram',
-NameError: name 'EioProcess' is not defined
+warn: Sockets disabled, not accepting gdb connections
+For more information see: http://www.m5sim.org/warn/d946bea6
+warn: Prefetch instrutions is Alpha do not do anything
+For more information see: http://www.m5sim.org/warn/3e0eccba
+warn: Prefetch instrutions is Alpha do not do anything
+For more information see: http://www.m5sim.org/warn/3e0eccba
+hack: be nice to actually delete the event here
+
+gzip: stdout: Broken pipe