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-rw-r--r--tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini13
-rwxr-xr-xtests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout8
-rw-r--r--tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt26
-rw-r--r--tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini13
-rwxr-xr-xtests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout8
-rw-r--r--tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt26
6 files changed, 22 insertions, 72 deletions
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
index 7fac8d69a..8b31e35e7 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
@@ -1,22 +1,13 @@
[root]
type=Root
children=system
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
+dummy=0
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
[system.cpu]
type=AtomicSimpleCPU
@@ -62,7 +53,7 @@ type=ExeTracer
type=EioProcess
chkpt=
errout=cerr
-file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
input=None
max_stack_size=67108864
output=cout
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout
index cc8a06323..d7e9fb267 100755
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 6 2011 20:42:22
-M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates
-M5 started Feb 6 2011 20:42:49
-M5 executing on SC2B0617
+M5 compiled Nov 9 2010 10:38:04
+M5 revision f4362ffd810f+ 7737+ default tip
+M5 started Nov 9 2010 22:11:58
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt
index 4af51a06c..4b1bec9b7 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2546556 # Simulator instruction rate (inst/s)
-host_mem_usage 196060 # Number of bytes of host memory used
-host_seconds 0.20 # Real time elapsed on the host
-host_tick_rate 1270042569 # Simulator tick rate (ticks/s)
+host_inst_rate 2960881 # Simulator instruction rate (inst/s)
+host_mem_usage 193980 # Number of bytes of host memory used
+host_seconds 0.17 # Real time elapsed on the host
+host_tick_rate 1478428114 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 500001 # Number of instructions simulated
sim_seconds 0.000250 # Number of seconds simulated
@@ -43,24 +43,8 @@ system.cpu.itb.write_hits 0 # DT
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 500032 # number of cpu cycles simulated
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.num_busy_cycles 500032 # Number of busy cycles
-system.cpu.num_conditional_control_insts 38180 # number of instructions that are conditional controls
-system.cpu.num_fp_alu_accesses 32 # Number of float alu accesses
-system.cpu.num_fp_insts 32 # number of float instructions
-system.cpu.num_fp_register_reads 32 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 16 # number of times the floating registers were written
-system.cpu.num_func_calls 14357 # number of times a function call or return occured
-system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 500001 # Number of instructions executed
-system.cpu.num_int_alu_accesses 474689 # Number of integer alu accesses
-system.cpu.num_int_insts 474689 # number of integer instructions
-system.cpu.num_int_register_reads 654286 # number of times the integer registers were read
-system.cpu.num_int_register_writes 371542 # number of times the integer registers were written
-system.cpu.num_load_insts 124443 # Number of load instructions
-system.cpu.num_mem_refs 180793 # number of memory refs
-system.cpu.num_store_insts 56350 # Number of store instructions
+system.cpu.num_refs 180793 # Number of memory references
system.cpu.workload.PROG:num_syscalls 18 # Number of system calls
---------- End Simulation Statistics ----------
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
index 219f2790f..380aa38da 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
@@ -1,22 +1,13 @@
[root]
type=Root
children=system
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
+dummy=0
[system]
type=System
children=cpu membus physmem
mem_mode=atomic
physmem=system.physmem
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
[system.cpu]
type=TimingSimpleCPU
@@ -162,7 +153,7 @@ type=ExeTracer
type=EioProcess
chkpt=
errout=cerr
-file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
+file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz
input=None
max_stack_size=67108864
output=cout
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout
index 9cbd81ab7..35ea05083 100755
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Feb 6 2011 20:42:22
-M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates
-M5 started Feb 6 2011 20:42:50
-M5 executing on SC2B0617
+M5 compiled Nov 9 2010 10:38:04
+M5 revision f4362ffd810f+ 7737+ default tip
+M5 started Nov 9 2010 22:11:58
+M5 executing on zizzer
command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/quick/20.eio-short/alpha/eio/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
index d511dcb3b..8d21cdbb4 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 1346028 # Simulator instruction rate (inst/s)
-host_mem_usage 203784 # Number of bytes of host memory used
-host_seconds 0.37 # Real time elapsed on the host
-host_tick_rate 1958145928 # Simulator tick rate (ticks/s)
+host_inst_rate 1193890 # Simulator instruction rate (inst/s)
+host_mem_usage 201748 # Number of bytes of host memory used
+host_seconds 0.42 # Real time elapsed on the host
+host_tick_rate 1737027103 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 500001 # Number of instructions simulated
sim_seconds 0.000728 # Number of seconds simulated
@@ -226,24 +226,8 @@ system.cpu.l2cache.warmup_cycle 0 # Cy
system.cpu.l2cache.writebacks 0 # number of writebacks
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 1455858 # number of cpu cycles simulated
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.num_busy_cycles 1455858 # Number of busy cycles
-system.cpu.num_conditional_control_insts 38180 # number of instructions that are conditional controls
-system.cpu.num_fp_alu_accesses 32 # Number of float alu accesses
-system.cpu.num_fp_insts 32 # number of float instructions
-system.cpu.num_fp_register_reads 32 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 16 # number of times the floating registers were written
-system.cpu.num_func_calls 14357 # number of times a function call or return occured
-system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 500001 # Number of instructions executed
-system.cpu.num_int_alu_accesses 474689 # Number of integer alu accesses
-system.cpu.num_int_insts 474689 # number of integer instructions
-system.cpu.num_int_register_reads 654286 # number of times the integer registers were read
-system.cpu.num_int_register_writes 371542 # number of times the integer registers were written
-system.cpu.num_load_insts 124443 # Number of load instructions
-system.cpu.num_mem_refs 180793 # number of memory refs
-system.cpu.num_store_insts 56350 # Number of store instructions
+system.cpu.num_refs 180793 # Number of memory references
system.cpu.workload.PROG:num_syscalls 18 # Number of system calls
---------- End Simulation Statistics ----------