diff options
Diffstat (limited to 'tests/quick/30.eio-mp/ref/alpha')
7 files changed, 174 insertions, 28 deletions
diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini index f95ff0355..9f134009a 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus mem_mode=atomic physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu0] type=AtomicSimpleCPU diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout index 21b8e7313..174fa89ad 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Nov 9 2010 10:38:04 -M5 revision f4362ffd810f+ 7737+ default tip -M5 started Nov 9 2010 22:11:58 -M5 executing on zizzer +M5 compiled Feb 7 2011 01:47:18 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:47:48 +M5 executing on burrito command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-atomic-mp -re tests/run.py build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-atomic-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt index 81431004c..9f848a332 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 2770469 # Simulator instruction rate (inst/s) -host_mem_usage 1126824 # Number of bytes of host memory used -host_seconds 0.72 # Real time elapsed on the host -host_tick_rate 346193150 # Simulator tick rate (ticks/s) +host_inst_rate 1366260 # Simulator instruction rate (inst/s) +host_mem_usage 1147168 # Number of bytes of host memory used +host_seconds 1.46 # Real time elapsed on the host +host_tick_rate 170760827 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 2000004 # Number of instructions simulated sim_seconds 0.000250 # Number of seconds simulated @@ -145,8 +145,24 @@ system.cpu0.itb.write_hits 0 # DT system.cpu0.itb.write_misses 0 # DTB write misses system.cpu0.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu0.numCycles 500032 # number of cpu cycles simulated +system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu0.num_busy_cycles 500032 # Number of busy cycles +system.cpu0.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu0.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu0.num_fp_insts 32 # number of float instructions +system.cpu0.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu0.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu0.num_func_calls 14357 # number of times a function call or return occured +system.cpu0.num_idle_cycles 0 # Number of idle cycles system.cpu0.num_insts 500001 # Number of instructions executed -system.cpu0.num_refs 180793 # Number of memory references +system.cpu0.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu0.num_int_insts 474689 # number of integer instructions +system.cpu0.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu0.num_int_register_writes 371542 # number of times the integer registers were written +system.cpu0.num_load_insts 124443 # Number of load instructions +system.cpu0.num_mem_refs 180793 # number of memory refs +system.cpu0.num_store_insts 56350 # Number of store instructions system.cpu0.workload.PROG:num_syscalls 18 # Number of system calls system.cpu1.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu1.dcache.ReadReq_hits 124111 # number of ReadReq hits @@ -285,8 +301,24 @@ system.cpu1.itb.write_hits 0 # DT system.cpu1.itb.write_misses 0 # DTB write misses system.cpu1.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu1.numCycles 500032 # number of cpu cycles simulated +system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu1.num_busy_cycles 500032 # Number of busy cycles +system.cpu1.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu1.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu1.num_fp_insts 32 # number of float instructions +system.cpu1.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu1.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu1.num_func_calls 14357 # number of times a function call or return occured +system.cpu1.num_idle_cycles 0 # Number of idle cycles system.cpu1.num_insts 500001 # Number of instructions executed -system.cpu1.num_refs 180793 # Number of memory references +system.cpu1.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu1.num_int_insts 474689 # number of integer instructions +system.cpu1.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu1.num_int_register_writes 371542 # number of times the integer registers were written +system.cpu1.num_load_insts 124443 # Number of load instructions +system.cpu1.num_mem_refs 180793 # number of memory refs +system.cpu1.num_store_insts 56350 # Number of store instructions system.cpu1.workload.PROG:num_syscalls 18 # Number of system calls system.cpu2.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu2.dcache.ReadReq_hits 124111 # number of ReadReq hits @@ -425,8 +457,24 @@ system.cpu2.itb.write_hits 0 # DT system.cpu2.itb.write_misses 0 # DTB write misses system.cpu2.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu2.numCycles 500032 # number of cpu cycles simulated +system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu2.num_busy_cycles 500032 # Number of busy cycles +system.cpu2.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu2.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu2.num_fp_insts 32 # number of float instructions +system.cpu2.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu2.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu2.num_func_calls 14357 # number of times a function call or return occured +system.cpu2.num_idle_cycles 0 # Number of idle cycles system.cpu2.num_insts 500001 # Number of instructions executed -system.cpu2.num_refs 180793 # Number of memory references +system.cpu2.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu2.num_int_insts 474689 # number of integer instructions +system.cpu2.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu2.num_int_register_writes 371542 # number of times the integer registers were written +system.cpu2.num_load_insts 124443 # Number of load instructions +system.cpu2.num_mem_refs 180793 # number of memory refs +system.cpu2.num_store_insts 56350 # Number of store instructions system.cpu2.workload.PROG:num_syscalls 18 # Number of system calls system.cpu3.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu3.dcache.ReadReq_hits 124111 # number of ReadReq hits @@ -565,8 +613,24 @@ system.cpu3.itb.write_hits 0 # DT system.cpu3.itb.write_misses 0 # DTB write misses system.cpu3.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu3.numCycles 500032 # number of cpu cycles simulated +system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu3.num_busy_cycles 500032 # Number of busy cycles +system.cpu3.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu3.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu3.num_fp_insts 32 # number of float instructions +system.cpu3.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu3.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu3.num_func_calls 14357 # number of times a function call or return occured +system.cpu3.num_idle_cycles 0 # Number of idle cycles system.cpu3.num_insts 500001 # Number of instructions executed -system.cpu3.num_refs 180793 # Number of memory references +system.cpu3.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu3.num_int_insts 474689 # number of integer instructions +system.cpu3.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu3.num_int_register_writes 371542 # number of times the integer registers were written +system.cpu3.num_load_insts 124443 # Number of load instructions +system.cpu3.num_mem_refs 180793 # number of memory refs +system.cpu3.num_store_insts 56350 # Number of store instructions system.cpu3.workload.PROG:num_syscalls 18 # Number of system calls system.l2c.ReadExReq_accesses::0 139 # number of ReadExReq accesses(hits+misses) system.l2c.ReadExReq_accesses::1 139 # number of ReadExReq accesses(hits+misses) diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini index a23113a37..9ec264236 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini @@ -1,13 +1,22 @@ [root] type=Root children=system -dummy=0 +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 [system] type=System children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus mem_mode=timing physmem=system.physmem +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 [system.cpu0] type=TimingSimpleCPU diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr index 98d9eda34..fa3024167 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr @@ -8,8 +8,8 @@ hack: be nice to actually delete the event here gzip: stdout: Broken pipe +gzip: gzip: stdout: Broken pipe - -gzip: stdout: Broken pipe +stdout: Broken pipe gzip: stdout: Broken pipe diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout index 09966aa49..af5204214 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Nov 9 2010 10:38:04 -M5 revision f4362ffd810f+ 7737+ default tip -M5 started Nov 9 2010 22:11:58 -M5 executing on zizzer +M5 compiled Feb 7 2011 01:47:18 +M5 revision 4b4b02c5553c 7929 default qtip reupdatestats.patch tip +M5 started Feb 7 2011 01:47:37 +M5 executing on burrito command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-timing-mp -re tests/run.py build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-timing-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt index dbaf84851..9dfa01a0d 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1961801 # Simulator instruction rate (inst/s) -host_mem_usage 209312 # Number of bytes of host memory used -host_seconds 1.02 # Real time elapsed on the host -host_tick_rate 714851017 # Simulator tick rate (ticks/s) +host_inst_rate 730494 # Simulator instruction rate (inst/s) +host_mem_usage 229664 # Number of bytes of host memory used +host_seconds 2.74 # Real time elapsed on the host +host_tick_rate 266213751 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1999954 # Number of instructions simulated sim_seconds 0.000729 # Number of seconds simulated @@ -163,8 +163,24 @@ system.cpu0.itb.write_hits 0 # DT system.cpu0.itb.write_misses 0 # DTB write misses system.cpu0.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu0.numCycles 1457840 # number of cpu cycles simulated +system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu0.num_busy_cycles 1457840 # Number of busy cycles +system.cpu0.num_conditional_control_insts 38180 # number of instructions that are conditional controls +system.cpu0.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu0.num_fp_insts 32 # number of float instructions +system.cpu0.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu0.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu0.num_func_calls 14357 # number of times a function call or return occured +system.cpu0.num_idle_cycles 0 # Number of idle cycles system.cpu0.num_insts 500001 # Number of instructions executed -system.cpu0.num_refs 180793 # Number of memory references +system.cpu0.num_int_alu_accesses 474689 # Number of integer alu accesses +system.cpu0.num_int_insts 474689 # number of integer instructions +system.cpu0.num_int_register_reads 654286 # number of times the integer registers were read +system.cpu0.num_int_register_writes 371542 # number of times the integer registers were written +system.cpu0.num_load_insts 124443 # Number of load instructions +system.cpu0.num_mem_refs 180793 # number of memory refs +system.cpu0.num_store_insts 56350 # Number of store instructions system.cpu0.workload.PROG:num_syscalls 18 # Number of system calls system.cpu1.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu1.dcache.ReadReq_avg_miss_latency 54891.975309 # average ReadReq miss latency @@ -321,8 +337,24 @@ system.cpu1.itb.write_hits 0 # DT system.cpu1.itb.write_misses 0 # DTB write misses system.cpu1.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu1.numCycles 1457840 # number of cpu cycles simulated +system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu1.num_busy_cycles 1457840 # Number of busy cycles +system.cpu1.num_conditional_control_insts 38179 # number of instructions that are conditional controls +system.cpu1.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu1.num_fp_insts 32 # number of float instructions +system.cpu1.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu1.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu1.num_func_calls 14357 # number of times a function call or return occured +system.cpu1.num_idle_cycles 0 # Number of idle cycles system.cpu1.num_insts 499993 # Number of instructions executed -system.cpu1.num_refs 180792 # Number of memory references +system.cpu1.num_int_alu_accesses 474681 # Number of integer alu accesses +system.cpu1.num_int_insts 474681 # number of integer instructions +system.cpu1.num_int_register_reads 654273 # number of times the integer registers were read +system.cpu1.num_int_register_writes 371536 # number of times the integer registers were written +system.cpu1.num_load_insts 124443 # Number of load instructions +system.cpu1.num_mem_refs 180792 # number of memory refs +system.cpu1.num_store_insts 56349 # Number of store instructions system.cpu1.workload.PROG:num_syscalls 18 # Number of system calls system.cpu2.dcache.ReadReq_accesses 124433 # number of ReadReq accesses(hits+misses) system.cpu2.dcache.ReadReq_avg_miss_latency 54919.753086 # average ReadReq miss latency @@ -479,8 +511,24 @@ system.cpu2.itb.write_hits 0 # DT system.cpu2.itb.write_misses 0 # DTB write misses system.cpu2.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu2.numCycles 1457840 # number of cpu cycles simulated +system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu2.num_busy_cycles 1457840 # Number of busy cycles +system.cpu2.num_conditional_control_insts 38179 # number of instructions that are conditional controls +system.cpu2.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu2.num_fp_insts 32 # number of float instructions +system.cpu2.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu2.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu2.num_func_calls 14357 # number of times a function call or return occured +system.cpu2.num_idle_cycles 0 # Number of idle cycles system.cpu2.num_insts 499982 # Number of instructions executed -system.cpu2.num_refs 180789 # Number of memory references +system.cpu2.num_int_alu_accesses 474671 # Number of integer alu accesses +system.cpu2.num_int_insts 474671 # number of integer instructions +system.cpu2.num_int_register_reads 654261 # number of times the integer registers were read +system.cpu2.num_int_register_writes 371526 # number of times the integer registers were written +system.cpu2.num_load_insts 124440 # Number of load instructions +system.cpu2.num_mem_refs 180789 # number of memory refs +system.cpu2.num_store_insts 56349 # Number of store instructions system.cpu2.workload.PROG:num_syscalls 18 # Number of system calls system.cpu3.dcache.ReadReq_accesses 124431 # number of ReadReq accesses(hits+misses) system.cpu3.dcache.ReadReq_avg_miss_latency 54910.493827 # average ReadReq miss latency @@ -637,8 +685,24 @@ system.cpu3.itb.write_hits 0 # DT system.cpu3.itb.write_misses 0 # DTB write misses system.cpu3.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu3.numCycles 1457840 # number of cpu cycles simulated +system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu3.num_busy_cycles 1457840 # Number of busy cycles +system.cpu3.num_conditional_control_insts 38178 # number of instructions that are conditional controls +system.cpu3.num_fp_alu_accesses 32 # Number of float alu accesses +system.cpu3.num_fp_insts 32 # number of float instructions +system.cpu3.num_fp_register_reads 32 # number of times the floating registers were read +system.cpu3.num_fp_register_writes 16 # number of times the floating registers were written +system.cpu3.num_func_calls 14357 # number of times a function call or return occured +system.cpu3.num_idle_cycles 0 # Number of idle cycles system.cpu3.num_insts 499978 # Number of instructions executed -system.cpu3.num_refs 180787 # Number of memory references +system.cpu3.num_int_alu_accesses 474667 # Number of integer alu accesses +system.cpu3.num_int_insts 474667 # number of integer instructions +system.cpu3.num_int_register_reads 654256 # number of times the integer registers were read +system.cpu3.num_int_register_writes 371523 # number of times the integer registers were written +system.cpu3.num_load_insts 124438 # Number of load instructions +system.cpu3.num_mem_refs 180787 # number of memory refs +system.cpu3.num_store_insts 56349 # Number of store instructions system.cpu3.workload.PROG:num_syscalls 18 # Number of system calls system.l2c.ReadExReq_accesses::0 139 # number of ReadExReq accesses(hits+misses) system.l2c.ReadExReq_accesses::1 139 # number of ReadExReq accesses(hits+misses) |