diff options
Diffstat (limited to 'tests/quick/30.eio-mp')
8 files changed, 40 insertions, 183 deletions
diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini index f5bfa4cc2..f95ff0355 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini @@ -1,22 +1,13 @@ [root] type=Root children=system -time_sync_enable=false -time_sync_period=100000000000 -time_sync_spin_threshold=100000000 +dummy=0 [system] type=System children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus mem_mode=atomic physmem=system.physmem -work_begin_ckpt_count=0 -work_begin_cpu_id_exit=-1 -work_begin_exit_count=0 -work_cpus_ckpt_count=0 -work_end_ckpt_count=0 -work_end_exit_count=0 -work_item_id=-1 [system.cpu0] type=AtomicSimpleCPU @@ -124,7 +115,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout @@ -236,7 +227,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout @@ -348,7 +339,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout @@ -460,7 +451,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr index c3b5cc937..98d9eda34 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr @@ -7,6 +7,9 @@ For more information see: http://www.m5sim.org/warn/3e0eccba hack: be nice to actually delete the event here gzip: stdout: Broken pipe -stdout: Broken pipe + +gzip: stdout: Broken pipe + +gzip: stdout: Broken pipe gzip: stdout: Broken pipe diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout index 1af698feb..21b8e7313 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 6 2011 20:42:22 -M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates -M5 started Feb 6 2011 20:42:36 -M5 executing on SC2B0617 +M5 compiled Nov 9 2010 10:38:04 +M5 revision f4362ffd810f+ 7737+ default tip +M5 started Nov 9 2010 22:11:58 +M5 executing on zizzer command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-atomic-mp -re tests/run.py build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-atomic-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt index 2a7984fc0..81431004c 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 2537706 # Simulator instruction rate (inst/s) -host_mem_usage 1129136 # Number of bytes of host memory used -host_seconds 0.79 # Real time elapsed on the host -host_tick_rate 317111144 # Simulator tick rate (ticks/s) +host_inst_rate 2770469 # Simulator instruction rate (inst/s) +host_mem_usage 1126824 # Number of bytes of host memory used +host_seconds 0.72 # Real time elapsed on the host +host_tick_rate 346193150 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 2000004 # Number of instructions simulated sim_seconds 0.000250 # Number of seconds simulated @@ -145,24 +145,8 @@ system.cpu0.itb.write_hits 0 # DT system.cpu0.itb.write_misses 0 # DTB write misses system.cpu0.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu0.numCycles 500032 # number of cpu cycles simulated -system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu0.num_busy_cycles 500032 # Number of busy cycles -system.cpu0.num_conditional_control_insts 38180 # number of instructions that are conditional controls -system.cpu0.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu0.num_fp_insts 32 # number of float instructions -system.cpu0.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu0.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu0.num_func_calls 14357 # number of times a function call or return occured -system.cpu0.num_idle_cycles 0 # Number of idle cycles system.cpu0.num_insts 500001 # Number of instructions executed -system.cpu0.num_int_alu_accesses 474689 # Number of integer alu accesses -system.cpu0.num_int_insts 474689 # number of integer instructions -system.cpu0.num_int_register_reads 654286 # number of times the integer registers were read -system.cpu0.num_int_register_writes 371542 # number of times the integer registers were written -system.cpu0.num_load_insts 124443 # Number of load instructions -system.cpu0.num_mem_refs 180793 # number of memory refs -system.cpu0.num_store_insts 56350 # Number of store instructions +system.cpu0.num_refs 180793 # Number of memory references system.cpu0.workload.PROG:num_syscalls 18 # Number of system calls system.cpu1.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu1.dcache.ReadReq_hits 124111 # number of ReadReq hits @@ -301,24 +285,8 @@ system.cpu1.itb.write_hits 0 # DT system.cpu1.itb.write_misses 0 # DTB write misses system.cpu1.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu1.numCycles 500032 # number of cpu cycles simulated -system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu1.num_busy_cycles 500032 # Number of busy cycles -system.cpu1.num_conditional_control_insts 38180 # number of instructions that are conditional controls -system.cpu1.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu1.num_fp_insts 32 # number of float instructions -system.cpu1.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu1.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu1.num_func_calls 14357 # number of times a function call or return occured -system.cpu1.num_idle_cycles 0 # Number of idle cycles system.cpu1.num_insts 500001 # Number of instructions executed -system.cpu1.num_int_alu_accesses 474689 # Number of integer alu accesses -system.cpu1.num_int_insts 474689 # number of integer instructions -system.cpu1.num_int_register_reads 654286 # number of times the integer registers were read -system.cpu1.num_int_register_writes 371542 # number of times the integer registers were written -system.cpu1.num_load_insts 124443 # Number of load instructions -system.cpu1.num_mem_refs 180793 # number of memory refs -system.cpu1.num_store_insts 56350 # Number of store instructions +system.cpu1.num_refs 180793 # Number of memory references system.cpu1.workload.PROG:num_syscalls 18 # Number of system calls system.cpu2.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu2.dcache.ReadReq_hits 124111 # number of ReadReq hits @@ -457,24 +425,8 @@ system.cpu2.itb.write_hits 0 # DT system.cpu2.itb.write_misses 0 # DTB write misses system.cpu2.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu2.numCycles 500032 # number of cpu cycles simulated -system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu2.num_busy_cycles 500032 # Number of busy cycles -system.cpu2.num_conditional_control_insts 38180 # number of instructions that are conditional controls -system.cpu2.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu2.num_fp_insts 32 # number of float instructions -system.cpu2.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu2.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu2.num_func_calls 14357 # number of times a function call or return occured -system.cpu2.num_idle_cycles 0 # Number of idle cycles system.cpu2.num_insts 500001 # Number of instructions executed -system.cpu2.num_int_alu_accesses 474689 # Number of integer alu accesses -system.cpu2.num_int_insts 474689 # number of integer instructions -system.cpu2.num_int_register_reads 654286 # number of times the integer registers were read -system.cpu2.num_int_register_writes 371542 # number of times the integer registers were written -system.cpu2.num_load_insts 124443 # Number of load instructions -system.cpu2.num_mem_refs 180793 # number of memory refs -system.cpu2.num_store_insts 56350 # Number of store instructions +system.cpu2.num_refs 180793 # Number of memory references system.cpu2.workload.PROG:num_syscalls 18 # Number of system calls system.cpu3.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu3.dcache.ReadReq_hits 124111 # number of ReadReq hits @@ -613,24 +565,8 @@ system.cpu3.itb.write_hits 0 # DT system.cpu3.itb.write_misses 0 # DTB write misses system.cpu3.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu3.numCycles 500032 # number of cpu cycles simulated -system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu3.num_busy_cycles 500032 # Number of busy cycles -system.cpu3.num_conditional_control_insts 38180 # number of instructions that are conditional controls -system.cpu3.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu3.num_fp_insts 32 # number of float instructions -system.cpu3.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu3.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu3.num_func_calls 14357 # number of times a function call or return occured -system.cpu3.num_idle_cycles 0 # Number of idle cycles system.cpu3.num_insts 500001 # Number of instructions executed -system.cpu3.num_int_alu_accesses 474689 # Number of integer alu accesses -system.cpu3.num_int_insts 474689 # number of integer instructions -system.cpu3.num_int_register_reads 654286 # number of times the integer registers were read -system.cpu3.num_int_register_writes 371542 # number of times the integer registers were written -system.cpu3.num_load_insts 124443 # Number of load instructions -system.cpu3.num_mem_refs 180793 # number of memory refs -system.cpu3.num_store_insts 56350 # Number of store instructions +system.cpu3.num_refs 180793 # Number of memory references system.cpu3.workload.PROG:num_syscalls 18 # Number of system calls system.l2c.ReadExReq_accesses::0 139 # number of ReadExReq accesses(hits+misses) system.l2c.ReadExReq_accesses::1 139 # number of ReadExReq accesses(hits+misses) diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini index ce5f99ffa..a23113a37 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini @@ -1,22 +1,13 @@ [root] type=Root children=system -time_sync_enable=false -time_sync_period=100000000000 -time_sync_spin_threshold=100000000 +dummy=0 [system] type=System children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus mem_mode=timing physmem=system.physmem -work_begin_ckpt_count=0 -work_begin_cpu_id_exit=-1 -work_begin_exit_count=0 -work_cpus_ckpt_count=0 -work_end_ckpt_count=0 -work_end_exit_count=0 -work_item_id=-1 [system.cpu0] type=TimingSimpleCPU @@ -121,7 +112,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout @@ -230,7 +221,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout @@ -339,7 +330,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout @@ -448,7 +439,7 @@ type=ExeTracer type=EioProcess chkpt= errout=cerr -file=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz +file=/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz input=None max_stack_size=67108864 output=cout diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr index 91a8229b7..98d9eda34 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr @@ -6,9 +6,9 @@ warn: Prefetch instrutions is Alpha do not do anything For more information see: http://www.m5sim.org/warn/3e0eccba hack: be nice to actually delete the event here -gzip: gzip: stdout: Broken pipe -stdout: Broken pipe + +gzip: stdout: Broken pipe gzip: stdout: Broken pipe diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout index c379f6bd9..09966aa49 100755 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout @@ -5,10 +5,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 6 2011 20:42:22 -M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates -M5 started Feb 6 2011 20:42:50 -M5 executing on SC2B0617 +M5 compiled Nov 9 2010 10:38:04 +M5 revision f4362ffd810f+ 7737+ default tip +M5 started Nov 9 2010 22:11:58 +M5 executing on zizzer command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-timing-mp -re tests/run.py build/ALPHA_SE/tests/fast/quick/30.eio-mp/alpha/eio/simple-timing-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt index e14d3ac02..dbaf84851 100644 --- a/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt +++ b/tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1272425 # Simulator instruction rate (inst/s) -host_mem_usage 211636 # Number of bytes of host memory used -host_seconds 1.57 # Real time elapsed on the host -host_tick_rate 463675704 # Simulator tick rate (ticks/s) +host_inst_rate 1961801 # Simulator instruction rate (inst/s) +host_mem_usage 209312 # Number of bytes of host memory used +host_seconds 1.02 # Real time elapsed on the host +host_tick_rate 714851017 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1999954 # Number of instructions simulated sim_seconds 0.000729 # Number of seconds simulated @@ -163,24 +163,8 @@ system.cpu0.itb.write_hits 0 # DT system.cpu0.itb.write_misses 0 # DTB write misses system.cpu0.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu0.numCycles 1457840 # number of cpu cycles simulated -system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu0.num_busy_cycles 1457840 # Number of busy cycles -system.cpu0.num_conditional_control_insts 38180 # number of instructions that are conditional controls -system.cpu0.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu0.num_fp_insts 32 # number of float instructions -system.cpu0.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu0.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu0.num_func_calls 14357 # number of times a function call or return occured -system.cpu0.num_idle_cycles 0 # Number of idle cycles system.cpu0.num_insts 500001 # Number of instructions executed -system.cpu0.num_int_alu_accesses 474689 # Number of integer alu accesses -system.cpu0.num_int_insts 474689 # number of integer instructions -system.cpu0.num_int_register_reads 654286 # number of times the integer registers were read -system.cpu0.num_int_register_writes 371542 # number of times the integer registers were written -system.cpu0.num_load_insts 124443 # Number of load instructions -system.cpu0.num_mem_refs 180793 # number of memory refs -system.cpu0.num_store_insts 56350 # Number of store instructions +system.cpu0.num_refs 180793 # Number of memory references system.cpu0.workload.PROG:num_syscalls 18 # Number of system calls system.cpu1.dcache.ReadReq_accesses 124435 # number of ReadReq accesses(hits+misses) system.cpu1.dcache.ReadReq_avg_miss_latency 54891.975309 # average ReadReq miss latency @@ -337,24 +321,8 @@ system.cpu1.itb.write_hits 0 # DT system.cpu1.itb.write_misses 0 # DTB write misses system.cpu1.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu1.numCycles 1457840 # number of cpu cycles simulated -system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu1.num_busy_cycles 1457840 # Number of busy cycles -system.cpu1.num_conditional_control_insts 38179 # number of instructions that are conditional controls -system.cpu1.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu1.num_fp_insts 32 # number of float instructions -system.cpu1.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu1.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu1.num_func_calls 14357 # number of times a function call or return occured -system.cpu1.num_idle_cycles 0 # Number of idle cycles system.cpu1.num_insts 499993 # Number of instructions executed -system.cpu1.num_int_alu_accesses 474681 # Number of integer alu accesses -system.cpu1.num_int_insts 474681 # number of integer instructions -system.cpu1.num_int_register_reads 654273 # number of times the integer registers were read -system.cpu1.num_int_register_writes 371536 # number of times the integer registers were written -system.cpu1.num_load_insts 124443 # Number of load instructions -system.cpu1.num_mem_refs 180792 # number of memory refs -system.cpu1.num_store_insts 56349 # Number of store instructions +system.cpu1.num_refs 180792 # Number of memory references system.cpu1.workload.PROG:num_syscalls 18 # Number of system calls system.cpu2.dcache.ReadReq_accesses 124433 # number of ReadReq accesses(hits+misses) system.cpu2.dcache.ReadReq_avg_miss_latency 54919.753086 # average ReadReq miss latency @@ -511,24 +479,8 @@ system.cpu2.itb.write_hits 0 # DT system.cpu2.itb.write_misses 0 # DTB write misses system.cpu2.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu2.numCycles 1457840 # number of cpu cycles simulated -system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu2.num_busy_cycles 1457840 # Number of busy cycles -system.cpu2.num_conditional_control_insts 38179 # number of instructions that are conditional controls -system.cpu2.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu2.num_fp_insts 32 # number of float instructions -system.cpu2.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu2.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu2.num_func_calls 14357 # number of times a function call or return occured -system.cpu2.num_idle_cycles 0 # Number of idle cycles system.cpu2.num_insts 499982 # Number of instructions executed -system.cpu2.num_int_alu_accesses 474671 # Number of integer alu accesses -system.cpu2.num_int_insts 474671 # number of integer instructions -system.cpu2.num_int_register_reads 654261 # number of times the integer registers were read -system.cpu2.num_int_register_writes 371526 # number of times the integer registers were written -system.cpu2.num_load_insts 124440 # Number of load instructions -system.cpu2.num_mem_refs 180789 # number of memory refs -system.cpu2.num_store_insts 56349 # Number of store instructions +system.cpu2.num_refs 180789 # Number of memory references system.cpu2.workload.PROG:num_syscalls 18 # Number of system calls system.cpu3.dcache.ReadReq_accesses 124431 # number of ReadReq accesses(hits+misses) system.cpu3.dcache.ReadReq_avg_miss_latency 54910.493827 # average ReadReq miss latency @@ -685,24 +637,8 @@ system.cpu3.itb.write_hits 0 # DT system.cpu3.itb.write_misses 0 # DTB write misses system.cpu3.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu3.numCycles 1457840 # number of cpu cycles simulated -system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu3.num_busy_cycles 1457840 # Number of busy cycles -system.cpu3.num_conditional_control_insts 38178 # number of instructions that are conditional controls -system.cpu3.num_fp_alu_accesses 32 # Number of float alu accesses -system.cpu3.num_fp_insts 32 # number of float instructions -system.cpu3.num_fp_register_reads 32 # number of times the floating registers were read -system.cpu3.num_fp_register_writes 16 # number of times the floating registers were written -system.cpu3.num_func_calls 14357 # number of times a function call or return occured -system.cpu3.num_idle_cycles 0 # Number of idle cycles system.cpu3.num_insts 499978 # Number of instructions executed -system.cpu3.num_int_alu_accesses 474667 # Number of integer alu accesses -system.cpu3.num_int_insts 474667 # number of integer instructions -system.cpu3.num_int_register_reads 654256 # number of times the integer registers were read -system.cpu3.num_int_register_writes 371523 # number of times the integer registers were written -system.cpu3.num_load_insts 124438 # Number of load instructions -system.cpu3.num_mem_refs 180787 # number of memory refs -system.cpu3.num_store_insts 56349 # Number of store instructions +system.cpu3.num_refs 180787 # Number of memory references system.cpu3.workload.PROG:num_syscalls 18 # Number of system calls system.l2c.ReadExReq_accesses::0 139 # number of ReadExReq accesses(hits+misses) system.l2c.ReadExReq_accesses::1 139 # number of ReadExReq accesses(hits+misses) |