diff options
Diffstat (limited to 'tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp')
3 files changed, 17 insertions, 88 deletions
diff --git a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini index 5787a6d74..e833b46ac 100644 --- a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini +++ b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini @@ -1,22 +1,13 @@ [root] type=Root children=system -time_sync_enable=false -time_sync_period=100000000000 -time_sync_spin_threshold=100000000 +dummy=0 [system] type=System children=cpu0 cpu1 cpu2 cpu3 l2c membus physmem toL2Bus mem_mode=atomic physmem=system.physmem -work_begin_ckpt_count=0 -work_begin_cpu_id_exit=-1 -work_begin_exit_count=0 -work_cpus_ckpt_count=0 -work_end_ckpt_count=0 -work_end_exit_count=0 -work_item_id=-1 [system.cpu0] type=AtomicSimpleCPU @@ -128,7 +119,7 @@ egid=100 env= errout=cerr euid=100 -executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/m5threads/bin/sparc/linux/test_atomic +executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout index 576190411..9ac3c5e14 100755 --- a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout +++ b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout @@ -1,3 +1,5 @@ +Redirecting stdout to build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simout +Redirecting stderr to build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp/simerr M5 Simulator System Copyright (c) 2001-2008 @@ -5,11 +7,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Feb 6 2011 15:23:54 -M5 revision b885adc82ab4+ 7924+ default tip qtip brad/regress_updates -M5 started Feb 6 2011 20:47:32 -M5 executing on SC2B0617 -command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re tests/run.py build/SPARC_SE/tests/fast/quick/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp +M5 compiled Aug 26 2010 13:03:41 +M5 revision 85cafc6ccb42 7662 default qtip tip sc-fail-fix +M5 started Aug 26 2010 13:04:32 +M5 executing on zizzer +command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp -re tests/run.py build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... Init done diff --git a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt index 0b9d84f24..0544aca9b 100644 --- a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt +++ b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 1942923 # Simulator instruction rate (inst/s) -host_mem_usage 1130976 # Number of bytes of host memory used -host_seconds 0.35 # Real time elapsed on the host -host_tick_rate 251405159 # Simulator tick rate (ticks/s) +host_inst_rate 1027581 # Simulator instruction rate (inst/s) +host_mem_usage 1133204 # Number of bytes of host memory used +host_seconds 0.66 # Real time elapsed on the host +host_tick_rate 133016942 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 677340 # Number of instructions simulated sim_seconds 0.000088 # Number of seconds simulated @@ -117,24 +117,8 @@ system.cpu0.icache.writebacks 0 # nu system.cpu0.idle_fraction 0 # Percentage of idle cycles system.cpu0.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu0.numCycles 175428 # number of cpu cycles simulated -system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu0.num_busy_cycles 175428 # Number of busy cycles -system.cpu0.num_conditional_control_insts 0 # number of instructions that are conditional controls -system.cpu0.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu0.num_fp_insts 0 # number of float instructions -system.cpu0.num_fp_register_reads 0 # number of times the floating registers were read -system.cpu0.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu0.num_func_calls 0 # number of times a function call or return occured -system.cpu0.num_idle_cycles 0 # Number of idle cycles system.cpu0.num_insts 175339 # Number of instructions executed -system.cpu0.num_int_alu_accesses 120388 # Number of integer alu accesses -system.cpu0.num_int_insts 120388 # number of integer instructions -system.cpu0.num_int_register_reads 349308 # number of times the integer registers were read -system.cpu0.num_int_register_writes 121996 # number of times the integer registers were written -system.cpu0.num_load_insts 54592 # Number of load instructions -system.cpu0.num_mem_refs 82398 # number of memory refs -system.cpu0.num_store_insts 27806 # Number of store instructions +system.cpu0.num_refs 82398 # Number of memory references system.cpu0.workload.PROG:num_syscalls 89 # Number of system calls system.cpu1.dcache.ReadReq_accesses 40644 # number of ReadReq accesses(hits+misses) system.cpu1.dcache.ReadReq_hits 40468 # number of ReadReq hits @@ -245,24 +229,8 @@ system.cpu1.icache.writebacks 0 # nu system.cpu1.idle_fraction 0.045506 # Percentage of idle cycles system.cpu1.not_idle_fraction 0.954494 # Percentage of non-idle cycles system.cpu1.numCycles 173308 # number of cpu cycles simulated -system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu1.num_busy_cycles 165421.425557 # Number of busy cycles -system.cpu1.num_conditional_control_insts 0 # number of instructions that are conditional controls -system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu1.num_fp_insts 0 # number of float instructions -system.cpu1.num_fp_register_reads 0 # number of times the floating registers were read -system.cpu1.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu1.num_func_calls 0 # number of times a function call or return occured -system.cpu1.num_idle_cycles 7886.574443 # Number of idle cycles system.cpu1.num_insts 167398 # Number of instructions executed -system.cpu1.num_int_alu_accesses 109926 # Number of integer alu accesses -system.cpu1.num_int_insts 109926 # number of integer instructions -system.cpu1.num_int_register_reads 270038 # number of times the integer registers were read -system.cpu1.num_int_register_writes 100721 # number of times the integer registers were written -system.cpu1.num_load_insts 40652 # Number of load instructions -system.cpu1.num_mem_refs 53394 # number of memory refs -system.cpu1.num_store_insts 12742 # Number of store instructions +system.cpu1.num_refs 53394 # Number of memory references system.cpu2.dcache.ReadReq_accesses 42354 # number of ReadReq accesses(hits+misses) system.cpu2.dcache.ReadReq_hits 42192 # number of ReadReq hits system.cpu2.dcache.ReadReq_miss_rate 0.003825 # miss rate for ReadReq accesses @@ -372,24 +340,8 @@ system.cpu2.icache.writebacks 0 # nu system.cpu2.idle_fraction 0.045871 # Percentage of idle cycles system.cpu2.not_idle_fraction 0.954129 # Percentage of non-idle cycles system.cpu2.numCycles 173308 # number of cpu cycles simulated -system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu2.num_busy_cycles 165358.198620 # Number of busy cycles -system.cpu2.num_conditional_control_insts 0 # number of instructions that are conditional controls -system.cpu2.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu2.num_fp_insts 0 # number of float instructions -system.cpu2.num_fp_register_reads 0 # number of times the floating registers were read -system.cpu2.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu2.num_func_calls 0 # number of times a function call or return occured -system.cpu2.num_idle_cycles 7949.801380 # Number of idle cycles system.cpu2.num_insts 167334 # Number of instructions executed -system.cpu2.num_int_alu_accesses 113333 # Number of integer alu accesses -system.cpu2.num_int_insts 113333 # number of integer instructions -system.cpu2.num_int_register_reads 290613 # number of times the integer registers were read -system.cpu2.num_int_register_writes 109308 # number of times the integer registers were written -system.cpu2.num_load_insts 42362 # Number of load instructions -system.cpu2.num_mem_refs 58537 # number of memory refs -system.cpu2.num_store_insts 16175 # Number of store instructions +system.cpu2.num_refs 58537 # Number of memory references system.cpu3.dcache.ReadReq_accesses 41458 # number of ReadReq accesses(hits+misses) system.cpu3.dcache.ReadReq_hits 41299 # number of ReadReq hits system.cpu3.dcache.ReadReq_miss_rate 0.003835 # miss rate for ReadReq accesses @@ -499,24 +451,8 @@ system.cpu3.icache.writebacks 0 # nu system.cpu3.idle_fraction 0.046241 # Percentage of idle cycles system.cpu3.not_idle_fraction 0.953759 # Percentage of non-idle cycles system.cpu3.numCycles 173307 # number of cpu cycles simulated -system.cpu3.numWorkItemsCompleted 0 # number of work items this cpu completed -system.cpu3.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu3.num_busy_cycles 165293.030003 # Number of busy cycles -system.cpu3.num_conditional_control_insts 0 # number of instructions that are conditional controls -system.cpu3.num_fp_alu_accesses 0 # Number of float alu accesses -system.cpu3.num_fp_insts 0 # number of float instructions -system.cpu3.num_fp_register_reads 0 # number of times the floating registers were read -system.cpu3.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu3.num_func_calls 0 # number of times a function call or return occured -system.cpu3.num_idle_cycles 8013.969997 # Number of idle cycles system.cpu3.num_insts 167269 # Number of instructions executed -system.cpu3.num_int_alu_accesses 111554 # Number of integer alu accesses -system.cpu3.num_int_insts 111554 # number of integer instructions -system.cpu3.num_int_register_reads 280060 # number of times the integer registers were read -system.cpu3.num_int_register_writes 104916 # number of times the integer registers were written -system.cpu3.num_load_insts 41466 # Number of load instructions -system.cpu3.num_mem_refs 55900 # number of memory refs -system.cpu3.num_store_insts 14434 # Number of store instructions +system.cpu3.num_refs 55900 # Number of memory references system.l2c.ReadExReq_accesses::0 99 # number of ReadExReq accesses(hits+misses) system.l2c.ReadExReq_accesses::1 13 # number of ReadExReq accesses(hits+misses) system.l2c.ReadExReq_accesses::2 12 # number of ReadExReq accesses(hits+misses) |