diff options
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt')
| -rw-r--r-- | tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt index 0fe996c73..51ed81ea8 100644 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt @@ -1,34 +1,34 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 344416 # Number of bytes of host memory used -host_seconds 257.16 # Real time elapsed on the host -host_tick_rate 151420 # Simulator tick rate (ticks/s) +host_mem_usage 358708 # Number of bytes of host memory used +host_seconds 778.15 # Real time elapsed on the host +host_tick_rate 49999 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.038939 # Number of seconds simulated -sim_ticks 38939096 # Number of ticks simulated +sim_seconds 0.038906 # Number of seconds simulated +sim_ticks 38906196 # Number of ticks simulated system.cpu0.num_copies 0 # number of copy accesses completed -system.cpu0.num_reads 99650 # number of read accesses completed -system.cpu0.num_writes 53465 # number of write accesses completed +system.cpu0.num_reads 99780 # number of read accesses completed +system.cpu0.num_writes 53840 # number of write accesses completed system.cpu1.num_copies 0 # number of copy accesses completed -system.cpu1.num_reads 99886 # number of read accesses completed -system.cpu1.num_writes 53908 # number of write accesses completed +system.cpu1.num_reads 99496 # number of read accesses completed +system.cpu1.num_writes 53772 # number of write accesses completed system.cpu2.num_copies 0 # number of copy accesses completed -system.cpu2.num_reads 99727 # number of read accesses completed -system.cpu2.num_writes 53685 # number of write accesses completed +system.cpu2.num_reads 99777 # number of read accesses completed +system.cpu2.num_writes 53680 # number of write accesses completed system.cpu3.num_copies 0 # number of copy accesses completed -system.cpu3.num_reads 99743 # number of read accesses completed -system.cpu3.num_writes 53374 # number of write accesses completed +system.cpu3.num_reads 100000 # number of read accesses completed +system.cpu3.num_writes 53475 # number of write accesses completed system.cpu4.num_copies 0 # number of copy accesses completed -system.cpu4.num_reads 99344 # number of read accesses completed -system.cpu4.num_writes 53842 # number of write accesses completed +system.cpu4.num_reads 99286 # number of read accesses completed +system.cpu4.num_writes 53457 # number of write accesses completed system.cpu5.num_copies 0 # number of copy accesses completed -system.cpu5.num_reads 99988 # number of read accesses completed -system.cpu5.num_writes 53434 # number of write accesses completed +system.cpu5.num_reads 99290 # number of read accesses completed +system.cpu5.num_writes 53647 # number of write accesses completed system.cpu6.num_copies 0 # number of copy accesses completed -system.cpu6.num_reads 100000 # number of read accesses completed -system.cpu6.num_writes 54115 # number of write accesses completed +system.cpu6.num_reads 99687 # number of read accesses completed +system.cpu6.num_writes 53645 # number of write accesses completed system.cpu7.num_copies 0 # number of copy accesses completed -system.cpu7.num_reads 99701 # number of read accesses completed -system.cpu7.num_writes 53854 # number of write accesses completed +system.cpu7.num_reads 99914 # number of read accesses completed +system.cpu7.num_writes 53699 # number of write accesses completed ---------- End Simulation Statistics ---------- |