diff options
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt')
| -rw-r--r-- | tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt index d9440348d..3f6218f25 100644 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt @@ -1,34 +1,34 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 339964 # Number of bytes of host memory used -host_seconds 41.43 # Real time elapsed on the host -host_tick_rate 104755 # Simulator tick rate (ticks/s) +host_mem_usage 332624 # Number of bytes of host memory used +host_seconds 32.19 # Real time elapsed on the host +host_tick_rate 134514 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.004340 # Number of seconds simulated -sim_ticks 4339943 # Number of ticks simulated +sim_seconds 0.004329 # Number of seconds simulated +sim_ticks 4329426 # Number of ticks simulated system.cpu0.num_copies 0 # number of copy accesses completed -system.cpu0.num_reads 99313 # number of read accesses completed -system.cpu0.num_writes 53538 # number of write accesses completed +system.cpu0.num_reads 99342 # number of read accesses completed +system.cpu0.num_writes 53020 # number of write accesses completed system.cpu1.num_copies 0 # number of copy accesses completed -system.cpu1.num_reads 99089 # number of read accesses completed -system.cpu1.num_writes 53648 # number of write accesses completed +system.cpu1.num_reads 98745 # number of read accesses completed +system.cpu1.num_writes 53384 # number of write accesses completed system.cpu2.num_copies 0 # number of copy accesses completed -system.cpu2.num_reads 98494 # number of read accesses completed -system.cpu2.num_writes 52751 # number of write accesses completed +system.cpu2.num_reads 98624 # number of read accesses completed +system.cpu2.num_writes 53313 # number of write accesses completed system.cpu3.num_copies 0 # number of copy accesses completed -system.cpu3.num_reads 98499 # number of read accesses completed -system.cpu3.num_writes 53164 # number of write accesses completed +system.cpu3.num_reads 99274 # number of read accesses completed +system.cpu3.num_writes 53327 # number of write accesses completed system.cpu4.num_copies 0 # number of copy accesses completed -system.cpu4.num_reads 99037 # number of read accesses completed -system.cpu4.num_writes 53407 # number of write accesses completed +system.cpu4.num_reads 98083 # number of read accesses completed +system.cpu4.num_writes 52520 # number of write accesses completed system.cpu5.num_copies 0 # number of copy accesses completed -system.cpu5.num_reads 99159 # number of read accesses completed -system.cpu5.num_writes 53566 # number of write accesses completed +system.cpu5.num_reads 98306 # number of read accesses completed +system.cpu5.num_writes 52893 # number of write accesses completed system.cpu6.num_copies 0 # number of copy accesses completed -system.cpu6.num_reads 98888 # number of read accesses completed -system.cpu6.num_writes 53164 # number of write accesses completed +system.cpu6.num_reads 100000 # number of read accesses completed +system.cpu6.num_writes 53622 # number of write accesses completed system.cpu7.num_copies 0 # number of copy accesses completed -system.cpu7.num_reads 100000 # number of read accesses completed -system.cpu7.num_writes 54267 # number of write accesses completed +system.cpu7.num_reads 99389 # number of read accesses completed +system.cpu7.num_writes 53486 # number of write accesses completed ---------- End Simulation Statistics ---------- |