diff options
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt')
| -rw-r--r-- | tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt index 25988127e..a5be4ef0c 100644 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt +++ b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt @@ -1,34 +1,34 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 343796 # Number of bytes of host memory used -host_seconds 47.85 # Real time elapsed on the host -host_tick_rate 1196434 # Simulator tick rate (ticks/s) +host_mem_usage 357724 # Number of bytes of host memory used +host_seconds 118.40 # Real time elapsed on the host +host_tick_rate 481891 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.057251 # Number of seconds simulated -sim_ticks 57251340 # Number of ticks simulated +sim_seconds 0.057055 # Number of seconds simulated +sim_ticks 57055090 # Number of ticks simulated system.cpu0.num_copies 0 # number of copy accesses completed -system.cpu0.num_reads 99892 # number of read accesses completed -system.cpu0.num_writes 53261 # number of write accesses completed +system.cpu0.num_reads 99259 # number of read accesses completed +system.cpu0.num_writes 53367 # number of write accesses completed system.cpu1.num_copies 0 # number of copy accesses completed -system.cpu1.num_reads 99647 # number of read accesses completed -system.cpu1.num_writes 53706 # number of write accesses completed +system.cpu1.num_reads 100000 # number of read accesses completed +system.cpu1.num_writes 53480 # number of write accesses completed system.cpu2.num_copies 0 # number of copy accesses completed -system.cpu2.num_reads 99764 # number of read accesses completed -system.cpu2.num_writes 53616 # number of write accesses completed +system.cpu2.num_reads 99029 # number of read accesses completed +system.cpu2.num_writes 53458 # number of write accesses completed system.cpu3.num_copies 0 # number of copy accesses completed -system.cpu3.num_reads 99684 # number of read accesses completed -system.cpu3.num_writes 53704 # number of write accesses completed +system.cpu3.num_reads 99240 # number of read accesses completed +system.cpu3.num_writes 53681 # number of write accesses completed system.cpu4.num_copies 0 # number of copy accesses completed -system.cpu4.num_reads 99856 # number of read accesses completed -system.cpu4.num_writes 53900 # number of write accesses completed +system.cpu4.num_reads 99667 # number of read accesses completed +system.cpu4.num_writes 53922 # number of write accesses completed system.cpu5.num_copies 0 # number of copy accesses completed -system.cpu5.num_reads 100000 # number of read accesses completed -system.cpu5.num_writes 53611 # number of write accesses completed +system.cpu5.num_reads 99333 # number of read accesses completed +system.cpu5.num_writes 53673 # number of write accesses completed system.cpu6.num_copies 0 # number of copy accesses completed -system.cpu6.num_reads 99838 # number of read accesses completed -system.cpu6.num_writes 54123 # number of write accesses completed +system.cpu6.num_reads 99229 # number of read accesses completed +system.cpu6.num_writes 52964 # number of write accesses completed system.cpu7.num_copies 0 # number of copy accesses completed -system.cpu7.num_reads 99183 # number of read accesses completed -system.cpu7.num_writes 53528 # number of write accesses completed +system.cpu7.num_reads 99289 # number of read accesses completed +system.cpu7.num_writes 53467 # number of write accesses completed ---------- End Simulation Statistics ---------- |