summaryrefslogtreecommitdiff
path: root/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
diff options
context:
space:
mode:
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt')
-rw-r--r--tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt40
1 files changed, 20 insertions, 20 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
index 8bfe5c848..09849fe3c 100644
--- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
+++ b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
@@ -1,34 +1,34 @@
---------- Begin Simulation Statistics ----------
-host_mem_usage 339664 # Number of bytes of host memory used
-host_seconds 76.81 # Real time elapsed on the host
-host_tick_rate 143842 # Simulator tick rate (ticks/s)
+host_mem_usage 341104 # Number of bytes of host memory used
+host_seconds 68.57 # Real time elapsed on the host
+host_tick_rate 161272 # Simulator tick rate (ticks/s)
sim_freq 1000000000 # Frequency of simulated ticks
-sim_seconds 0.011048 # Number of seconds simulated
-sim_ticks 11048357 # Number of ticks simulated
+sim_seconds 0.011059 # Number of seconds simulated
+sim_ticks 11059012 # Number of ticks simulated
system.cpu0.num_copies 0 # number of copy accesses completed
-system.cpu0.num_reads 99774 # number of read accesses completed
-system.cpu0.num_writes 53674 # number of write accesses completed
+system.cpu0.num_reads 99622 # number of read accesses completed
+system.cpu0.num_writes 53973 # number of write accesses completed
system.cpu1.num_copies 0 # number of copy accesses completed
-system.cpu1.num_reads 99259 # number of read accesses completed
-system.cpu1.num_writes 54198 # number of write accesses completed
+system.cpu1.num_reads 99717 # number of read accesses completed
+system.cpu1.num_writes 53880 # number of write accesses completed
system.cpu2.num_copies 0 # number of copy accesses completed
-system.cpu2.num_reads 99555 # number of read accesses completed
-system.cpu2.num_writes 53890 # number of write accesses completed
+system.cpu2.num_reads 99983 # number of read accesses completed
+system.cpu2.num_writes 53618 # number of write accesses completed
system.cpu3.num_copies 0 # number of copy accesses completed
-system.cpu3.num_reads 99932 # number of read accesses completed
-system.cpu3.num_writes 53513 # number of write accesses completed
+system.cpu3.num_reads 99512 # number of read accesses completed
+system.cpu3.num_writes 54081 # number of write accesses completed
system.cpu4.num_copies 0 # number of copy accesses completed
system.cpu4.num_reads 100000 # number of read accesses completed
-system.cpu4.num_writes 53445 # number of write accesses completed
+system.cpu4.num_writes 53593 # number of write accesses completed
system.cpu5.num_copies 0 # number of copy accesses completed
-system.cpu5.num_reads 99914 # number of read accesses completed
-system.cpu5.num_writes 53531 # number of write accesses completed
+system.cpu5.num_reads 99946 # number of read accesses completed
+system.cpu5.num_writes 53647 # number of write accesses completed
system.cpu6.num_copies 0 # number of copy accesses completed
-system.cpu6.num_reads 99770 # number of read accesses completed
-system.cpu6.num_writes 53674 # number of write accesses completed
+system.cpu6.num_reads 99718 # number of read accesses completed
+system.cpu6.num_writes 53875 # number of write accesses completed
system.cpu7.num_copies 0 # number of copy accesses completed
-system.cpu7.num_reads 99868 # number of read accesses completed
-system.cpu7.num_writes 53576 # number of write accesses completed
+system.cpu7.num_reads 99976 # number of read accesses completed
+system.cpu7.num_writes 53616 # number of write accesses completed
---------- End Simulation Statistics ----------