diff options
Diffstat (limited to 'tests/quick/60.rubytest')
20 files changed, 4099 insertions, 3633 deletions
diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini index ab3a160f3..6bc7e48b3 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini @@ -5,10 +5,118 @@ dummy=0 [system] type=System -children=physmem ruby +children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby mem_mode=timing physmem=system.physmem +[system.dir_cntrl0] +type=Directory_Controller +children=directory memBuffer +buffer_size=0 +directory=system.dir_cntrl0.directory +directory_latency=6 +memBuffer=system.dir_cntrl0.memBuffer +number_of_TBEs=256 +recycle_latency=10 +to_mem_ctrl_latency=1 +transitions_per_cycle=32 +version=0 + +[system.dir_cntrl0.directory] +type=RubyDirectoryMemory +map_levels=4 +numa_high_bit=6 +size=134217728 +use_map=false +version=0 + +[system.dir_cntrl0.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.l1_cntrl0] +type=L1Cache_Controller +children=sequencer +L1DcacheMemory=system.l1_cntrl0.sequencer.dcache +L1IcacheMemory=system.l1_cntrl0.sequencer.icache +buffer_size=0 +l1_request_latency=2 +l1_response_latency=2 +l2_select_num_bits=0 +number_of_TBEs=256 +recycle_latency=10 +sequencer=system.l1_cntrl0.sequencer +to_l2_latency=1 +transitions_per_cycle=32 +version=0 + +[system.l1_cntrl0.sequencer] +type=RubySequencer +children=dcache icache +dcache=system.l1_cntrl0.sequencer.dcache +deadlock_threshold=500000 +icache=system.l1_cntrl0.sequencer.icache +max_outstanding_requests=16 +physmem=system.physmem +using_ruby_tester=true +version=0 +physMemPort=system.physmem.port[0] +port=root.cpuPort[0] + +[system.l1_cntrl0.sequencer.dcache] +type=RubyCache +assoc=2 +latency=3 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l1_cntrl0.sequencer.icache] +type=RubyCache +assoc=2 +latency=3 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l2_cntrl0] +type=L2Cache_Controller +children=L2cacheMemory +L2cacheMemory=system.l2_cntrl0.L2cacheMemory +buffer_size=0 +l2_request_latency=2 +l2_response_latency=2 +number_of_TBEs=256 +recycle_latency=10 +to_l1_latency=1 +transitions_per_cycle=32 +version=0 + +[system.l2_cntrl0.L2cacheMemory] +type=RubyCache +assoc=2 +latency=15 +replacement_policy=PSEUDO_LRU +size=512 +start_index_bit=6 + [system.physmem] type=PhysicalMemory file= @@ -17,7 +125,7 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort +port=system.l1_cntrl0.sequencer.physMemPort [system.ruby] type=RubySystem @@ -56,6 +164,7 @@ topology=system.ruby.network.topology [system.ruby.network.topology] type=Topology children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 +description=Crossbar ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2 num_int_nodes=4 @@ -63,136 +172,28 @@ print_config=false [system.ruby.network.topology.ext_links0] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links0.ext_node +ext_node=system.l1_cntrl0 int_node=0 latency=1 weight=1 -[system.ruby.network.topology.ext_links0.ext_node] -type=L1Cache_Controller -children=sequencer -L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -buffer_size=0 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer] -type=RubySequencer -children=dcache icache -dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -deadlock_threshold=500000 -icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -max_outstanding_requests=16 -physmem=system.physmem -using_ruby_tester=true -version=0 -physMemPort=system.physmem.port[0] -port=root.cpuPort[0] - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - [system.ruby.network.topology.ext_links1] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links1.ext_node +ext_node=system.l2_cntrl0 int_node=1 latency=1 weight=1 -[system.ruby.network.topology.ext_links1.ext_node] -type=L2Cache_Controller -children=L2cacheMemory -L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory -buffer_size=0 -l2_request_latency=2 -l2_response_latency=2 -number_of_TBEs=256 -recycle_latency=10 -to_l1_latency=1 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory] -type=RubyCache -assoc=2 -latency=15 -replacement_policy=PSEUDO_LRU -size=512 - [system.ruby.network.topology.ext_links2] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links2.ext_node +ext_node=system.dir_cntrl0 int_node=2 latency=1 weight=1 -[system.ruby.network.topology.ext_links2.ext_node] -type=Directory_Controller -children=directory memBuffer -buffer_size=0 -directory=system.ruby.network.topology.ext_links2.ext_node.directory -directory_latency=6 -memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer -number_of_TBEs=256 -recycle_latency=10 -to_mem_ctrl_latency=1 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links2.ext_node.directory] -type=RubyDirectoryMemory -map_levels=4 -numa_high_bit=0 -size=134217728 -use_map=false -version=0 - -[system.ruby.network.topology.ext_links2.ext_node.memBuffer] -type=RubyMemoryControl -bank_bit_0=8 -bank_busy_time=11 -bank_queue_size=12 -banks_per_rank=8 -basic_bus_busy_time=2 -dimm_bit_0=12 -dimms_per_channel=2 -mem_bus_cycle_multiplier=10 -mem_ctl_latency=12 -mem_fixed_delay=0 -mem_random_arbitrate=0 -rank_bit_0=11 -rank_rank_delay=1 -ranks_per_dimm=2 -read_write_delay=2 -refresh_period=1560 -tFaw=0 -version=0 - [system.ruby.network.topology.int_links0] type=IntLink bw_multiplier=16 diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats index 2e2c8b656..99657e89a 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats @@ -34,7 +34,7 @@ periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ -Real time: Mar/18/2010 14:37:01 +Real time: Aug/20/2010 11:29:01 Profiler Stats -------------- @@ -43,20 +43,20 @@ Elapsed_time_in_minutes: 0.0166667 Elapsed_time_in_hours: 0.000277778 Elapsed_time_in_days: 1.15741e-05 -Virtual_time_in_seconds: 1.11 -Virtual_time_in_minutes: 0.0185 -Virtual_time_in_hours: 0.000308333 -Virtual_time_in_days: 1.28472e-05 +Virtual_time_in_seconds: 0.73 +Virtual_time_in_minutes: 0.0121667 +Virtual_time_in_hours: 0.000202778 +Virtual_time_in_days: 8.44907e-06 -Ruby_current_time: 385311 +Ruby_current_time: 362171 Ruby_start_time: 0 -Ruby_cycles: 385311 +Ruby_cycles: 362171 -mbytes_resident: 30.6758 -mbytes_total: 203.664 -resident_ratio: 0.150658 +mbytes_resident: 31.3438 +mbytes_total: 204.512 +resident_ratio: 0.153319 -ruby_cycles_executed: [ 385312 ] +ruby_cycles_executed: [ 362172 ] Busy Controller Counts: L1Cache-0:0 @@ -66,13 +66,28 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1035 average: 15.8406 | standard deviation: 1.10345 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 46 975 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 989 average: 15.8261 | standard deviation: 1.13064 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 53 922 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 256 max: 34673 count: 1020 average: 5812.61 | standard deviation: 8321.57 | 94 13 65 91 82 85 75 46 28 39 28 23 31 15 11 13 6 8 12 9 6 3 9 2 3 6 0 1 4 2 2 2 1 1 2 0 1 2 0 2 1 2 1 1 1 1 1 1 0 1 0 3 1 0 0 0 0 0 0 2 2 0 3 1 3 1 3 2 1 6 1 2 2 5 2 7 2 1 3 4 4 3 2 6 5 9 2 2 10 1 6 4 3 4 4 5 3 5 2 5 5 2 3 6 3 3 1 3 3 4 0 2 0 0 1 2 1 0 0 1 3 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_2: [binsize: 256 max: 28025 count: 100 average: 5269.19 | standard deviation: 7878.72 | 12 1 6 6 7 10 10 8 2 4 3 0 3 2 1 2 0 1 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 1 2 1 0 0 0 0 0 1 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_3: [binsize: 256 max: 34673 count: 920 average: 5871.67 | standard deviation: 8370.25 | 82 12 59 85 75 75 65 38 26 35 25 23 28 13 10 11 6 7 11 9 6 3 8 2 2 5 0 1 4 2 2 2 1 1 2 0 1 2 0 2 1 2 1 1 1 1 1 1 0 1 0 2 1 0 0 0 0 0 0 2 2 0 2 0 3 0 3 2 1 6 1 2 1 5 2 6 2 1 3 4 3 3 1 4 4 9 2 2 10 1 5 3 3 4 4 4 3 5 2 4 5 2 3 5 3 3 1 2 3 3 0 2 0 0 1 2 1 0 0 1 3 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 256 max: 32770 count: 974 average: 5848.35 | standard deviation: 7643.86 | 78 21 56 74 77 80 49 39 35 30 33 25 16 19 17 15 6 9 8 7 4 5 5 5 4 3 8 3 5 6 5 7 0 3 1 6 1 3 3 1 1 1 2 1 1 1 3 2 0 1 2 3 2 6 3 3 2 3 2 4 3 6 2 3 6 5 3 3 3 2 4 2 3 5 10 4 1 3 4 9 3 4 3 2 2 3 7 1 2 2 2 2 3 3 2 1 4 2 0 3 1 2 2 2 1 1 3 0 1 1 3 0 1 0 2 1 0 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 16 max: 2239 count: 47 average: 995.638 | standard deviation: 452.716 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 1 1 0 1 1 1 0 0 0 1 1 2 0 0 0 1 0 2 2 1 0 0 0 0 2 1 0 0 0 1 0 2 1 0 0 0 2 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 2 0 2 1 0 2 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 128 max: 21145 count: 53 average: 4245.77 | standard deviation: 5383.1 | 5 0 0 0 1 1 4 2 1 2 1 6 3 2 1 0 1 1 0 0 0 1 3 0 0 1 0 1 0 2 1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST: [binsize: 256 max: 32770 count: 874 average: 6206.49 | standard deviation: 7863.36 | 73 14 42 60 69 63 42 36 32 30 32 22 15 18 15 14 6 9 8 6 4 5 4 5 4 3 7 3 5 6 5 7 0 3 1 4 1 2 3 1 1 1 2 1 1 0 3 2 0 1 2 3 2 6 3 3 2 2 1 4 3 6 2 2 6 5 3 2 3 2 4 2 3 4 10 4 1 3 4 9 3 4 2 2 2 3 7 1 2 2 2 2 3 3 2 1 4 2 0 3 1 2 2 2 1 1 3 0 1 1 3 0 1 0 2 1 0 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_NULL: [binsize: 256 max: 32770 count: 974 average: 5848.35 | standard deviation: 7643.86 | 78 21 56 74 77 80 49 39 35 30 33 25 16 19 17 15 6 9 8 7 4 5 5 5 4 3 8 3 5 6 5 7 0 3 1 6 1 3 3 1 1 1 2 1 1 1 3 2 0 1 2 3 2 6 3 3 2 3 2 4 3 6 2 3 6 5 3 3 3 2 4 2 3 5 10 4 1 3 4 9 3 4 3 2 2 3 7 1 2 2 2 2 3 3 2 1 4 2 0 3 1 2 2 2 1 1 3 0 1 1 3 0 1 0 2 1 0 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_wCC_Times: 0 +miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_dir_Times: 0 +miss_latency_IFETCH_NULL: [binsize: 16 max: 2239 count: 47 average: 995.638 | standard deviation: 452.716 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 1 1 1 0 1 1 1 0 0 0 1 1 2 0 0 0 1 0 2 2 1 0 0 0 0 2 1 0 0 0 1 0 2 1 0 0 0 2 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 2 0 2 1 0 2 0 0 1 0 2 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_NULL: [binsize: 128 max: 21145 count: 53 average: 4245.77 | standard deviation: 5383.1 | 5 0 0 0 1 1 4 2 1 2 1 6 3 2 1 0 1 1 0 0 0 1 3 0 0 1 0 1 0 2 1 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_NULL: [binsize: 256 max: 32770 count: 874 average: 6206.49 | standard deviation: 7863.36 | 73 14 42 60 69 63 42 36 32 30 32 22 15 18 15 14 6 9 8 6 4 5 4 5 4 3 7 3 5 6 5 7 0 3 1 4 1 2 3 1 1 1 2 1 1 0 3 2 0 1 2 3 2 6 3 3 2 2 1 4 3 6 2 2 6 5 3 2 3 2 4 2 3 4 10 4 1 3 4 9 3 4 2 2 2 3 7 1 2 2 2 2 3 3 2 1 4 2 0 3 1 2 2 2 1 1 3 0 1 1 3 0 1 0 2 1 0 1 0 0 0 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -86,12 +101,12 @@ filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN Message Delayed Cycles ---------------------- -Total_delay_cycles: [binsize: 32 max: 1500 count: 6932 average: 17.1509 | standard deviation: 98.3547 | 6592 5 32 90 2 8 38 6 0 15 11 1 8 21 4 12 12 1 3 10 11 2 3 11 1 6 7 6 0 2 4 1 2 0 0 1 1 0 0 0 1 0 0 0 0 0 2 0 ] -Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 4219 average: 0 | standard deviation: 0 | 4219 ] - virtual_network_0_delay_cycles: [binsize: 32 max: 1500 count: 2713 average: 43.8223 | standard deviation: 153.471 | 2373 5 32 90 2 8 38 6 0 15 11 1 8 21 4 12 12 1 3 10 11 2 3 11 1 6 7 6 0 2 4 1 2 0 0 1 1 0 0 0 1 0 0 0 0 0 2 0 ] +Total_delay_cycles: [binsize: 32 max: 1370 count: 6560 average: 27.1387 | standard deviation: 120.504 | 6041 13 41 130 8 21 48 8 12 22 20 4 19 15 5 14 23 3 9 21 22 3 9 6 3 6 6 3 1 2 5 1 3 4 2 0 3 1 1 1 0 0 1 0 0 0 0 0 ] +Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 4028 average: 0 | standard deviation: 0 | 4028 ] + virtual_network_0_delay_cycles: [binsize: 32 max: 1370 count: 2532 average: 70.312 | standard deviation: 185.996 | 2013 13 41 130 8 21 48 8 12 22 20 4 19 15 5 14 23 3 9 21 22 3 9 6 3 6 6 3 1 2 5 1 3 4 2 0 3 1 1 1 0 0 1 0 0 0 0 0 ] virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 566 average: 0 | standard deviation: 0 | 566 ] - virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 3653 average: 0 | standard deviation: 0 | 3653 ] + virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 512 average: 0 | standard deviation: 0 | 512 ] + virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 3516 average: 0 | standard deviation: 0 | 3516 ] virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] @@ -102,9 +117,9 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 4219 average: 0 | standa Resource Usage -------------- page_size: 4096 -user_time: 1 +user_time: 0 system_time: 0 -page_reclaims: 8843 +page_reclaims: 9085 page_faults: 0 swaps: 0 block_inputs: 0 @@ -113,490 +128,494 @@ block_outputs: 0 Network Stats ------------- +total_msg_count_Control: 5304 42432 +total_msg_count_Request_Control: 1537 12296 +total_msg_count_Response_Data: 7619 548568 +total_msg_count_Response_Control: 6666 53328 +total_msg_count_Writeback_Data: 3615 260280 +total_msg_count_Writeback_Control: 132 1056 +total_msgs: 24873 total_bytes: 917960 + switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 0.105942 - links_utilized_percent_switch_0_link_0: 0.0300309 bw: 640000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 0.181853 bw: 160000 base_latency: 1 - - outgoing_messages_switch_0_link_0_Request_Control: 566 4528 [ 566 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 926 66672 [ 0 926 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Control: 357 2856 [ 0 357 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Control: 927 7416 [ 927 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Response_Control: 931 7448 [ 0 6 925 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 1342 96624 [ 783 559 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 78 624 [ 78 0 0 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_0: 0.103063 + links_utilized_percent_switch_0_link_0: 0.0310005 bw: 640000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 0.175124 bw: 160000 base_latency: 1 + + outgoing_messages_switch_0_link_0_Request_Control: 512 4096 [ 512 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 899 64728 [ 0 899 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Control: 379 3032 [ 0 379 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Control: 901 7208 [ 901 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Response_Control: 895 7160 [ 0 43 852 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 1205 86760 [ 736 469 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 44 352 [ 44 0 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 0.151597 - links_utilized_percent_switch_1_link_0: 0.0748065 bw: 640000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 0.228387 bw: 160000 base_latency: 1 - - outgoing_messages_switch_1_link_0_Control: 927 7416 [ 927 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Data: 905 65160 [ 0 905 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Control: 1831 14648 [ 0 906 925 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Data: 1342 96624 [ 783 559 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Control: 78 624 [ 78 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Control: 906 7248 [ 906 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Request_Control: 566 4528 [ 566 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 1743 125496 [ 0 1743 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Control: 441 3528 [ 0 441 0 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_1: 0.153567 + links_utilized_percent_switch_1_link_0: 0.0736531 bw: 640000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 0.233481 bw: 160000 base_latency: 1 + + outgoing_messages_switch_1_link_0_Control: 901 7208 [ 901 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Data: 866 62352 [ 0 866 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Control: 1756 14048 [ 0 904 852 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Data: 1205 86760 [ 736 469 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Control: 44 352 [ 44 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Request_Control: 513 4104 [ 513 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 1674 120528 [ 0 1674 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Control: 466 3728 [ 0 466 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 0.0722257 - links_utilized_percent_switch_2_link_0: 0.0270658 bw: 640000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 0.117386 bw: 160000 base_latency: 1 +links_utilized_percent_switch_2: 0.0734115 + links_utilized_percent_switch_2_link_0: 0.0273352 bw: 640000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 0.119488 bw: 160000 base_latency: 1 - outgoing_messages_switch_2_link_0_Control: 906 7248 [ 906 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Data: 817 58824 [ 0 817 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Control: 84 672 [ 0 84 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Data: 905 65160 [ 0 905 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Control: 901 7208 [ 0 901 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Data: 774 55728 [ 0 774 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Control: 87 696 [ 0 87 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Data: 866 62352 [ 0 866 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Control: 861 6888 [ 0 861 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 0.175871 - links_utilized_percent_switch_3_link_0: 0.120124 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 0.299226 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0.108263 bw: 160000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Request_Control: 566 4528 [ 566 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Data: 926 66672 [ 0 926 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Control: 357 2856 [ 0 357 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Control: 927 7416 [ 927 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Data: 905 65160 [ 0 905 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Control: 1831 14648 [ 0 906 925 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Data: 1342 96624 [ 783 559 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Control: 78 624 [ 78 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Control: 906 7248 [ 906 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Response_Data: 817 58824 [ 0 817 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Response_Control: 84 672 [ 0 84 0 0 0 0 0 0 0 0 ] base_latency: 1 - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - - --- L1Cache 0 --- +links_utilized_percent_switch_3: 0.176026 + links_utilized_percent_switch_3_link_0: 0.124002 bw: 160000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 0.294612 bw: 160000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 0.109465 bw: 160000 base_latency: 1 + + outgoing_messages_switch_3_link_0_Request_Control: 512 4096 [ 512 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Data: 899 64728 [ 0 899 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Control: 379 3032 [ 0 379 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Control: 901 7208 [ 901 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Data: 866 62352 [ 0 866 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Control: 1756 14048 [ 0 904 852 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Data: 1205 86760 [ 736 469 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Control: 44 352 [ 44 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Control: 867 6936 [ 867 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Response_Data: 775 55800 [ 0 775 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Response_Control: 87 696 [ 0 87 0 0 0 0 0 0 0 0 ] base_latency: 1 + +Cache Stats: system.l1_cntrl0.sequencer.icache + system.l1_cntrl0.sequencer.icache_total_misses: 0 + system.l1_cntrl0.sequencer.icache_total_demand_misses: 0 + system.l1_cntrl0.sequencer.icache_total_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_hw_prefetches: 0 + + +Cache Stats: system.l1_cntrl0.sequencer.dcache + system.l1_cntrl0.sequencer.dcache_total_misses: 0 + system.l1_cntrl0.sequencer.dcache_total_demand_misses: 0 + system.l1_cntrl0.sequencer.dcache_total_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_hw_prefetches: 0 + + + --- L1Cache --- - Event Counts - -Load 100 -Ifetch 0 -Store 1000 -Inv 566 -L1_Replacement 547844 -Fwd_GETX 0 -Fwd_GETS 0 -Fwd_GET_INSTR 0 -Data 0 -Data_Exclusive 88 -DataS_fromL1 0 -Data_all_Acks 838 -Ack 0 -Ack_all 0 -WB_Ack 357 +Load [53 ] 53 +Ifetch [260 ] 260 +Store [877 ] 877 +Inv [512 ] 512 +L1_Replacement [510484 ] 510484 +Fwd_GETX [0 ] 0 +Fwd_GETS [0 ] 0 +Fwd_GET_INSTR [0 ] 0 +Data [0 ] 0 +Data_Exclusive [48 ] 48 +DataS_fromL1 [0 ] 0 +Data_all_Acks [851 ] 851 +Ack [0 ] 0 +Ack_all [0 ] 0 +WB_Ack [379 ] 379 - Transitions - -NP Load 88 -NP Ifetch 0 <-- -NP Store 839 -NP Inv 0 <-- -NP L1_Replacement 0 <-- - -I Load 0 <-- -I Ifetch 0 <-- -I Store 0 <-- -I Inv 0 <-- -I L1_Replacement 63 - -S Load 0 <-- -S Ifetch 0 <-- -S Store 0 <-- -S Inv 0 <-- -S L1_Replacement 0 <-- - -E Load 0 <-- -E Ifetch 0 <-- -E Store 1 -E Inv 6 -E L1_Replacement 80 -E Fwd_GETX 0 <-- -E Fwd_GETS 0 <-- -E Fwd_GET_INSTR 0 <-- - -M Load 12 -M Ifetch 0 <-- -M Store 81 -M Inv 57 -M L1_Replacement 781 -M Fwd_GETX 0 <-- -M Fwd_GETS 0 <-- -M Fwd_GET_INSTR 0 <-- - -IS Load 0 <-- -IS Ifetch 0 <-- -IS Store 0 <-- -IS Inv 0 <-- -IS L1_Replacement 46341 -IS Data_Exclusive 88 -IS DataS_fromL1 0 <-- -IS Data_all_Acks 0 <-- - -IM Load 0 <-- -IM Ifetch 0 <-- -IM Store 0 <-- -IM Inv 0 <-- -IM L1_Replacement 500579 -IM Data 0 <-- -IM Data_all_Acks 838 -IM Ack 0 <-- - -SM Load 0 <-- -SM Ifetch 0 <-- -SM Store 0 <-- -SM Inv 0 <-- -SM L1_Replacement 0 <-- -SM Ack 0 <-- -SM Ack_all 0 <-- - -IS_I Load 0 <-- -IS_I Ifetch 0 <-- -IS_I Store 0 <-- -IS_I Inv 0 <-- -IS_I L1_Replacement 0 <-- -IS_I Data_Exclusive 0 <-- -IS_I DataS_fromL1 0 <-- -IS_I Data_all_Acks 0 <-- - -M_I Load 0 <-- -M_I Ifetch 0 <-- -M_I Store 79 -M_I Inv 503 -M_I L1_Replacement 0 <-- -M_I Fwd_GETX 0 <-- -M_I Fwd_GETS 0 <-- -M_I Fwd_GET_INSTR 0 <-- -M_I WB_Ack 357 - -E_I Load 0 <-- -E_I Ifetch 0 <-- -E_I Store 0 <-- -E_I L1_Replacement 0 <-- - -Cache Stats: system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_misses: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_demand_misses: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_prefetches: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - - --- L2Cache 0 --- +NP Load [48 ] 48 +NP Ifetch [47 ] 47 +NP Store [806 ] 806 +NP Inv [1 ] 1 +NP L1_Replacement [0 ] 0 + +I Load [0 ] 0 +I Ifetch [0 ] 0 +I Store [0 ] 0 +I Inv [0 ] 0 +I L1_Replacement [110 ] 110 + +S Load [0 ] 0 +S Ifetch [0 ] 0 +S Store [0 ] 0 +S Inv [26 ] 26 +S L1_Replacement [6 ] 6 + +E Load [0 ] 0 +E Ifetch [0 ] 0 +E Store [0 ] 0 +E Inv [3 ] 3 +E L1_Replacement [45 ] 45 +E Fwd_GETX [0 ] 0 +E Fwd_GETS [0 ] 0 +E Fwd_GET_INSTR [0 ] 0 + +M Load [5 ] 5 +M Ifetch [0 ] 0 +M Store [70 ] 70 +M Inv [68 ] 68 +M L1_Replacement [735 ] 735 +M Fwd_GETX [0 ] 0 +M Fwd_GETS [0 ] 0 +M Fwd_GET_INSTR [0 ] 0 + +IS Load [0 ] 0 +IS Ifetch [0 ] 0 +IS Store [0 ] 0 +IS Inv [13 ] 13 +IS L1_Replacement [28783 ] 28783 +IS Data_Exclusive [48 ] 48 +IS DataS_fromL1 [0 ] 0 +IS Data_all_Acks [34 ] 34 + +IM Load [0 ] 0 +IM Ifetch [0 ] 0 +IM Store [0 ] 0 +IM Inv [0 ] 0 +IM L1_Replacement [480805 ] 480805 +IM Data [0 ] 0 +IM Data_all_Acks [804 ] 804 +IM Ack [0 ] 0 + +SM Load [0 ] 0 +SM Ifetch [0 ] 0 +SM Store [0 ] 0 +SM Inv [0 ] 0 +SM L1_Replacement [0 ] 0 +SM Ack [0 ] 0 +SM Ack_all [0 ] 0 + +IS_I Load [0 ] 0 +IS_I Ifetch [0 ] 0 +IS_I Store [0 ] 0 +IS_I Inv [0 ] 0 +IS_I L1_Replacement [0 ] 0 +IS_I Data_Exclusive [0 ] 0 +IS_I DataS_fromL1 [0 ] 0 +IS_I Data_all_Acks [13 ] 13 + +M_I Load [0 ] 0 +M_I Ifetch [213 ] 213 +M_I Store [1 ] 1 +M_I Inv [401 ] 401 +M_I L1_Replacement [0 ] 0 +M_I Fwd_GETX [0 ] 0 +M_I Fwd_GETS [0 ] 0 +M_I Fwd_GET_INSTR [0 ] 0 +M_I WB_Ack [379 ] 379 + +E_I Load [0 ] 0 +E_I Ifetch [0 ] 0 +E_I Store [0 ] 0 +E_I L1_Replacement [0 ] 0 + +Cache Stats: system.l2_cntrl0.L2cacheMemory + system.l2_cntrl0.L2cacheMemory_total_misses: 0 + system.l2_cntrl0.L2cacheMemory_total_demand_misses: 0 + system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 + + + --- L2Cache --- - Event Counts - -L1_GET_INSTR 0 -L1_GETS 94 -L1_GETX 851 -L1_UPGRADE 0 -L1_PUTX 506 -L1_PUTX_old 504 -Fwd_L1_GETX 0 -Fwd_L1_GETS 0 -Fwd_L1_GET_INSTR 0 -L2_Replacement 292 -L2_Replacement_clean 12332 -Mem_Data 905 -Mem_Ack 900 -WB_Data 525 -WB_Data_clean 34 -Ack 0 -Ack_all 6 -Unblock 0 -Unblock_Cancel 0 -Exclusive_Unblock 925 -MEM_Inv 0 +L1_GET_INSTR [48 ] 48 +L1_GETS [48 ] 48 +L1_GETX [807 ] 807 +L1_UPGRADE [0 ] 0 +L1_PUTX [568 ] 568 +L1_PUTX_old [1966 ] 1966 +Fwd_L1_GETX [0 ] 0 +Fwd_L1_GETS [0 ] 0 +Fwd_L1_GET_INSTR [0 ] 0 +L2_Replacement [328 ] 328 +L2_Replacement_clean [16621 ] 16621 +Mem_Data [865 ] 865 +Mem_Ack [861 ] 861 +WB_Data [447 ] 447 +WB_Data_clean [22 ] 22 +Ack [0 ] 0 +Ack_all [43 ] 43 +Unblock [0 ] 0 +Unblock_Cancel [0 ] 0 +Exclusive_Unblock [852 ] 852 +MEM_Inv [0 ] 0 - Transitions - -NP L1_GET_INSTR 0 <-- -NP L1_GETS 86 -NP L1_GETX 820 -NP L1_PUTX 0 <-- -NP L1_PUTX_old 95 - -SS L1_GET_INSTR 0 <-- -SS L1_GETS 0 <-- -SS L1_GETX 0 <-- -SS L1_UPGRADE 0 <-- -SS L1_PUTX 0 <-- -SS L1_PUTX_old 0 <-- -SS L2_Replacement 0 <-- -SS L2_Replacement_clean 0 <-- -SS MEM_Inv 0 <-- - -M L1_GET_INSTR 0 <-- -M L1_GETS 2 -M L1_GETX 19 -M L1_PUTX 0 <-- -M L1_PUTX_old 0 <-- -M L2_Replacement 292 -M L2_Replacement_clean 44 -M MEM_Inv 0 <-- - -MT L1_GET_INSTR 0 <-- -MT L1_GETS 0 <-- -MT L1_GETX 0 <-- -MT L1_PUTX 357 -MT L1_PUTX_old 0 <-- -MT L2_Replacement 0 <-- -MT L2_Replacement_clean 566 -MT MEM_Inv 0 <-- - -M_I L1_GET_INSTR 0 <-- -M_I L1_GETS 6 -M_I L1_GETX 12 -M_I L1_UPGRADE 0 <-- -M_I L1_PUTX 0 <-- -M_I L1_PUTX_old 108 -M_I Mem_Ack 900 -M_I MEM_Inv 0 <-- - -MT_I L1_GET_INSTR 0 <-- -MT_I L1_GETS 0 <-- -MT_I L1_GETX 0 <-- -MT_I L1_UPGRADE 0 <-- -MT_I L1_PUTX 0 <-- -MT_I L1_PUTX_old 0 <-- -MT_I WB_Data 0 <-- -MT_I WB_Data_clean 0 <-- -MT_I Ack_all 0 <-- -MT_I MEM_Inv 0 <-- - -MCT_I L1_GET_INSTR 0 <-- -MCT_I L1_GETS 0 <-- -MCT_I L1_GETX 0 <-- -MCT_I L1_UPGRADE 0 <-- -MCT_I L1_PUTX 0 <-- -MCT_I L1_PUTX_old 124 -MCT_I WB_Data 525 -MCT_I WB_Data_clean 34 -MCT_I Ack_all 6 - -I_I L1_GET_INSTR 0 <-- -I_I L1_GETS 0 <-- -I_I L1_GETX 0 <-- -I_I L1_UPGRADE 0 <-- -I_I L1_PUTX 0 <-- -I_I L1_PUTX_old 0 <-- -I_I Ack 0 <-- -I_I Ack_all 0 <-- - -S_I L1_GET_INSTR 0 <-- -S_I L1_GETS 0 <-- -S_I L1_GETX 0 <-- -S_I L1_UPGRADE 0 <-- -S_I L1_PUTX 0 <-- -S_I L1_PUTX_old 0 <-- -S_I Ack 0 <-- -S_I Ack_all 0 <-- -S_I MEM_Inv 0 <-- - -ISS L1_GET_INSTR 0 <-- -ISS L1_GETS 0 <-- -ISS L1_GETX 0 <-- -ISS L1_PUTX 0 <-- -ISS L1_PUTX_old 0 <-- -ISS L2_Replacement 0 <-- -ISS L2_Replacement_clean 481 -ISS Mem_Data 86 -ISS MEM_Inv 0 <-- - -IS L1_GET_INSTR 0 <-- -IS L1_GETS 0 <-- -IS L1_GETX 0 <-- -IS L1_PUTX 0 <-- -IS L1_PUTX_old 0 <-- -IS L2_Replacement 0 <-- -IS L2_Replacement_clean 0 <-- -IS Mem_Data 0 <-- -IS MEM_Inv 0 <-- - -IM L1_GET_INSTR 0 <-- -IM L1_GETS 0 <-- -IM L1_GETX 0 <-- -IM L1_PUTX 0 <-- -IM L1_PUTX_old 0 <-- -IM L2_Replacement 0 <-- -IM L2_Replacement_clean 4544 -IM Mem_Data 819 -IM MEM_Inv 0 <-- - -SS_MB L1_GET_INSTR 0 <-- -SS_MB L1_GETS 0 <-- -SS_MB L1_GETX 0 <-- -SS_MB L1_UPGRADE 0 <-- -SS_MB L1_PUTX 0 <-- -SS_MB L1_PUTX_old 0 <-- -SS_MB L2_Replacement 0 <-- -SS_MB L2_Replacement_clean 0 <-- -SS_MB Unblock_Cancel 0 <-- -SS_MB Exclusive_Unblock 0 <-- -SS_MB MEM_Inv 0 <-- - -MT_MB L1_GET_INSTR 0 <-- -MT_MB L1_GETS 0 <-- -MT_MB L1_GETX 0 <-- -MT_MB L1_UPGRADE 0 <-- -MT_MB L1_PUTX 149 -MT_MB L1_PUTX_old 177 -MT_MB L2_Replacement 0 <-- -MT_MB L2_Replacement_clean 6697 -MT_MB Unblock_Cancel 0 <-- -MT_MB Exclusive_Unblock 925 -MT_MB MEM_Inv 0 <-- - -M_MB L1_GET_INSTR 0 <-- -M_MB L1_GETS 0 <-- -M_MB L1_GETX 0 <-- -M_MB L1_UPGRADE 0 <-- -M_MB L1_PUTX 0 <-- -M_MB L1_PUTX_old 0 <-- -M_MB L2_Replacement 0 <-- -M_MB L2_Replacement_clean 0 <-- -M_MB Exclusive_Unblock 0 <-- -M_MB MEM_Inv 0 <-- - -MT_IIB L1_GET_INSTR 0 <-- -MT_IIB L1_GETS 0 <-- -MT_IIB L1_GETX 0 <-- -MT_IIB L1_UPGRADE 0 <-- -MT_IIB L1_PUTX 0 <-- -MT_IIB L1_PUTX_old 0 <-- -MT_IIB L2_Replacement 0 <-- -MT_IIB L2_Replacement_clean 0 <-- -MT_IIB WB_Data 0 <-- -MT_IIB WB_Data_clean 0 <-- -MT_IIB Unblock 0 <-- -MT_IIB MEM_Inv 0 <-- - -MT_IB L1_GET_INSTR 0 <-- -MT_IB L1_GETS 0 <-- -MT_IB L1_GETX 0 <-- -MT_IB L1_UPGRADE 0 <-- -MT_IB L1_PUTX 0 <-- -MT_IB L1_PUTX_old 0 <-- -MT_IB L2_Replacement 0 <-- -MT_IB L2_Replacement_clean 0 <-- -MT_IB WB_Data 0 <-- -MT_IB WB_Data_clean 0 <-- -MT_IB Unblock_Cancel 0 <-- -MT_IB MEM_Inv 0 <-- - -MT_SB L1_GET_INSTR 0 <-- -MT_SB L1_GETS 0 <-- -MT_SB L1_GETX 0 <-- -MT_SB L1_UPGRADE 0 <-- -MT_SB L1_PUTX 0 <-- -MT_SB L1_PUTX_old 0 <-- -MT_SB L2_Replacement 0 <-- -MT_SB L2_Replacement_clean 0 <-- -MT_SB Unblock 0 <-- -MT_SB MEM_Inv 0 <-- - -Memory controller: system.ruby.network.topology.ext_links2.ext_node.memBuffer: - memory_total_requests: 1723 - memory_reads: 906 - memory_writes: 817 - memory_refreshes: 803 - memory_total_request_delays: 1221 - memory_delays_per_request: 0.708648 - memory_delays_in_input_queue: 188 - memory_delays_behind_head_of_bank_queue: 7 - memory_delays_stalled_at_head_of_bank_queue: 1026 - memory_stalls_for_bank_busy: 216 +NP L1_GET_INSTR [41 ] 41 +NP L1_GETS [47 ] 47 +NP L1_GETX [779 ] 779 +NP L1_PUTX [0 ] 0 +NP L1_PUTX_old [93 ] 93 + +SS L1_GET_INSTR [0 ] 0 +SS L1_GETS [0 ] 0 +SS L1_GETX [5 ] 5 +SS L1_UPGRADE [0 ] 0 +SS L1_PUTX [0 ] 0 +SS L1_PUTX_old [0 ] 0 +SS L2_Replacement [0 ] 0 +SS L2_Replacement_clean [41 ] 41 +SS MEM_Inv [0 ] 0 + +M L1_GET_INSTR [6 ] 6 +M L1_GETS [1 ] 1 +M L1_GETX [22 ] 22 +M L1_PUTX [0 ] 0 +M L1_PUTX_old [0 ] 0 +M L2_Replacement [328 ] 328 +M L2_Replacement_clean [22 ] 22 +M MEM_Inv [0 ] 0 + +MT L1_GET_INSTR [0 ] 0 +MT L1_GETS [0 ] 0 +MT L1_GETX [0 ] 0 +MT L1_PUTX [379 ] 379 +MT L1_PUTX_old [0 ] 0 +MT L2_Replacement [0 ] 0 +MT L2_Replacement_clean [472 ] 472 +MT MEM_Inv [0 ] 0 + +M_I L1_GET_INSTR [1 ] 1 +M_I L1_GETS [0 ] 0 +M_I L1_GETX [1 ] 1 +M_I L1_UPGRADE [0 ] 0 +M_I L1_PUTX [0 ] 0 +M_I L1_PUTX_old [140 ] 140 +M_I Mem_Ack [861 ] 861 +M_I MEM_Inv [0 ] 0 + +MT_I L1_GET_INSTR [0 ] 0 +MT_I L1_GETS [0 ] 0 +MT_I L1_GETX [0 ] 0 +MT_I L1_UPGRADE [0 ] 0 +MT_I L1_PUTX [0 ] 0 +MT_I L1_PUTX_old [0 ] 0 +MT_I WB_Data [0 ] 0 +MT_I WB_Data_clean [0 ] 0 +MT_I Ack_all [0 ] 0 +MT_I MEM_Inv [0 ] 0 + +MCT_I L1_GET_INSTR [0 ] 0 +MCT_I L1_GETS [0 ] 0 +MCT_I L1_GETX [0 ] 0 +MCT_I L1_UPGRADE [0 ] 0 +MCT_I L1_PUTX [0 ] 0 +MCT_I L1_PUTX_old [167 ] 167 +MCT_I WB_Data [447 ] 447 +MCT_I WB_Data_clean [22 ] 22 +MCT_I Ack_all [3 ] 3 + +I_I L1_GET_INSTR [0 ] 0 +I_I L1_GETS [0 ] 0 +I_I L1_GETX [0 ] 0 +I_I L1_UPGRADE [0 ] 0 +I_I L1_PUTX [0 ] 0 +I_I L1_PUTX_old [0 ] 0 +I_I Ack [0 ] 0 +I_I Ack_all [40 ] 40 + +S_I L1_GET_INSTR [0 ] 0 +S_I L1_GETS [0 ] 0 +S_I L1_GETX [0 ] 0 +S_I L1_UPGRADE [0 ] 0 +S_I L1_PUTX [0 ] 0 +S_I L1_PUTX_old [0 ] 0 +S_I Ack [0 ] 0 +S_I Ack_all [0 ] 0 +S_I MEM_Inv [0 ] 0 + +ISS L1_GET_INSTR [0 ] 0 +ISS L1_GETS [0 ] 0 +ISS L1_GETX [0 ] 0 +ISS L1_PUTX [0 ] 0 +ISS L1_PUTX_old [0 ] 0 +ISS L2_Replacement [0 ] 0 +ISS L2_Replacement_clean [376 ] 376 +ISS Mem_Data [47 ] 47 +ISS MEM_Inv [0 ] 0 + +IS L1_GET_INSTR [0 ] 0 +IS L1_GETS [0 ] 0 +IS L1_GETX [0 ] 0 +IS L1_PUTX [0 ] 0 +IS L1_PUTX_old [0 ] 0 +IS L2_Replacement [0 ] 0 +IS L2_Replacement_clean [1234 ] 1234 +IS Mem_Data [41 ] 41 +IS MEM_Inv [0 ] 0 + +IM L1_GET_INSTR [0 ] 0 +IM L1_GETS [0 ] 0 +IM L1_GETX [0 ] 0 +IM L1_PUTX [0 ] 0 +IM L1_PUTX_old [0 ] 0 +IM L2_Replacement [0 ] 0 +IM L2_Replacement_clean [5858 ] 5858 +IM Mem_Data [777 ] 777 +IM MEM_Inv [0 ] 0 + +SS_MB L1_GET_INSTR [0 ] 0 +SS_MB L1_GETS [0 ] 0 +SS_MB L1_GETX [0 ] 0 +SS_MB L1_UPGRADE [0 ] 0 +SS_MB L1_PUTX [0 ] 0 +SS_MB L1_PUTX_old [0 ] 0 +SS_MB L2_Replacement [0 ] 0 +SS_MB L2_Replacement_clean [0 ] 0 +SS_MB Unblock_Cancel [0 ] 0 +SS_MB Exclusive_Unblock [5 ] 5 +SS_MB MEM_Inv [0 ] 0 + +MT_MB L1_GET_INSTR [0 ] 0 +MT_MB L1_GETS [0 ] 0 +MT_MB L1_GETX [0 ] 0 +MT_MB L1_UPGRADE [0 ] 0 +MT_MB L1_PUTX [189 ] 189 +MT_MB L1_PUTX_old [1566 ] 1566 +MT_MB L2_Replacement [0 ] 0 +MT_MB L2_Replacement_clean [8618 ] 8618 +MT_MB Unblock_Cancel [0 ] 0 +MT_MB Exclusive_Unblock [847 ] 847 +MT_MB MEM_Inv [0 ] 0 + +M_MB L1_GET_INSTR [0 ] 0 +M_MB L1_GETS [0 ] 0 +M_MB L1_GETX [0 ] 0 +M_MB L1_UPGRADE [0 ] 0 +M_MB L1_PUTX [0 ] 0 +M_MB L1_PUTX_old [0 ] 0 +M_MB L2_Replacement [0 ] 0 +M_MB L2_Replacement_clean [0 ] 0 +M_MB Exclusive_Unblock [0 ] 0 +M_MB MEM_Inv [0 ] 0 + +MT_IIB L1_GET_INSTR [0 ] 0 +MT_IIB L1_GETS [0 ] 0 +MT_IIB L1_GETX [0 ] 0 +MT_IIB L1_UPGRADE [0 ] 0 +MT_IIB L1_PUTX [0 ] 0 +MT_IIB L1_PUTX_old [0 ] 0 +MT_IIB L2_Replacement [0 ] 0 +MT_IIB L2_Replacement_clean [0 ] 0 +MT_IIB WB_Data [0 ] 0 +MT_IIB WB_Data_clean [0 ] 0 +MT_IIB Unblock [0 ] 0 +MT_IIB MEM_Inv [0 ] 0 + +MT_IB L1_GET_INSTR [0 ] 0 +MT_IB L1_GETS [0 ] 0 +MT_IB L1_GETX [0 ] 0 +MT_IB L1_UPGRADE [0 ] 0 +MT_IB L1_PUTX [0 ] 0 +MT_IB L1_PUTX_old [0 ] 0 +MT_IB L2_Replacement [0 ] 0 +MT_IB L2_Replacement_clean [0 ] 0 +MT_IB WB_Data [0 ] 0 +MT_IB WB_Data_clean [0 ] 0 +MT_IB Unblock_Cancel [0 ] 0 +MT_IB MEM_Inv [0 ] 0 + +MT_SB L1_GET_INSTR [0 ] 0 +MT_SB L1_GETS [0 ] 0 +MT_SB L1_GETX [0 ] 0 +MT_SB L1_UPGRADE [0 ] 0 +MT_SB L1_PUTX [0 ] 0 +MT_SB L1_PUTX_old [0 ] 0 +MT_SB L2_Replacement [0 ] 0 +MT_SB L2_Replacement_clean [0 ] 0 +MT_SB Unblock [0 ] 0 +MT_SB MEM_Inv [0 ] 0 + +Memory controller: system.dir_cntrl0.memBuffer: + memory_total_requests: 1641 + memory_reads: 867 + memory_writes: 774 + memory_refreshes: 755 + memory_total_request_delays: 1219 + memory_delays_per_request: 0.74284 + memory_delays_in_input_queue: 205 + memory_delays_behind_head_of_bank_queue: 0 + memory_delays_stalled_at_head_of_bank_queue: 1014 + memory_stalls_for_bank_busy: 156 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 86 - memory_stalls_for_bus: 387 + memory_stalls_for_arbitration: 89 + memory_stalls_for_bus: 403 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 251 - memory_stalls_for_read_read_turnaround: 86 - accesses_per_bank: 63 53 48 94 79 59 62 65 55 57 52 50 48 47 45 40 39 56 50 45 64 47 43 53 58 51 52 54 52 47 50 45 + memory_stalls_for_read_write_turnaround: 288 + memory_stalls_for_read_read_turnaround: 78 + accesses_per_bank: 54 61 46 85 55 63 50 44 52 43 42 47 32 53 58 44 49 60 55 44 56 46 52 48 42 68 40 47 41 48 61 55 - --- Directory 0 --- + --- Directory --- - Event Counts - -Fetch 906 -Data 817 -Memory_Data 906 -Memory_Ack 817 -DMA_READ 0 -DMA_WRITE 0 -CleanReplacement 84 +Fetch [867 ] 867 +Data [774 ] 774 +Memory_Data [866 ] 866 +Memory_Ack [774 ] 774 +DMA_READ [0 ] 0 +DMA_WRITE [0 ] 0 +CleanReplacement [87 ] 87 - Transitions - -I Fetch 906 -I DMA_READ 0 <-- -I DMA_WRITE 0 <-- - -ID Fetch 0 <-- -ID Data 0 <-- -ID Memory_Data 0 <-- -ID DMA_READ 0 <-- -ID DMA_WRITE 0 <-- - -ID_W Fetch 0 <-- -ID_W Data 0 <-- -ID_W Memory_Ack 0 <-- -ID_W DMA_READ 0 <-- -ID_W DMA_WRITE 0 <-- - -M Data 817 -M DMA_READ 0 <-- -M DMA_WRITE 0 <-- -M CleanReplacement 84 - -IM Fetch 0 <-- -IM Data 0 <-- -IM Memory_Data 906 -IM DMA_READ 0 <-- -IM DMA_WRITE 0 <-- - -MI Fetch 0 <-- -MI Data 0 <-- -MI Memory_Ack 817 -MI DMA_READ 0 <-- -MI DMA_WRITE 0 <-- - -M_DRD Data 0 <-- -M_DRD DMA_READ 0 <-- -M_DRD DMA_WRITE 0 <-- - -M_DRDI Fetch 0 <-- -M_DRDI Data 0 <-- -M_DRDI Memory_Ack 0 <-- -M_DRDI DMA_READ 0 <-- -M_DRDI DMA_WRITE 0 <-- - -M_DWR Data 0 <-- -M_DWR DMA_READ 0 <-- -M_DWR DMA_WRITE 0 <-- - -M_DWRI Fetch 0 <-- -M_DWRI Data 0 <-- -M_DWRI Memory_Ack 0 <-- -M_DWRI DMA_READ 0 <-- -M_DWRI DMA_WRITE 0 <-- - +I Fetch [867 ] 867 +I DMA_READ [0 ] 0 +I DMA_WRITE [0 ] 0 + +ID Fetch [0 ] 0 +ID Data [0 ] 0 +ID Memory_Data [0 ] 0 +ID DMA_READ [0 ] 0 +ID DMA_WRITE [0 ] 0 + +ID_W Fetch [0 ] 0 +ID_W Data [0 ] 0 +ID_W Memory_Ack [0 ] 0 +ID_W DMA_READ [0 ] 0 +ID_W DMA_WRITE [0 ] 0 + +M Data [774 ] 774 +M DMA_READ [0 ] 0 +M DMA_WRITE [0 ] 0 +M CleanReplacement [87 ] 87 + +IM Fetch [0 ] 0 +IM Data [0 ] 0 +IM Memory_Data [866 ] 866 +IM DMA_READ [0 ] 0 +IM DMA_WRITE [0 ] 0 + +MI Fetch [0 ] 0 +MI Data [0 ] 0 +MI Memory_Ack [774 ] 774 +MI DMA_READ [0 ] 0 +MI DMA_WRITE [0 ] 0 + +M_DRD Data [0 ] 0 +M_DRD DMA_READ [0 ] 0 +M_DRD DMA_WRITE [0 ] 0 + +M_DRDI Fetch [0 ] 0 +M_DRDI Data [0 ] 0 +M_DRDI Memory_Ack [0 ] 0 +M_DRDI DMA_READ [0 ] 0 +M_DRDI DMA_WRITE [0 ] 0 + +M_DWR Data [0 ] 0 +M_DWR DMA_READ [0 ] 0 +M_DWR DMA_WRITE [0 ] 0 + +M_DWRI Fetch [0 ] 0 +M_DWRI Data [0 ] 0 +M_DWRI Memory_Ack [0 ] 0 +M_DWRI DMA_READ [0 ] 0 +M_DWRI DMA_WRITE
\ No newline at end of file diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout index ff895dd4e..d3d3f1d85 100755 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 18 2010 14:36:48 -M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates -M5 started Mar 18 2010 14:37:00 -M5 executing on cabr0210 +M5 compiled Aug 20 2010 11:26:07 +M5 revision 7074a6fb3b4f 7537 default qtip tip brad/regress_updates +M5 started Aug 20 2010 11:29:00 +M5 executing on SC2B0629 command line: build/ALPHA_SE_MESI_CMP_directory/m5.fast -d build/ALPHA_SE_MESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_SE_MESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 385311 because Ruby Tester completed +Exiting @ tick 362171 because Ruby Tester completed diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt index 8113545a6..0b8e7d477 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt @@ -1,10 +1,10 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 208556 # Number of bytes of host memory used -host_seconds 0.90 # Real time elapsed on the host -host_tick_rate 429636 # Simulator tick rate (ticks/s) +host_mem_usage 209424 # Number of bytes of host memory used +host_seconds 0.56 # Real time elapsed on the host +host_tick_rate 645865 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.000385 # Number of seconds simulated -sim_ticks 385311 # Number of ticks simulated +sim_seconds 0.000362 # Number of seconds simulated +sim_ticks 362171 # Number of ticks simulated ---------- End Simulation Statistics ---------- diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini index c745e4b82..f737a2a36 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini @@ -5,10 +5,114 @@ dummy=0 [system] type=System -children=physmem ruby +children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby mem_mode=timing physmem=system.physmem +[system.dir_cntrl0] +type=Directory_Controller +children=directory memBuffer +buffer_size=0 +directory=system.dir_cntrl0.directory +directory_latency=6 +memBuffer=system.dir_cntrl0.memBuffer +number_of_TBEs=256 +recycle_latency=10 +transitions_per_cycle=32 +version=0 + +[system.dir_cntrl0.directory] +type=RubyDirectoryMemory +map_levels=4 +numa_high_bit=6 +size=134217728 +use_map=false +version=0 + +[system.dir_cntrl0.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.l1_cntrl0] +type=L1Cache_Controller +children=sequencer +L1DcacheMemory=system.l1_cntrl0.sequencer.dcache +L1IcacheMemory=system.l1_cntrl0.sequencer.icache +buffer_size=0 +l2_select_num_bits=0 +number_of_TBEs=256 +recycle_latency=10 +request_latency=2 +sequencer=system.l1_cntrl0.sequencer +transitions_per_cycle=32 +version=0 + +[system.l1_cntrl0.sequencer] +type=RubySequencer +children=dcache icache +dcache=system.l1_cntrl0.sequencer.dcache +deadlock_threshold=500000 +icache=system.l1_cntrl0.sequencer.icache +max_outstanding_requests=16 +physmem=system.physmem +using_ruby_tester=true +version=0 +physMemPort=system.physmem.port[0] +port=root.cpuPort[0] + +[system.l1_cntrl0.sequencer.dcache] +type=RubyCache +assoc=2 +latency=3 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l1_cntrl0.sequencer.icache] +type=RubyCache +assoc=2 +latency=3 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l2_cntrl0] +type=L2Cache_Controller +children=L2cacheMemory +L2cacheMemory=system.l2_cntrl0.L2cacheMemory +buffer_size=0 +number_of_TBEs=256 +recycle_latency=10 +request_latency=2 +response_latency=2 +transitions_per_cycle=32 +version=0 + +[system.l2_cntrl0.L2cacheMemory] +type=RubyCache +assoc=2 +latency=15 +replacement_policy=PSEUDO_LRU +size=512 +start_index_bit=6 + [system.physmem] type=PhysicalMemory file= @@ -17,7 +121,7 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort +port=system.l1_cntrl0.sequencer.physMemPort [system.ruby] type=RubySystem @@ -58,137 +162,34 @@ type=Topology children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2 +name=Crossbar num_int_nodes=4 print_config=false [system.ruby.network.topology.ext_links0] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links0.ext_node +ext_node=system.l1_cntrl0 int_node=0 latency=1 weight=1 -[system.ruby.network.topology.ext_links0.ext_node] -type=L1Cache_Controller -children=sequencer -L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -buffer_size=0 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -request_latency=2 -sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer] -type=RubySequencer -children=dcache icache -dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -deadlock_threshold=500000 -icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -max_outstanding_requests=16 -physmem=system.physmem -using_ruby_tester=true -version=0 -physMemPort=system.physmem.port[0] -port=root.cpuPort[0] - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - [system.ruby.network.topology.ext_links1] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links1.ext_node +ext_node=system.l2_cntrl0 int_node=1 latency=1 weight=1 -[system.ruby.network.topology.ext_links1.ext_node] -type=L2Cache_Controller -children=L2cacheMemory -L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory -buffer_size=0 -number_of_TBEs=256 -recycle_latency=10 -request_latency=2 -response_latency=2 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory] -type=RubyCache -assoc=2 -latency=15 -replacement_policy=PSEUDO_LRU -size=512 - [system.ruby.network.topology.ext_links2] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links2.ext_node +ext_node=system.dir_cntrl0 int_node=2 latency=1 weight=1 -[system.ruby.network.topology.ext_links2.ext_node] -type=Directory_Controller -children=directory memBuffer -buffer_size=0 -directory=system.ruby.network.topology.ext_links2.ext_node.directory -directory_latency=6 -memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer -number_of_TBEs=256 -recycle_latency=10 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links2.ext_node.directory] -type=RubyDirectoryMemory -map_levels=4 -numa_high_bit=0 -size=134217728 -use_map=false -version=0 - -[system.ruby.network.topology.ext_links2.ext_node.memBuffer] -type=RubyMemoryControl -bank_bit_0=8 -bank_busy_time=11 -bank_queue_size=12 -banks_per_rank=8 -basic_bus_busy_time=2 -dimm_bit_0=12 -dimms_per_channel=2 -mem_bus_cycle_multiplier=10 -mem_ctl_latency=12 -mem_fixed_delay=0 -mem_random_arbitrate=0 -rank_bit_0=11 -rank_rank_delay=1 -ranks_per_dimm=2 -read_write_delay=2 -refresh_period=1560 -tFaw=0 -version=0 - [system.ruby.network.topology.int_links0] type=IntLink bw_multiplier=16 diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats index 2cfd0af56..8aa6f62e7 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats @@ -13,7 +13,7 @@ RubySystem config: Network Configuration --------------------- network: SIMPLE_NETWORK -topology: +topology: Crossbar virtual_net_0: active, unordered virtual_net_1: active, unordered @@ -34,29 +34,29 @@ periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ -Real time: Mar/18/2010 14:40:26 +Real time: Aug/05/2010 10:40:25 Profiler Stats -------------- -Elapsed_time_in_seconds: 7 -Elapsed_time_in_minutes: 0.116667 -Elapsed_time_in_hours: 0.00194444 -Elapsed_time_in_days: 8.10185e-05 +Elapsed_time_in_seconds: 1 +Elapsed_time_in_minutes: 0.0166667 +Elapsed_time_in_hours: 0.000277778 +Elapsed_time_in_days: 1.15741e-05 -Virtual_time_in_seconds: 1.19 -Virtual_time_in_minutes: 0.0198333 -Virtual_time_in_hours: 0.000330556 -Virtual_time_in_days: 1.37731e-05 +Virtual_time_in_seconds: 1.03 +Virtual_time_in_minutes: 0.0171667 +Virtual_time_in_hours: 0.000286111 +Virtual_time_in_days: 1.19213e-05 -Ruby_current_time: 382981 +Ruby_current_time: 372291 Ruby_start_time: 0 -Ruby_cycles: 382981 +Ruby_cycles: 372291 -mbytes_resident: 30.7617 -mbytes_total: 203.789 -resident_ratio: 0.150987 +mbytes_resident: 31.6016 +mbytes_total: 31.6094 +resident_ratio: 1 -ruby_cycles_executed: [ 382982 ] +ruby_cycles_executed: [ 372292 ] Busy Controller Counts: L2Cache-0:0 @@ -66,13 +66,28 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 999 average: 15.8288 | standard deviation: 1.12451 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 52 933 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1034 average: 15.8404 | standard deviation: 1.10398 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 46 974 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 256 max: 35174 count: 984 average: 6099.68 | standard deviation: 8576.16 | 88 23 79 106 74 53 72 37 25 27 17 28 22 12 10 11 8 12 6 5 2 6 2 1 3 5 6 2 2 2 2 0 2 5 1 2 1 2 1 0 1 4 2 2 4 5 5 5 2 4 1 4 3 3 1 1 5 2 0 3 1 1 2 0 3 6 1 5 8 0 4 7 3 1 2 4 2 3 2 2 5 3 3 1 2 5 1 3 3 2 4 4 6 2 2 3 3 2 1 1 2 4 1 1 3 0 0 2 2 0 4 1 1 1 2 0 2 3 2 0 2 0 0 3 3 3 2 0 2 1 1 0 0 0 1 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_2: [binsize: 256 max: 34854 count: 100 average: 7109.16 | standard deviation: 10187.8 | 11 1 8 10 5 6 6 3 4 6 0 4 5 1 0 1 1 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 1 1 0 1 1 0 0 0 1 0 0 0 0 2 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 2 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_3: [binsize: 256 max: 35174 count: 884 average: 5985.48 | standard deviation: 8373.45 | 77 22 71 96 69 47 66 34 21 21 17 24 17 11 10 10 7 12 6 4 2 6 2 1 2 4 6 2 2 2 2 0 1 5 1 2 1 2 1 0 1 4 2 2 4 5 5 5 2 4 1 3 3 3 1 1 5 2 0 3 1 1 1 0 3 5 1 4 7 0 3 6 3 1 2 3 2 3 2 2 3 2 2 1 2 5 1 3 3 2 4 4 6 2 2 3 3 2 1 0 2 2 1 1 3 0 0 1 1 0 4 1 0 1 2 0 2 3 1 0 2 0 0 2 3 3 2 0 1 1 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 256 max: 31997 count: 1019 average: 5668.53 | standard deviation: 8073.92 | 94 34 102 118 76 61 60 39 35 29 18 16 23 15 9 14 7 5 5 5 5 5 2 1 1 3 6 1 3 1 0 1 0 2 0 0 1 0 1 1 2 3 0 2 3 1 4 3 0 1 1 2 4 4 1 2 0 2 3 1 1 0 1 0 1 1 2 4 6 5 2 1 3 8 2 7 1 3 9 10 7 6 6 7 4 5 7 6 8 5 3 2 5 7 3 1 2 3 2 2 0 2 3 2 2 0 0 1 0 0 3 2 0 0 1 0 2 1 2 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 8 max: 1286 count: 55 average: 671.836 | standard deviation: 242.921 | 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 0 1 1 2 2 0 0 1 0 0 1 0 0 1 0 2 3 1 4 1 0 0 1 0 0 0 0 1 0 1 2 2 1 0 0 1 0 0 1 0 0 1 0 1 1 1 1 0 1 0 0 0 1 0 1 1 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD: [binsize: 256 max: 28569 count: 45 average: 4874.44 | standard deviation: 7882.18 | 6 2 5 9 2 2 3 2 0 0 1 1 0 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST: [binsize: 256 max: 31997 count: 919 average: 6006.46 | standard deviation: 8225.99 | 86 24 69 94 73 58 57 37 35 29 17 15 23 15 9 13 7 5 5 4 4 5 1 1 1 3 6 1 3 1 0 1 0 2 0 0 1 0 1 1 2 3 0 2 3 1 4 3 0 1 1 1 4 4 1 2 0 2 3 1 1 0 1 0 1 1 2 4 6 5 2 1 3 7 2 7 1 2 8 10 6 6 6 7 4 5 7 5 8 5 3 2 5 7 2 1 2 3 2 2 0 2 3 2 2 0 0 1 0 0 3 1 0 0 1 0 2 1 2 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_NULL: [binsize: 256 max: 31997 count: 1019 average: 5668.53 | standard deviation: 8073.92 | 94 34 102 118 76 61 60 39 35 29 18 16 23 15 9 14 7 5 5 5 5 5 2 1 1 3 6 1 3 1 0 1 0 2 0 0 1 0 1 1 2 3 0 2 3 1 4 3 0 1 1 2 4 4 1 2 0 2 3 1 1 0 1 0 1 1 2 4 6 5 2 1 3 8 2 7 1 3 9 10 7 6 6 7 4 5 7 6 8 5 3 2 5 7 3 1 2 3 2 2 0 2 3 2 2 0 0 1 0 0 3 2 0 0 1 0 2 1 2 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_wCC_Times: 0 +miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_dir_Times: 0 +miss_latency_IFETCH_NULL: [binsize: 8 max: 1286 count: 55 average: 671.836 | standard deviation: 242.921 | 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 0 0 0 0 1 1 2 2 0 0 1 0 0 1 0 0 1 0 2 3 1 4 1 0 0 1 0 0 0 0 1 0 1 2 2 1 0 0 1 0 0 1 0 0 1 0 1 1 1 1 0 1 0 0 0 1 0 1 1 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD_NULL: [binsize: 256 max: 28569 count: 45 average: 4874.44 | standard deviation: 7882.18 | 6 2 5 9 2 2 3 2 0 0 1 1 0 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_NULL: [binsize: 256 max: 31997 count: 919 average: 6006.46 | standard deviation: 8225.99 | 86 24 69 94 73 58 57 37 35 29 17 15 23 15 9 13 7 5 5 4 4 5 1 1 1 3 6 1 3 1 0 1 0 2 0 0 1 0 1 1 2 3 0 2 3 1 4 3 0 1 1 1 4 4 1 2 0 2 3 1 1 0 1 0 1 1 2 4 6 5 2 1 3 7 2 7 1 2 8 10 6 6 6 7 4 5 7 5 8 5 3 2 5 7 2 1 2 3 2 2 0 2 3 2 2 0 0 1 0 0 3 1 0 0 1 0 2 1 2 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -102,10 +117,10 @@ Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard dev Resource Usage -------------- page_size: 4096 -user_time: 1 +user_time: 0 system_time: 0 -page_reclaims: 8880 -page_faults: 0 +page_reclaims: 7050 +page_faults: 1907 swaps: 0 block_inputs: 0 block_outputs: 0 @@ -113,1248 +128,1252 @@ block_outputs: 0 Network Stats ------------- +total_msg_count_Request_Control: 5430 43440 +total_msg_count_Response_Data: 5289 380808 +total_msg_count_ResponseL2hit_Data: 138 9936 +total_msg_count_Writeback_Data: 5151 370872 +total_msg_count_Writeback_Control: 11015 88120 +total_msg_count_Unblock_Control: 5419 43352 +total_msgs: 32442 total_bytes: 936528 + switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 0.084797 - links_utilized_percent_switch_0_link_0: 0.0292998 bw: 640000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 0.140294 bw: 160000 base_latency: 1 - - outgoing_messages_switch_0_link_0_Response_Data: 863 62136 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 35 2520 [ 0 0 35 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Control: 895 7160 [ 895 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Request_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 895 64440 [ 0 0 895 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 895 7160 [ 895 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Unblock_Control: 898 7184 [ 0 0 898 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_0: 0.0899934 + links_utilized_percent_switch_0_link_0: 0.0311114 bw: 640000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 0.148875 bw: 160000 base_latency: 1 + + outgoing_messages_switch_0_link_0_Response_Data: 881 63432 [ 0 0 881 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 923 7384 [ 923 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Request_Control: 928 7424 [ 928 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 923 66456 [ 0 0 923 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 923 7384 [ 923 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Unblock_Control: 927 7416 [ 0 0 927 0 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 0.152981 - links_utilized_percent_switch_1_link_0: 0.0632212 bw: 640000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 0.242741 bw: 160000 base_latency: 1 - - outgoing_messages_switch_1_link_0_Request_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Data: 863 62136 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Data: 895 64440 [ 0 0 895 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Control: 1752 14016 [ 895 857 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Unblock_Control: 898 7184 [ 0 0 898 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Request_Control: 863 6904 [ 0 863 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 863 62136 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 35 2520 [ 0 0 35 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Data: 772 55584 [ 0 0 772 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 1837 14696 [ 895 857 85 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Unblock_Control: 863 6904 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_1: 0.161841 + links_utilized_percent_switch_1_link_0: 0.0667992 bw: 640000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 0.256882 bw: 160000 base_latency: 1 + + outgoing_messages_switch_1_link_0_Request_Control: 928 7424 [ 928 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Data: 882 63504 [ 0 0 882 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Data: 923 66456 [ 0 0 923 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Control: 1796 14368 [ 923 873 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Unblock_Control: 926 7408 [ 0 0 926 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Request_Control: 882 7056 [ 0 882 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 881 63432 [ 0 0 881 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Data: 794 57168 [ 0 0 794 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 1876 15008 [ 923 874 79 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Unblock_Control: 880 7040 [ 0 0 880 0 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 0.0719863 - links_utilized_percent_switch_2_link_0: 0.0313821 bw: 640000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 0.11259 bw: 160000 base_latency: 1 +links_utilized_percent_switch_2: 0.0757203 + links_utilized_percent_switch_2_link_0: 0.0331058 bw: 640000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 0.118335 bw: 160000 base_latency: 1 - outgoing_messages_switch_2_link_0_Request_Control: 863 6904 [ 0 863 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Data: 772 55584 [ 0 0 772 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Control: 942 7536 [ 0 857 85 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Unblock_Control: 862 6896 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Data: 863 62136 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Control: 857 6856 [ 0 857 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Request_Control: 882 7056 [ 0 882 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Data: 794 57168 [ 0 0 794 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 952 7616 [ 0 873 79 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Unblock_Control: 880 7040 [ 0 0 880 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Data: 882 63504 [ 0 0 882 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Control: 873 6984 [ 0 873 0 0 0 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 0.165204 - links_utilized_percent_switch_3_link_0: 0.117199 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 0.252885 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0.125528 bw: 160000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Response_Data: 863 62136 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 35 2520 [ 0 0 35 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Writeback_Control: 895 7160 [ 895 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Request_Control: 898 7184 [ 898 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Data: 863 62136 [ 0 0 863 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Data: 895 64440 [ 0 0 895 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Control: 1752 14016 [ 895 857 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Unblock_Control: 898 7184 [ 0 0 898 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Request_Control: 863 6904 [ 0 863 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Writeback_Data: 772 55584 [ 0 0 772 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Writeback_Control: 942 7536 [ 0 857 85 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Unblock_Control: 862 6896 [ 0 0 862 0 0 0 0 0 0 0 ] base_latency: 1 - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - - --- L1Cache 0 --- +links_utilized_percent_switch_3: 0.174693 + links_utilized_percent_switch_3_link_0: 0.124446 bw: 160000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 0.267197 bw: 160000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 0.132437 bw: 160000 base_latency: 1 + + outgoing_messages_switch_3_link_0_Response_Data: 881 63432 [ 0 0 881 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 46 3312 [ 0 0 46 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Writeback_Control: 923 7384 [ 923 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Request_Control: 928 7424 [ 928 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Data: 882 63504 [ 0 0 882 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Data: 923 66456 [ 0 0 923 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Control: 1796 14368 [ 923 873 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Unblock_Control: 926 7408 [ 0 0 926 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Request_Control: 882 7056 [ 0 882 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Writeback_Data: 794 57168 [ 0 0 794 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Writeback_Control: 953 7624 [ 0 874 79 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Unblock_Control: 880 7040 [ 0 0 880 0 0 0 0 0 0 0 ] base_latency: 1 + +Cache Stats: system.l1_cntrl0.sequencer.icache + system.l1_cntrl0.sequencer.icache_total_misses: 0 + system.l1_cntrl0.sequencer.icache_total_demand_misses: 0 + system.l1_cntrl0.sequencer.icache_total_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_hw_prefetches: 0 + + +Cache Stats: system.l1_cntrl0.sequencer.dcache + system.l1_cntrl0.sequencer.dcache_total_misses: 0 + system.l1_cntrl0.sequencer.dcache_total_demand_misses: 0 + system.l1_cntrl0.sequencer.dcache_total_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_hw_prefetches: 0 + + + --- L1Cache --- - Event Counts - -Load 101 -Ifetch 0 -Store 887 -L1_Replacement 547308 -Own_GETX 0 -Fwd_GETX 0 -Fwd_GETS 0 -Fwd_DMA 0 -Inv 0 -Ack 0 -Data 0 -Exclusive_Data 898 -Writeback_Ack 0 -Writeback_Ack_Data 895 -Writeback_Nack 0 -All_acks 809 -Use_Timeout 897 +Load [45 ] 45 +Ifetch [149 ] 149 +Store [1075 ] 1075 +L1_Replacement [528774 ] 528774 +Own_GETX [0 ] 0 +Fwd_GETX [0 ] 0 +Fwd_GETS [0 ] 0 +Fwd_DMA [0 ] 0 +Inv [0 ] 0 +Ack [0 ] 0 +Data [0 ] 0 +Exclusive_Data [927 ] 927 +Writeback_Ack [0 ] 0 +Writeback_Ack_Data [923 ] 923 +Writeback_Nack [0 ] 0 +All_acks [835 ] 835 +Use_Timeout [926 ] 926 - Transitions - -I Load 90 -I Ifetch 0 <-- -I Store 809 -I L1_Replacement 0 <-- -I Inv 0 <-- - -S Load 0 <-- -S Ifetch 0 <-- -S Store 0 <-- -S L1_Replacement 0 <-- -S Fwd_GETS 0 <-- -S Fwd_DMA 0 <-- -S Inv 0 <-- - -O Load 0 <-- -O Ifetch 0 <-- -O Store 0 <-- -O L1_Replacement 0 <-- -O Fwd_GETX 0 <-- -O Fwd_GETS 0 <-- -O Fwd_DMA 0 <-- - -M Load 0 <-- -M Ifetch 0 <-- -M Store 0 <-- -M L1_Replacement 89 -M Fwd_GETX 0 <-- -M Fwd_GETS 0 <-- -M Fwd_DMA 0 <-- - -M_W Load 0 <-- -M_W Ifetch 0 <-- -M_W Store 0 <-- -M_W L1_Replacement 3013 -M_W Own_GETX 0 <-- -M_W Fwd_GETX 0 <-- -M_W Fwd_GETS 0 <-- -M_W Fwd_DMA 0 <-- -M_W Inv 0 <-- -M_W Use_Timeout 89 - -MM Load 10 -MM Ifetch 0 <-- -MM Store 66 -MM L1_Replacement 807 -MM Fwd_GETX 0 <-- -MM Fwd_GETS 0 <-- -MM Fwd_DMA 0 <-- - -MM_W Load 1 -MM_W Ifetch 0 <-- -MM_W Store 9 -MM_W L1_Replacement 30209 -MM_W Own_GETX 0 <-- -MM_W Fwd_GETX 0 <-- -MM_W Fwd_GETS 0 <-- -MM_W Fwd_DMA 0 <-- -MM_W Inv 0 <-- -MM_W Use_Timeout 808 - -IM Load 0 <-- -IM Ifetch 0 <-- -IM Store 0 <-- -IM L1_Replacement 444777 -IM Inv 0 <-- -IM Ack 0 <-- -IM Data 0 <-- -IM Exclusive_Data 809 - -SM Load 0 <-- -SM Ifetch 0 <-- -SM Store 0 <-- -SM L1_Replacement 0 <-- -SM Fwd_GETS 0 <-- -SM Fwd_DMA 0 <-- -SM Inv 0 <-- -SM Ack 0 <-- -SM Data 0 <-- -SM Exclusive_Data 0 <-- - -OM Load 0 <-- -OM Ifetch 0 <-- -OM Store 0 <-- -OM L1_Replacement 17359 -OM Own_GETX 0 <-- -OM Fwd_GETX 0 <-- -OM Fwd_GETS 0 <-- -OM Fwd_DMA 0 <-- -OM Ack 0 <-- -OM All_acks 809 - -IS Load 0 <-- -IS Ifetch 0 <-- -IS Store 0 <-- -IS L1_Replacement 51054 -IS Inv 0 <-- -IS Data 0 <-- -IS Exclusive_Data 89 - -SI Load 0 <-- -SI Ifetch 0 <-- -SI Store 0 <-- -SI L1_Replacement 0 <-- -SI Fwd_GETS 0 <-- -SI Fwd_DMA 0 <-- -SI Inv 0 <-- -SI Writeback_Ack 0 <-- -SI Writeback_Ack_Data 0 <-- -SI Writeback_Nack 0 <-- - -OI Load 0 <-- -OI Ifetch 0 <-- -OI Store 0 <-- -OI L1_Replacement 0 <-- -OI Fwd_GETX 0 <-- -OI Fwd_GETS 0 <-- -OI Fwd_DMA 0 <-- -OI Writeback_Ack 0 <-- -OI Writeback_Ack_Data 0 <-- -OI Writeback_Nack 0 <-- - -MI Load 0 <-- -MI Ifetch 0 <-- -MI Store 3 -MI L1_Replacement 0 <-- -MI Fwd_GETX 0 <-- -MI Fwd_GETS 0 <-- -MI Fwd_DMA 0 <-- -MI Writeback_Ack 0 <-- -MI Writeback_Ack_Data 895 -MI Writeback_Nack 0 <-- - -II Load 0 <-- -II Ifetch 0 <-- -II Store 0 <-- -II L1_Replacement 0 <-- -II Inv 0 <-- -II Writeback_Ack 0 <-- -II Writeback_Ack_Data 0 <-- -II Writeback_Nack 0 <-- - -Cache Stats: system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_misses: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_demand_misses: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_prefetches: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - - --- L2Cache 0 --- +I Load [39 ] 39 +I Ifetch [53 ] 53 +I Store [836 ] 836 +I L1_Replacement [0 ] 0 +I Inv [0 ] 0 + +S Load [0 ] 0 +S Ifetch [0 ] 0 +S Store [0 ] 0 +S L1_Replacement [0 ] 0 +S Fwd_GETS [0 ] 0 +S Fwd_DMA [0 ] 0 +S Inv [0 ] 0 + +O Load [0 ] 0 +O Ifetch [0 ] 0 +O Store [0 ] 0 +O L1_Replacement [0 ] 0 +O Fwd_GETX [0 ] 0 +O Fwd_GETS [0 ] 0 +O Fwd_DMA [0 ] 0 + +M Load [0 ] 0 +M Ifetch [2 ] 2 +M Store [0 ] 0 +M L1_Replacement [88 ] 88 +M Fwd_GETX [0 ] 0 +M Fwd_GETS [0 ] 0 +M Fwd_DMA [0 ] 0 + +M_W Load [0 ] 0 +M_W Ifetch [0 ] 0 +M_W Store [1 ] 1 +M_W L1_Replacement [1040 ] 1040 +M_W Own_GETX [0 ] 0 +M_W Fwd_GETX [0 ] 0 +M_W Fwd_GETS [0 ] 0 +M_W Fwd_DMA [0 ] 0 +M_W Inv [0 ] 0 +M_W Use_Timeout [90 ] 90 + +MM Load [5 ] 5 +MM Ifetch [0 ] 0 +MM Store [72 ] 72 +MM L1_Replacement [835 ] 835 +MM Fwd_GETX [0 ] 0 +MM Fwd_GETS [0 ] 0 +MM Fwd_DMA [0 ] 0 + +MM_W Load [1 ] 1 +MM_W Ifetch [0 ] 0 +MM_W Store [11 ] 11 +MM_W L1_Replacement [30786 ] 30786 +MM_W Own_GETX [0 ] 0 +MM_W Fwd_GETX [0 ] 0 +MM_W Fwd_GETS [0 ] 0 +MM_W Fwd_DMA [0 ] 0 +MM_W Inv [0 ] 0 +MM_W Use_Timeout [836 ] 836 + +IM Load [0 ] 0 +IM Ifetch [0 ] 0 +IM Store [0 ] 0 +IM L1_Replacement [464217 ] 464217 +IM Inv [0 ] 0 +IM Ack [0 ] 0 +IM Data [0 ] 0 +IM Exclusive_Data [835 ] 835 + +SM Load [0 ] 0 +SM Ifetch [0 ] 0 +SM Store [0 ] 0 +SM L1_Replacement [0 ] 0 +SM Fwd_GETS [0 ] 0 +SM Fwd_DMA [0 ] 0 +SM Inv [0 ] 0 +SM Ack [0 ] 0 +SM Data [0 ] 0 +SM Exclusive_Data [0 ] 0 + +OM Load [0 ] 0 +OM Ifetch [0 ] 0 +OM Store [0 ] 0 +OM L1_Replacement [13588 ] 13588 +OM Own_GETX [0 ] 0 +OM Fwd_GETX [0 ] 0 +OM Fwd_GETS [0 ] 0 +OM Fwd_DMA [0 ] 0 +OM Ack [0 ] 0 +OM All_acks [835 ] 835 + +IS Load [0 ] 0 +IS Ifetch [0 ] 0 +IS Store [0 ] 0 +IS L1_Replacement [18220 ] 18220 +IS Inv [0 ] 0 +IS Data [0 ] 0 +IS Exclusive_Data [92 ] 92 + +SI Load [0 ] 0 +SI Ifetch [0 ] 0 +SI Store [0 ] 0 +SI L1_Replacement [0 ] 0 +SI Fwd_GETS [0 ] 0 +SI Fwd_DMA [0 ] 0 +SI Inv [0 ] 0 +SI Writeback_Ack [0 ] 0 +SI Writeback_Ack_Data [0 ] 0 +SI Writeback_Nack [0 ] 0 + +OI Load [0 ] 0 +OI Ifetch [0 ] 0 +OI Store [0 ] 0 +OI L1_Replacement [0 ] 0 +OI Fwd_GETX [0 ] 0 +OI Fwd_GETS [0 ] 0 +OI Fwd_DMA [0 ] 0 +OI Writeback_Ack [0 ] 0 +OI Writeback_Ack_Data [0 ] 0 +OI Writeback_Nack [0 ] 0 + +MI Load [0 ] 0 +MI Ifetch [94 ] 94 +MI Store [155 ] 155 +MI L1_Replacement [0 ] 0 +MI Fwd_GETX [0 ] 0 +MI Fwd_GETS [0 ] 0 +MI Fwd_DMA [0 ] 0 +MI Writeback_Ack [0 ] 0 +MI Writeback_Ack_Data [923 ] 923 +MI Writeback_Nack [0 ] 0 + +II Load [0 ] 0 +II Ifetch [0 ] 0 +II Store [0 ] 0 +II L1_Replacement [0 ] 0 +II Inv [0 ] 0 +II Writeback_Ack [0 ] 0 +II Writeback_Ack_Data [0 ] 0 +II Writeback_Nack [0 ] 0 + +Cache Stats: system.l2_cntrl0.L2cacheMemory + system.l2_cntrl0.L2cacheMemory_total_misses: 0 + system.l2_cntrl0.L2cacheMemory_total_demand_misses: 0 + system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 + + + --- L2Cache --- - Event Counts - -L1_GETS 132 -L1_GETX 846 -L1_PUTO 0 -L1_PUTX 2074 -L1_PUTS_only 0 -L1_PUTS 0 -Fwd_GETX 0 -Fwd_GETS 0 -Fwd_DMA 0 -Own_GETX 0 -Inv 0 -IntAck 0 -ExtAck 0 -All_Acks 777 -Data 777 -Data_Exclusive 86 -L1_WBCLEANDATA 85 -L1_WBDIRTYDATA 810 -Writeback_Ack 857 -Writeback_Nack 0 -Unblock 0 -Exclusive_Unblock 898 -L2_Replacement 857 +L1_GETS [141 ] 141 +L1_GETX [855 ] 855 +L1_PUTO [0 ] 0 +L1_PUTX [2239 ] 2239 +L1_PUTS_only [0 ] 0 +L1_PUTS [0 ] 0 +Fwd_GETX [0 ] 0 +Fwd_GETS [0 ] 0 +Fwd_DMA [0 ] 0 +Own_GETX [0 ] 0 +Inv [0 ] 0 +IntAck [0 ] 0 +ExtAck [0 ] 0 +All_Acks [795 ] 795 +Data [795 ] 795 +Data_Exclusive [86 ] 86 +L1_WBCLEANDATA [83 ] 83 +L1_WBDIRTYDATA [840 ] 840 +Writeback_Ack [873 ] 873 +Writeback_Nack [0 ] 0 +Unblock [0 ] 0 +Exclusive_Unblock [926 ] 926 +L2_Replacement [874 ] 874 - Transitions - -NP L1_GETS 86 -NP L1_GETX 777 -NP L1_PUTO 0 <-- -NP L1_PUTX 0 <-- -NP L1_PUTS 0 <-- -NP Inv 0 <-- - -I L1_GETS 0 <-- -I L1_GETX 0 <-- -I L1_PUTO 0 <-- -I L1_PUTX 0 <-- -I L1_PUTS 0 <-- -I Inv 0 <-- -I L2_Replacement 0 <-- - -ILS L1_GETS 0 <-- -ILS L1_GETX 0 <-- -ILS L1_PUTO 0 <-- -ILS L1_PUTX 0 <-- -ILS L1_PUTS_only 0 <-- -ILS L1_PUTS 0 <-- -ILS Inv 0 <-- -ILS L2_Replacement 0 <-- - -ILX L1_GETS 0 <-- -ILX L1_GETX 0 <-- -ILX L1_PUTO 0 <-- -ILX L1_PUTX 895 -ILX L1_PUTS_only 0 <-- -ILX L1_PUTS 0 <-- -ILX Fwd_GETX 0 <-- -ILX Fwd_GETS 0 <-- -ILX Fwd_DMA 0 <-- -ILX Inv 0 <-- -ILX Data 0 <-- -ILX L2_Replacement 0 <-- - -ILO L1_GETS 0 <-- -ILO L1_GETX 0 <-- -ILO L1_PUTO 0 <-- -ILO L1_PUTX 0 <-- -ILO L1_PUTS 0 <-- -ILO Fwd_GETX 0 <-- -ILO Fwd_GETS 0 <-- -ILO Fwd_DMA 0 <-- -ILO Inv 0 <-- -ILO Data 0 <-- -ILO L2_Replacement 0 <-- - -ILOX L1_GETS 0 <-- -ILOX L1_GETX 0 <-- -ILOX L1_PUTO 0 <-- -ILOX L1_PUTX 0 <-- -ILOX L1_PUTS 0 <-- -ILOX Fwd_GETX 0 <-- -ILOX Fwd_GETS 0 <-- -ILOX Fwd_DMA 0 <-- -ILOX Data 0 <-- - -ILOS L1_GETS 0 <-- -ILOS L1_GETX 0 <-- -ILOS L1_PUTO 0 <-- -ILOS L1_PUTX 0 <-- -ILOS L1_PUTS_only 0 <-- -ILOS L1_PUTS 0 <-- -ILOS Fwd_GETX 0 <-- -ILOS Fwd_GETS 0 <-- -ILOS Fwd_DMA 0 <-- -ILOS Data 0 <-- -ILOS L2_Replacement 0 <-- - -ILOSX L1_GETS 0 <-- -ILOSX L1_GETX 0 <-- -ILOSX L1_PUTO 0 <-- -ILOSX L1_PUTX 0 <-- -ILOSX L1_PUTS_only 0 <-- -ILOSX L1_PUTS 0 <-- -ILOSX Fwd_GETX 0 <-- -ILOSX Fwd_GETS 0 <-- -ILOSX Fwd_DMA 0 <-- -ILOSX Data 0 <-- - -S L1_GETS 0 <-- -S L1_GETX 0 <-- -S L1_PUTX 0 <-- -S L1_PUTS 0 <-- -S Inv 0 <-- -S L2_Replacement 0 <-- - -O L1_GETS 0 <-- -O L1_GETX 0 <-- -O L1_PUTX 0 <-- -O Fwd_GETX 0 <-- -O Fwd_GETS 0 <-- -O Fwd_DMA 0 <-- -O L2_Replacement 0 <-- - -OLS L1_GETS 0 <-- -OLS L1_GETX 0 <-- -OLS L1_PUTX 0 <-- -OLS L1_PUTS_only 0 <-- -OLS L1_PUTS 0 <-- -OLS Fwd_GETX 0 <-- -OLS Fwd_GETS 0 <-- -OLS Fwd_DMA 0 <-- -OLS L2_Replacement 0 <-- - -OLSX L1_GETS 0 <-- -OLSX L1_GETX 0 <-- -OLSX L1_PUTO 0 <-- -OLSX L1_PUTX 0 <-- -OLSX L1_PUTS_only 0 <-- -OLSX L1_PUTS 0 <-- -OLSX Fwd_GETX 0 <-- -OLSX Fwd_GETS 0 <-- -OLSX Fwd_DMA 0 <-- -OLSX L2_Replacement 0 <-- - -SLS L1_GETS 0 <-- -SLS L1_GETX 0 <-- -SLS L1_PUTX 0 <-- -SLS L1_PUTS_only 0 <-- -SLS L1_PUTS 0 <-- -SLS Inv 0 <-- -SLS L2_Replacement 0 <-- - -M L1_GETS 3 -M L1_GETX 32 -M L1_PUTO 0 <-- -M L1_PUTX 0 <-- -M L1_PUTS 0 <-- -M Fwd_GETX 0 <-- -M Fwd_GETS 0 <-- -M Fwd_DMA 0 <-- -M L2_Replacement 857 - -IFGX L1_GETS 0 <-- -IFGX L1_GETX 0 <-- -IFGX L1_PUTO 0 <-- -IFGX L1_PUTX 0 <-- -IFGX L1_PUTS_only 0 <-- -IFGX L1_PUTS 0 <-- -IFGX Fwd_GETX 0 <-- -IFGX Fwd_GETS 0 <-- -IFGX Fwd_DMA 0 <-- -IFGX Inv 0 <-- -IFGX Data 0 <-- -IFGX Data_Exclusive 0 <-- -IFGX L2_Replacement 0 <-- - -IFGS L1_GETS 0 <-- -IFGS L1_GETX 0 <-- -IFGS L1_PUTO 0 <-- -IFGS L1_PUTX 0 <-- -IFGS L1_PUTS_only 0 <-- -IFGS L1_PUTS 0 <-- -IFGS Fwd_GETX 0 <-- -IFGS Fwd_GETS 0 <-- -IFGS Fwd_DMA 0 <-- -IFGS Inv 0 <-- -IFGS Data 0 <-- -IFGS Data_Exclusive 0 <-- -IFGS L2_Replacement 0 <-- - -ISFGS L1_GETS 0 <-- -ISFGS L1_GETX 0 <-- -ISFGS L1_PUTO 0 <-- -ISFGS L1_PUTX 0 <-- -ISFGS L1_PUTS_only 0 <-- -ISFGS L1_PUTS 0 <-- -ISFGS Fwd_GETX 0 <-- -ISFGS Fwd_GETS 0 <-- -ISFGS Fwd_DMA 0 <-- -ISFGS Inv 0 <-- -ISFGS Data 0 <-- -ISFGS L2_Replacement 0 <-- - -IFGXX L1_GETS 0 <-- -IFGXX L1_GETX 0 <-- -IFGXX L1_PUTO 0 <-- -IFGXX L1_PUTX 0 <-- -IFGXX L1_PUTS_only 0 <-- -IFGXX L1_PUTS 0 <-- -IFGXX Fwd_GETX 0 <-- -IFGXX Fwd_GETS 0 <-- -IFGXX Fwd_DMA 0 <-- -IFGXX Inv 0 <-- -IFGXX IntAck 0 <-- -IFGXX All_Acks 0 <-- -IFGXX Data_Exclusive 0 <-- -IFGXX L2_Replacement 0 <-- - -OFGX L1_GETS 0 <-- -OFGX L1_GETX 0 <-- -OFGX L1_PUTO 0 <-- -OFGX L1_PUTX 0 <-- -OFGX L1_PUTS_only 0 <-- -OFGX L1_PUTS 0 <-- -OFGX Fwd_GETX 0 <-- -OFGX Fwd_GETS 0 <-- -OFGX Fwd_DMA 0 <-- -OFGX Inv 0 <-- -OFGX L2_Replacement 0 <-- - -OLSF L1_GETS 0 <-- -OLSF L1_GETX 0 <-- -OLSF L1_PUTO 0 <-- -OLSF L1_PUTX 0 <-- -OLSF L1_PUTS_only 0 <-- -OLSF L1_PUTS 0 <-- -OLSF Fwd_GETX 0 <-- -OLSF Fwd_GETS 0 <-- -OLSF Fwd_DMA 0 <-- -OLSF Inv 0 <-- -OLSF IntAck 0 <-- -OLSF All_Acks 0 <-- -OLSF L2_Replacement 0 <-- - -ILOW L1_GETS 0 <-- -ILOW L1_GETX 0 <-- -ILOW L1_PUTO 0 <-- -ILOW L1_PUTX 0 <-- -ILOW L1_PUTS_only 0 <-- -ILOW L1_PUTS 0 <-- -ILOW Fwd_GETX 0 <-- -ILOW Fwd_GETS 0 <-- -ILOW Fwd_DMA 0 <-- -ILOW Inv 0 <-- -ILOW L1_WBCLEANDATA 0 <-- -ILOW L1_WBDIRTYDATA 0 <-- -ILOW Unblock 0 <-- -ILOW L2_Replacement 0 <-- - -ILOXW L1_GETS 0 <-- -ILOXW L1_GETX 0 <-- -ILOXW L1_PUTO 0 <-- -ILOXW L1_PUTX 0 <-- -ILOXW L1_PUTS_only 0 <-- -ILOXW L1_PUTS 0 <-- -ILOXW Fwd_GETX 0 <-- -ILOXW Fwd_GETS 0 <-- -ILOXW Fwd_DMA 0 <-- -ILOXW Inv 0 <-- -ILOXW L1_WBCLEANDATA 0 <-- -ILOXW L1_WBDIRTYDATA 0 <-- -ILOXW Unblock 0 <-- -ILOXW L2_Replacement 0 <-- - -ILOSW L1_GETS 0 <-- -ILOSW L1_GETX 0 <-- -ILOSW L1_PUTO 0 <-- -ILOSW L1_PUTX 0 <-- -ILOSW L1_PUTS_only 0 <-- -ILOSW L1_PUTS 0 <-- -ILOSW Fwd_GETX 0 <-- -ILOSW Fwd_GETS 0 <-- -ILOSW Fwd_DMA 0 <-- -ILOSW Inv 0 <-- -ILOSW L1_WBCLEANDATA 0 <-- -ILOSW L1_WBDIRTYDATA 0 <-- -ILOSW Unblock 0 <-- -ILOSW L2_Replacement 0 <-- - -ILOSXW L1_GETS 0 <-- -ILOSXW L1_GETX 0 <-- -ILOSXW L1_PUTO 0 <-- -ILOSXW L1_PUTX 0 <-- -ILOSXW L1_PUTS_only 0 <-- -ILOSXW L1_PUTS 0 <-- -ILOSXW Fwd_GETX 0 <-- -ILOSXW Fwd_GETS 0 <-- -ILOSXW Fwd_DMA 0 <-- -ILOSXW Inv 0 <-- -ILOSXW L1_WBCLEANDATA 0 <-- -ILOSXW L1_WBDIRTYDATA 0 <-- -ILOSXW Unblock 0 <-- -ILOSXW L2_Replacement 0 <-- - -SLSW L1_GETS 0 <-- -SLSW L1_GETX 0 <-- -SLSW L1_PUTO 0 <-- -SLSW L1_PUTX 0 <-- -SLSW L1_PUTS_only 0 <-- -SLSW L1_PUTS 0 <-- -SLSW Fwd_GETX 0 <-- -SLSW Fwd_GETS 0 <-- -SLSW Fwd_DMA 0 <-- -SLSW Inv 0 <-- -SLSW Unblock 0 <-- -SLSW L2_Replacement 0 <-- - -OLSW L1_GETS 0 <-- -OLSW L1_GETX 0 <-- -OLSW L1_PUTO 0 <-- -OLSW L1_PUTX 0 <-- -OLSW L1_PUTS_only 0 <-- -OLSW L1_PUTS 0 <-- -OLSW Fwd_GETX 0 <-- -OLSW Fwd_GETS 0 <-- -OLSW Fwd_DMA 0 <-- -OLSW Inv 0 <-- -OLSW Unblock 0 <-- -OLSW L2_Replacement 0 <-- - -ILSW L1_GETS 0 <-- -ILSW L1_GETX 0 <-- -ILSW L1_PUTO 0 <-- -ILSW L1_PUTX 0 <-- -ILSW L1_PUTS_only 0 <-- -ILSW L1_PUTS 0 <-- -ILSW Fwd_GETX 0 <-- -ILSW Fwd_GETS 0 <-- -ILSW Fwd_DMA 0 <-- -ILSW Inv 0 <-- -ILSW L1_WBCLEANDATA 0 <-- -ILSW Unblock 0 <-- -ILSW L2_Replacement 0 <-- - -IW L1_GETS 0 <-- -IW L1_GETX 0 <-- -IW L1_PUTO 0 <-- -IW L1_PUTX 0 <-- -IW L1_PUTS_only 0 <-- -IW L1_PUTS 0 <-- -IW Fwd_GETX 0 <-- -IW Fwd_GETS 0 <-- -IW Fwd_DMA 0 <-- -IW Inv 0 <-- -IW L1_WBCLEANDATA 0 <-- -IW L2_Replacement 0 <-- - -OW L1_GETS 0 <-- -OW L1_GETX 0 <-- -OW L1_PUTO 0 <-- -OW L1_PUTX 0 <-- -OW L1_PUTS_only 0 <-- -OW L1_PUTS 0 <-- -OW Fwd_GETX 0 <-- -OW Fwd_GETS 0 <-- -OW Fwd_DMA 0 <-- -OW Inv 0 <-- -OW Unblock 0 <-- -OW L2_Replacement 0 <-- - -SW L1_GETS 0 <-- -SW L1_GETX 0 <-- -SW L1_PUTO 0 <-- -SW L1_PUTX 0 <-- -SW L1_PUTS_only 0 <-- -SW L1_PUTS 0 <-- -SW Fwd_GETX 0 <-- -SW Fwd_GETS 0 <-- -SW Fwd_DMA 0 <-- -SW Inv 0 <-- -SW Unblock 0 <-- -SW L2_Replacement 0 <-- - -OXW L1_GETS 0 <-- -OXW L1_GETX 0 <-- -OXW L1_PUTO 0 <-- -OXW L1_PUTX 0 <-- -OXW L1_PUTS_only 0 <-- -OXW L1_PUTS 0 <-- -OXW Fwd_GETX 0 <-- -OXW Fwd_GETS 0 <-- -OXW Fwd_DMA 0 <-- -OXW Inv 0 <-- -OXW Unblock 0 <-- -OXW L2_Replacement 0 <-- - -OLSXW L1_GETS 0 <-- -OLSXW L1_GETX 0 <-- -OLSXW L1_PUTO 0 <-- -OLSXW L1_PUTX 0 <-- -OLSXW L1_PUTS_only 0 <-- -OLSXW L1_PUTS 0 <-- -OLSXW Fwd_GETX 0 <-- -OLSXW Fwd_GETS 0 <-- -OLSXW Fwd_DMA 0 <-- -OLSXW Inv 0 <-- -OLSXW Unblock 0 <-- -OLSXW L2_Replacement 0 <-- - -ILXW L1_GETS 0 <-- -ILXW L1_GETX 0 <-- -ILXW L1_PUTO 0 <-- -ILXW L1_PUTX 0 <-- -ILXW L1_PUTS_only 0 <-- -ILXW L1_PUTS 0 <-- -ILXW Fwd_GETX 0 <-- -ILXW Fwd_GETS 0 <-- -ILXW Fwd_DMA 0 <-- -ILXW Inv 0 <-- -ILXW Data 0 <-- -ILXW L1_WBCLEANDATA 85 -ILXW L1_WBDIRTYDATA 810 -ILXW Unblock 0 <-- -ILXW L2_Replacement 0 <-- - -IFLS L1_GETS 0 <-- -IFLS L1_GETX 0 <-- -IFLS L1_PUTO 0 <-- -IFLS L1_PUTX 0 <-- -IFLS L1_PUTS_only 0 <-- -IFLS L1_PUTS 0 <-- -IFLS Fwd_GETX 0 <-- -IFLS Fwd_GETS 0 <-- -IFLS Fwd_DMA 0 <-- -IFLS Inv 0 <-- -IFLS Unblock 0 <-- -IFLS L2_Replacement 0 <-- - -IFLO L1_GETS 0 <-- -IFLO L1_GETX 0 <-- -IFLO L1_PUTO 0 <-- -IFLO L1_PUTX 0 <-- -IFLO L1_PUTS_only 0 <-- -IFLO L1_PUTS 0 <-- -IFLO Fwd_GETX 0 <-- -IFLO Fwd_GETS 0 <-- -IFLO Fwd_DMA 0 <-- -IFLO Inv 0 <-- -IFLO Unblock 0 <-- -IFLO L2_Replacement 0 <-- - -IFLOX L1_GETS 0 <-- -IFLOX L1_GETX 0 <-- -IFLOX L1_PUTO 0 <-- -IFLOX L1_PUTX 0 <-- -IFLOX L1_PUTS_only 0 <-- -IFLOX L1_PUTS 0 <-- -IFLOX Fwd_GETX 0 <-- -IFLOX Fwd_GETS 0 <-- -IFLOX Fwd_DMA 0 <-- -IFLOX Inv 0 <-- -IFLOX Unblock 0 <-- -IFLOX Exclusive_Unblock 0 <-- -IFLOX L2_Replacement 0 <-- - -IFLOXX L1_GETS 0 <-- -IFLOXX L1_GETX 0 <-- -IFLOXX L1_PUTO 0 <-- -IFLOXX L1_PUTX 0 <-- -IFLOXX L1_PUTS_only 0 <-- -IFLOXX L1_PUTS 0 <-- -IFLOXX Fwd_GETX 0 <-- -IFLOXX Fwd_GETS 0 <-- -IFLOXX Fwd_DMA 0 <-- -IFLOXX Inv 0 <-- -IFLOXX Unblock 0 <-- -IFLOXX Exclusive_Unblock 0 <-- -IFLOXX L2_Replacement 0 <-- - -IFLOSX L1_GETS 0 <-- -IFLOSX L1_GETX 0 <-- -IFLOSX L1_PUTO 0 <-- -IFLOSX L1_PUTX 0 <-- -IFLOSX L1_PUTS_only 0 <-- -IFLOSX L1_PUTS 0 <-- -IFLOSX Fwd_GETX 0 <-- -IFLOSX Fwd_GETS 0 <-- -IFLOSX Fwd_DMA 0 <-- -IFLOSX Inv 0 <-- -IFLOSX Unblock 0 <-- -IFLOSX Exclusive_Unblock 0 <-- -IFLOSX L2_Replacement 0 <-- - -IFLXO L1_GETS 0 <-- -IFLXO L1_GETX 0 <-- -IFLXO L1_PUTO 0 <-- -IFLXO L1_PUTX 0 <-- -IFLXO L1_PUTS_only 0 <-- -IFLXO L1_PUTS 0 <-- -IFLXO Fwd_GETX 0 <-- -IFLXO Fwd_GETS 0 <-- -IFLXO Fwd_DMA 0 <-- -IFLXO Inv 0 <-- -IFLXO Exclusive_Unblock 0 <-- -IFLXO L2_Replacement 0 <-- - -IGS L1_GETS 0 <-- -IGS L1_GETX 0 <-- -IGS L1_PUTO 0 <-- -IGS L1_PUTX 122 -IGS L1_PUTS_only 0 <-- -IGS L1_PUTS 0 <-- -IGS Fwd_GETX 0 <-- -IGS Fwd_GETS 0 <-- -IGS Fwd_DMA 0 <-- -IGS Own_GETX 0 <-- -IGS Inv 0 <-- -IGS Data 0 <-- -IGS Data_Exclusive 86 -IGS Unblock 0 <-- -IGS Exclusive_Unblock 86 -IGS L2_Replacement 0 <-- - -IGM L1_GETS 0 <-- -IGM L1_GETX 0 <-- -IGM L1_PUTO 0 <-- -IGM L1_PUTX 0 <-- -IGM L1_PUTS_only 0 <-- -IGM L1_PUTS 0 <-- -IGM Fwd_GETX 0 <-- -IGM Fwd_GETS 0 <-- -IGM Fwd_DMA 0 <-- -IGM Own_GETX 0 <-- -IGM Inv 0 <-- -IGM ExtAck 0 <-- -IGM Data 777 -IGM Data_Exclusive 0 <-- -IGM L2_Replacement 0 <-- - -IGMLS L1_GETS 0 <-- -IGMLS L1_GETX 0 <-- -IGMLS L1_PUTO 0 <-- -IGMLS L1_PUTX 0 <-- -IGMLS L1_PUTS_only 0 <-- -IGMLS L1_PUTS 0 <-- -IGMLS Inv 0 <-- -IGMLS IntAck 0 <-- -IGMLS ExtAck 0 <-- -IGMLS All_Acks 0 <-- -IGMLS Data 0 <-- -IGMLS Data_Exclusive 0 <-- -IGMLS L2_Replacement 0 <-- - -IGMO L1_GETS 0 <-- -IGMO L1_GETX 0 <-- -IGMO L1_PUTO 0 <-- -IGMO L1_PUTX 1052 -IGMO L1_PUTS_only 0 <-- -IGMO L1_PUTS 0 <-- -IGMO Fwd_GETX 0 <-- -IGMO Fwd_GETS 0 <-- -IGMO Fwd_DMA 0 <-- -IGMO Own_GETX 0 <-- -IGMO ExtAck 0 <-- -IGMO All_Acks 777 -IGMO Exclusive_Unblock 777 -IGMO L2_Replacement 0 <-- - -IGMIO L1_GETS 0 <-- -IGMIO L1_GETX 0 <-- -IGMIO L1_PUTO 0 <-- -IGMIO L1_PUTX 0 <-- -IGMIO L1_PUTS_only 0 <-- -IGMIO L1_PUTS 0 <-- -IGMIO Fwd_GETX 0 <-- -IGMIO Fwd_GETS 0 <-- -IGMIO Fwd_DMA 0 <-- -IGMIO Own_GETX 0 <-- -IGMIO ExtAck 0 <-- -IGMIO All_Acks 0 <-- - -OGMIO L1_GETS 0 <-- -OGMIO L1_GETX 0 <-- -OGMIO L1_PUTO 0 <-- -OGMIO L1_PUTX 0 <-- -OGMIO L1_PUTS_only 0 <-- -OGMIO L1_PUTS 0 <-- -OGMIO Fwd_GETX 0 <-- -OGMIO Fwd_GETS 0 <-- -OGMIO Fwd_DMA 0 <-- -OGMIO Own_GETX 0 <-- -OGMIO ExtAck 0 <-- -OGMIO All_Acks 0 <-- - -IGMIOF L1_GETS 0 <-- -IGMIOF L1_GETX 0 <-- -IGMIOF L1_PUTO 0 <-- -IGMIOF L1_PUTX 0 <-- -IGMIOF L1_PUTS_only 0 <-- -IGMIOF L1_PUTS 0 <-- -IGMIOF IntAck 0 <-- -IGMIOF All_Acks 0 <-- -IGMIOF Data_Exclusive 0 <-- - -IGMIOFS L1_GETS 0 <-- -IGMIOFS L1_GETX 0 <-- -IGMIOFS L1_PUTO 0 <-- -IGMIOFS L1_PUTX 0 <-- -IGMIOFS L1_PUTS_only 0 <-- -IGMIOFS L1_PUTS 0 <-- -IGMIOFS Fwd_GETX 0 <-- -IGMIOFS Fwd_GETS 0 <-- -IGMIOFS Fwd_DMA 0 <-- -IGMIOFS Inv 0 <-- -IGMIOFS Data 0 <-- -IGMIOFS L2_Replacement 0 <-- - -OGMIOF L1_GETS 0 <-- -OGMIOF L1_GETX 0 <-- -OGMIOF L1_PUTO 0 <-- -OGMIOF L1_PUTX 0 <-- -OGMIOF L1_PUTS_only 0 <-- -OGMIOF L1_PUTS 0 <-- -OGMIOF IntAck 0 <-- -OGMIOF All_Acks 0 <-- - -II L1_GETS 0 <-- -II L1_GETX 0 <-- -II L1_PUTO 0 <-- -II L1_PUTX 0 <-- -II L1_PUTS_only 0 <-- -II L1_PUTS 0 <-- -II IntAck 0 <-- -II All_Acks 0 <-- - -MM L1_GETS 0 <-- -MM L1_GETX 0 <-- -MM L1_PUTO 0 <-- -MM L1_PUTX 5 -MM L1_PUTS_only 0 <-- -MM L1_PUTS 0 <-- -MM Fwd_GETX 0 <-- -MM Fwd_GETS 0 <-- -MM Fwd_DMA 0 <-- -MM Inv 0 <-- -MM Exclusive_Unblock 32 -MM L2_Replacement 0 <-- - -SS L1_GETS 0 <-- -SS L1_GETX 0 <-- -SS L1_PUTO 0 <-- -SS L1_PUTX 0 <-- -SS L1_PUTS_only 0 <-- -SS L1_PUTS 0 <-- -SS Fwd_GETX 0 <-- -SS Fwd_GETS 0 <-- -SS Fwd_DMA 0 <-- -SS Inv 0 <-- -SS Unblock 0 <-- -SS L2_Replacement 0 <-- - -OO L1_GETS 0 <-- -OO L1_GETX 0 <-- -OO L1_PUTO 0 <-- -OO L1_PUTX 0 <-- -OO L1_PUTS_only 0 <-- -OO L1_PUTS 0 <-- -OO Fwd_GETX 0 <-- -OO Fwd_GETS 0 <-- -OO Fwd_DMA 0 <-- -OO Inv 0 <-- -OO Unblock 0 <-- -OO Exclusive_Unblock 3 -OO L2_Replacement 0 <-- - -OLSS L1_GETS 0 <-- -OLSS L1_GETX 0 <-- -OLSS L1_PUTO 0 <-- -OLSS L1_PUTX 0 <-- -OLSS L1_PUTS_only 0 <-- -OLSS L1_PUTS 0 <-- -OLSS Fwd_GETX 0 <-- -OLSS Fwd_GETS 0 <-- -OLSS Fwd_DMA 0 <-- -OLSS Inv 0 <-- -OLSS Unblock 0 <-- -OLSS L2_Replacement 0 <-- - -OLSXS L1_GETS 0 <-- -OLSXS L1_GETX 0 <-- -OLSXS L1_PUTO 0 <-- -OLSXS L1_PUTX 0 <-- -OLSXS L1_PUTS_only 0 <-- -OLSXS L1_PUTS 0 <-- -OLSXS Fwd_GETX 0 <-- -OLSXS Fwd_GETS 0 <-- -OLSXS Fwd_DMA 0 <-- -OLSXS Inv 0 <-- -OLSXS Unblock 0 <-- -OLSXS L2_Replacement 0 <-- - -SLSS L1_GETS 0 <-- -SLSS L1_GETX 0 <-- -SLSS L1_PUTO 0 <-- -SLSS L1_PUTX 0 <-- -SLSS L1_PUTS_only 0 <-- -SLSS L1_PUTS 0 <-- -SLSS Fwd_GETX 0 <-- -SLSS Fwd_GETS 0 <-- -SLSS Fwd_DMA 0 <-- -SLSS Inv 0 <-- -SLSS Unblock 0 <-- -SLSS L2_Replacement 0 <-- - -OI L1_GETS 0 <-- -OI L1_GETX 0 <-- -OI L1_PUTO 0 <-- -OI L1_PUTX 0 <-- -OI L1_PUTS_only 0 <-- -OI L1_PUTS 0 <-- -OI Fwd_GETX 0 <-- -OI Fwd_GETS 0 <-- -OI Fwd_DMA 0 <-- -OI Writeback_Ack 0 <-- -OI Writeback_Nack 0 <-- -OI L2_Replacement 0 <-- - -MI L1_GETS 43 -MI L1_GETX 37 -MI L1_PUTO 0 <-- -MI L1_PUTX 0 <-- -MI L1_PUTS_only 0 <-- -MI L1_PUTS 0 <-- -MI Fwd_GETX 0 <-- -MI Fwd_GETS 0 <-- -MI Fwd_DMA 0 <-- -MI Writeback_Ack 857 -MI L2_Replacement 0 <-- - -MII L1_GETS 0 <-- -MII L1_GETX 0 <-- -MII L1_PUTO 0 <-- -MII L1_PUTX 0 <-- -MII L1_PUTS_only 0 <-- -MII L1_PUTS 0 <-- -MII Writeback_Ack 0 <-- -MII Writeback_Nack 0 <-- -MII L2_Replacement 0 <-- - -OLSI L1_GETS 0 <-- -OLSI L1_GETX 0 <-- -OLSI L1_PUTO 0 <-- -OLSI L1_PUTX 0 <-- -OLSI L1_PUTS_only 0 <-- -OLSI L1_PUTS 0 <-- -OLSI Fwd_GETX 0 <-- -OLSI Fwd_GETS 0 <-- -OLSI Fwd_DMA 0 <-- -OLSI Writeback_Ack 0 <-- -OLSI L2_Replacement 0 <-- - -ILSI L1_GETS 0 <-- -ILSI L1_GETX 0 <-- -ILSI L1_PUTO 0 <-- -ILSI L1_PUTX 0 <-- -ILSI L1_PUTS_only 0 <-- -ILSI L1_PUTS 0 <-- -ILSI IntAck 0 <-- -ILSI All_Acks 0 <-- -ILSI Writeback_Ack 0 <-- -ILSI L2_Replacement 0 <-- - -Memory controller: system.ruby.network.topology.ext_links2.ext_node.memBuffer: - memory_total_requests: 1635 - memory_reads: 863 - memory_writes: 772 - memory_refreshes: 798 - memory_total_request_delays: 689 - memory_delays_per_request: 0.421407 - memory_delays_in_input_queue: 101 - memory_delays_behind_head_of_bank_queue: 15 - memory_delays_stalled_at_head_of_bank_queue: 573 - memory_stalls_for_bank_busy: 170 +NP L1_GETS [86 ] 86 +NP L1_GETX [796 ] 796 +NP L1_PUTO [0 ] 0 +NP L1_PUTX [0 ] 0 +NP L1_PUTS [0 ] 0 +NP Inv [0 ] 0 + +I L1_GETS [0 ] 0 +I L1_GETX [0 ] 0 +I L1_PUTO [0 ] 0 +I L1_PUTX [0 ] 0 +I L1_PUTS [0 ] 0 +I Inv [0 ] 0 +I L2_Replacement [0 ] 0 + +ILS L1_GETS [0 ] 0 +ILS L1_GETX [0 ] 0 +ILS L1_PUTO [0 ] 0 +ILS L1_PUTX [0 ] 0 +ILS L1_PUTS_only [0 ] 0 +ILS L1_PUTS [0 ] 0 +ILS Inv [0 ] 0 +ILS L2_Replacement [0 ] 0 + +ILX L1_GETS [0 ] 0 +ILX L1_GETX [0 ] 0 +ILX L1_PUTO [0 ] 0 +ILX L1_PUTX [923 ] 923 +ILX L1_PUTS_only [0 ] 0 +ILX L1_PUTS [0 ] 0 +ILX Fwd_GETX [0 ] 0 +ILX Fwd_GETS [0 ] 0 +ILX Fwd_DMA [0 ] 0 +ILX Inv [0 ] 0 +ILX Data [0 ] 0 +ILX L2_Replacement [0 ] 0 + +ILO L1_GETS [0 ] 0 +ILO L1_GETX [0 ] 0 +ILO L1_PUTO [0 ] 0 +ILO L1_PUTX [0 ] 0 +ILO L1_PUTS [0 ] 0 +ILO Fwd_GETX [0 ] 0 +ILO Fwd_GETS [0 ] 0 +ILO Fwd_DMA [0 ] 0 +ILO Inv [0 ] 0 +ILO Data [0 ] 0 +ILO L2_Replacement [0 ] 0 + +ILOX L1_GETS [0 ] 0 +ILOX L1_GETX [0 ] 0 +ILOX L1_PUTO [0 ] 0 +ILOX L1_PUTX [0 ] 0 +ILOX L1_PUTS [0 ] 0 +ILOX Fwd_GETX [0 ] 0 +ILOX Fwd_GETS [0 ] 0 +ILOX Fwd_DMA [0 ] 0 +ILOX Data [0 ] 0 + +ILOS L1_GETS [0 ] 0 +ILOS L1_GETX [0 ] 0 +ILOS L1_PUTO [0 ] 0 +ILOS L1_PUTX [0 ] 0 +ILOS L1_PUTS_only [0 ] 0 +ILOS L1_PUTS [0 ] 0 +ILOS Fwd_GETX [0 ] 0 +ILOS Fwd_GETS [0 ] 0 +ILOS Fwd_DMA [0 ] 0 +ILOS Data [0 ] 0 +ILOS L2_Replacement [0 ] 0 + +ILOSX L1_GETS [0 ] 0 +ILOSX L1_GETX [0 ] 0 +ILOSX L1_PUTO [0 ] 0 +ILOSX L1_PUTX [0 ] 0 +ILOSX L1_PUTS_only [0 ] 0 +ILOSX L1_PUTS [0 ] 0 +ILOSX Fwd_GETX [0 ] 0 +ILOSX Fwd_GETS [0 ] 0 +ILOSX Fwd_DMA [0 ] 0 +ILOSX Data [0 ] 0 + +S L1_GETS [0 ] 0 +S L1_GETX [0 ] 0 +S L1_PUTX [0 ] 0 +S L1_PUTS [0 ] 0 +S Inv [0 ] 0 +S L2_Replacement [0 ] 0 + +O L1_GETS [0 ] 0 +O L1_GETX [0 ] 0 +O L1_PUTX [0 ] 0 +O Fwd_GETX [0 ] 0 +O Fwd_GETS [0 ] 0 +O Fwd_DMA [0 ] 0 +O L2_Replacement [0 ] 0 + +OLS L1_GETS [0 ] 0 +OLS L1_GETX [0 ] 0 +OLS L1_PUTX [0 ] 0 +OLS L1_PUTS_only [0 ] 0 +OLS L1_PUTS [0 ] 0 +OLS Fwd_GETX [0 ] 0 +OLS Fwd_GETS [0 ] 0 +OLS Fwd_DMA [0 ] 0 +OLS L2_Replacement [0 ] 0 + +OLSX L1_GETS [0 ] 0 +OLSX L1_GETX [0 ] 0 +OLSX L1_PUTO [0 ] 0 +OLSX L1_PUTX [0 ] 0 +OLSX L1_PUTS_only [0 ] 0 +OLSX L1_PUTS [0 ] 0 +OLSX Fwd_GETX [0 ] 0 +OLSX Fwd_GETS [0 ] 0 +OLSX Fwd_DMA [0 ] 0 +OLSX L2_Replacement [0 ] 0 + +SLS L1_GETS [0 ] 0 +SLS L1_GETX [0 ] 0 +SLS L1_PUTX [0 ] 0 +SLS L1_PUTS_only [0 ] 0 +SLS L1_PUTS [0 ] 0 +SLS Inv [0 ] 0 +SLS L2_Replacement [0 ] 0 + +M L1_GETS [6 ] 6 +M L1_GETX [40 ] 40 +M L1_PUTO [0 ] 0 +M L1_PUTX [0 ] 0 +M L1_PUTS [0 ] 0 +M Fwd_GETX [0 ] 0 +M Fwd_GETS [0 ] 0 +M Fwd_DMA [0 ] 0 +M L2_Replacement [874 ] 874 + +IFGX L1_GETS [0 ] 0 +IFGX L1_GETX [0 ] 0 +IFGX L1_PUTO [0 ] 0 +IFGX L1_PUTX [0 ] 0 +IFGX L1_PUTS_only [0 ] 0 +IFGX L1_PUTS [0 ] 0 +IFGX Fwd_GETX [0 ] 0 +IFGX Fwd_GETS [0 ] 0 +IFGX Fwd_DMA [0 ] 0 +IFGX Inv [0 ] 0 +IFGX Data [0 ] 0 +IFGX Data_Exclusive [0 ] 0 +IFGX L2_Replacement [0 ] 0 + +IFGS L1_GETS [0 ] 0 +IFGS L1_GETX [0 ] 0 +IFGS L1_PUTO [0 ] 0 +IFGS L1_PUTX [0 ] 0 +IFGS L1_PUTS_only [0 ] 0 +IFGS L1_PUTS [0 ] 0 +IFGS Fwd_GETX [0 ] 0 +IFGS Fwd_GETS [0 ] 0 +IFGS Fwd_DMA [0 ] 0 +IFGS Inv [0 ] 0 +IFGS Data [0 ] 0 +IFGS Data_Exclusive [0 ] 0 +IFGS L2_Replacement [0 ] 0 + +ISFGS L1_GETS [0 ] 0 +ISFGS L1_GETX [0 ] 0 +ISFGS L1_PUTO [0 ] 0 +ISFGS L1_PUTX [0 ] 0 +ISFGS L1_PUTS_only [0 ] 0 +ISFGS L1_PUTS [0 ] 0 +ISFGS Fwd_GETX [0 ] 0 +ISFGS Fwd_GETS [0 ] 0 +ISFGS Fwd_DMA [0 ] 0 +ISFGS Inv [0 ] 0 +ISFGS Data [0 ] 0 +ISFGS L2_Replacement [0 ] 0 + +IFGXX L1_GETS [0 ] 0 +IFGXX L1_GETX [0 ] 0 +IFGXX L1_PUTO [0 ] 0 +IFGXX L1_PUTX [0 ] 0 +IFGXX L1_PUTS_only [0 ] 0 +IFGXX L1_PUTS [0 ] 0 +IFGXX Fwd_GETX [0 ] 0 +IFGXX Fwd_GETS [0 ] 0 +IFGXX Fwd_DMA [0 ] 0 +IFGXX Inv [0 ] 0 +IFGXX IntAck [0 ] 0 +IFGXX All_Acks [0 ] 0 +IFGXX Data_Exclusive [0 ] 0 +IFGXX L2_Replacement [0 ] 0 + +OFGX L1_GETS [0 ] 0 +OFGX L1_GETX [0 ] 0 +OFGX L1_PUTO [0 ] 0 +OFGX L1_PUTX [0 ] 0 +OFGX L1_PUTS_only [0 ] 0 +OFGX L1_PUTS [0 ] 0 +OFGX Fwd_GETX [0 ] 0 +OFGX Fwd_GETS [0 ] 0 +OFGX Fwd_DMA [0 ] 0 +OFGX Inv [0 ] 0 +OFGX L2_Replacement [0 ] 0 + +OLSF L1_GETS [0 ] 0 +OLSF L1_GETX [0 ] 0 +OLSF L1_PUTO [0 ] 0 +OLSF L1_PUTX [0 ] 0 +OLSF L1_PUTS_only [0 ] 0 +OLSF L1_PUTS [0 ] 0 +OLSF Fwd_GETX [0 ] 0 +OLSF Fwd_GETS [0 ] 0 +OLSF Fwd_DMA [0 ] 0 +OLSF Inv [0 ] 0 +OLSF IntAck [0 ] 0 +OLSF All_Acks [0 ] 0 +OLSF L2_Replacement [0 ] 0 + +ILOW L1_GETS [0 ] 0 +ILOW L1_GETX [0 ] 0 +ILOW L1_PUTO [0 ] 0 +ILOW L1_PUTX [0 ] 0 +ILOW L1_PUTS_only [0 ] 0 +ILOW L1_PUTS [0 ] 0 +ILOW Fwd_GETX [0 ] 0 +ILOW Fwd_GETS [0 ] 0 +ILOW Fwd_DMA [0 ] 0 +ILOW Inv [0 ] 0 +ILOW L1_WBCLEANDATA [0 ] 0 +ILOW L1_WBDIRTYDATA [0 ] 0 +ILOW Unblock [0 ] 0 +ILOW L2_Replacement [0 ] 0 + +ILOXW L1_GETS [0 ] 0 +ILOXW L1_GETX [0 ] 0 +ILOXW L1_PUTO [0 ] 0 +ILOXW L1_PUTX [0 ] 0 +ILOXW L1_PUTS_only [0 ] 0 +ILOXW L1_PUTS [0 ] 0 +ILOXW Fwd_GETX [0 ] 0 +ILOXW Fwd_GETS [0 ] 0 +ILOXW Fwd_DMA [0 ] 0 +ILOXW Inv [0 ] 0 +ILOXW L1_WBCLEANDATA [0 ] 0 +ILOXW L1_WBDIRTYDATA [0 ] 0 +ILOXW Unblock [0 ] 0 +ILOXW L2_Replacement [0 ] 0 + +ILOSW L1_GETS [0 ] 0 +ILOSW L1_GETX [0 ] 0 +ILOSW L1_PUTO [0 ] 0 +ILOSW L1_PUTX [0 ] 0 +ILOSW L1_PUTS_only [0 ] 0 +ILOSW L1_PUTS [0 ] 0 +ILOSW Fwd_GETX [0 ] 0 +ILOSW Fwd_GETS [0 ] 0 +ILOSW Fwd_DMA [0 ] 0 +ILOSW Inv [0 ] 0 +ILOSW L1_WBCLEANDATA [0 ] 0 +ILOSW L1_WBDIRTYDATA [0 ] 0 +ILOSW Unblock [0 ] 0 +ILOSW L2_Replacement [0 ] 0 + +ILOSXW L1_GETS [0 ] 0 +ILOSXW L1_GETX [0 ] 0 +ILOSXW L1_PUTO [0 ] 0 +ILOSXW L1_PUTX [0 ] 0 +ILOSXW L1_PUTS_only [0 ] 0 +ILOSXW L1_PUTS [0 ] 0 +ILOSXW Fwd_GETX [0 ] 0 +ILOSXW Fwd_GETS [0 ] 0 +ILOSXW Fwd_DMA [0 ] 0 +ILOSXW Inv [0 ] 0 +ILOSXW L1_WBCLEANDATA [0 ] 0 +ILOSXW L1_WBDIRTYDATA [0 ] 0 +ILOSXW Unblock [0 ] 0 +ILOSXW L2_Replacement [0 ] 0 + +SLSW L1_GETS [0 ] 0 +SLSW L1_GETX [0 ] 0 +SLSW L1_PUTO [0 ] 0 +SLSW L1_PUTX [0 ] 0 +SLSW L1_PUTS_only [0 ] 0 +SLSW L1_PUTS [0 ] 0 +SLSW Fwd_GETX [0 ] 0 +SLSW Fwd_GETS [0 ] 0 +SLSW Fwd_DMA [0 ] 0 +SLSW Inv [0 ] 0 +SLSW Unblock [0 ] 0 +SLSW L2_Replacement [0 ] 0 + +OLSW L1_GETS [0 ] 0 +OLSW L1_GETX [0 ] 0 +OLSW L1_PUTO [0 ] 0 +OLSW L1_PUTX [0 ] 0 +OLSW L1_PUTS_only [0 ] 0 +OLSW L1_PUTS [0 ] 0 +OLSW Fwd_GETX [0 ] 0 +OLSW Fwd_GETS [0 ] 0 +OLSW Fwd_DMA [0 ] 0 +OLSW Inv [0 ] 0 +OLSW Unblock [0 ] 0 +OLSW L2_Replacement [0 ] 0 + +ILSW L1_GETS [0 ] 0 +ILSW L1_GETX [0 ] 0 +ILSW L1_PUTO [0 ] 0 +ILSW L1_PUTX [0 ] 0 +ILSW L1_PUTS_only [0 ] 0 +ILSW L1_PUTS [0 ] 0 +ILSW Fwd_GETX [0 ] 0 +ILSW Fwd_GETS [0 ] 0 +ILSW Fwd_DMA [0 ] 0 +ILSW Inv [0 ] 0 +ILSW L1_WBCLEANDATA [0 ] 0 +ILSW Unblock [0 ] 0 +ILSW L2_Replacement [0 ] 0 + +IW L1_GETS [0 ] 0 +IW L1_GETX [0 ] 0 +IW L1_PUTO [0 ] 0 +IW L1_PUTX [0 ] 0 +IW L1_PUTS_only [0 ] 0 +IW L1_PUTS [0 ] 0 +IW Fwd_GETX [0 ] 0 +IW Fwd_GETS [0 ] 0 +IW Fwd_DMA [0 ] 0 +IW Inv [0 ] 0 +IW L1_WBCLEANDATA [0 ] 0 +IW L2_Replacement [0 ] 0 + +OW L1_GETS [0 ] 0 +OW L1_GETX [0 ] 0 +OW L1_PUTO [0 ] 0 +OW L1_PUTX [0 ] 0 +OW L1_PUTS_only [0 ] 0 +OW L1_PUTS [0 ] 0 +OW Fwd_GETX [0 ] 0 +OW Fwd_GETS [0 ] 0 +OW Fwd_DMA [0 ] 0 +OW Inv [0 ] 0 +OW Unblock [0 ] 0 +OW L2_Replacement [0 ] 0 + +SW L1_GETS [0 ] 0 +SW L1_GETX [0 ] 0 +SW L1_PUTO [0 ] 0 +SW L1_PUTX [0 ] 0 +SW L1_PUTS_only [0 ] 0 +SW L1_PUTS [0 ] 0 +SW Fwd_GETX [0 ] 0 +SW Fwd_GETS [0 ] 0 +SW Fwd_DMA [0 ] 0 +SW Inv [0 ] 0 +SW Unblock [0 ] 0 +SW L2_Replacement [0 ] 0 + +OXW L1_GETS [0 ] 0 +OXW L1_GETX [0 ] 0 +OXW L1_PUTO [0 ] 0 +OXW L1_PUTX [0 ] 0 +OXW L1_PUTS_only [0 ] 0 +OXW L1_PUTS [0 ] 0 +OXW Fwd_GETX [0 ] 0 +OXW Fwd_GETS [0 ] 0 +OXW Fwd_DMA [0 ] 0 +OXW Inv [0 ] 0 +OXW Unblock [0 ] 0 +OXW L2_Replacement [0 ] 0 + +OLSXW L1_GETS [0 ] 0 +OLSXW L1_GETX [0 ] 0 +OLSXW L1_PUTO [0 ] 0 +OLSXW L1_PUTX [0 ] 0 +OLSXW L1_PUTS_only [0 ] 0 +OLSXW L1_PUTS [0 ] 0 +OLSXW Fwd_GETX [0 ] 0 +OLSXW Fwd_GETS [0 ] 0 +OLSXW Fwd_DMA [0 ] 0 +OLSXW Inv [0 ] 0 +OLSXW Unblock [0 ] 0 +OLSXW L2_Replacement [0 ] 0 + +ILXW L1_GETS [49 ] 49 +ILXW L1_GETX [1 ] 1 +ILXW L1_PUTO [0 ] 0 +ILXW L1_PUTX [0 ] 0 +ILXW L1_PUTS_only [0 ] 0 +ILXW L1_PUTS [0 ] 0 +ILXW Fwd_GETX [0 ] 0 +ILXW Fwd_GETS [0 ] 0 +ILXW Fwd_DMA [0 ] 0 +ILXW Inv [0 ] 0 +ILXW Data [0 ] 0 +ILXW L1_WBCLEANDATA [83 ] 83 +ILXW L1_WBDIRTYDATA [840 ] 840 +ILXW Unblock [0 ] 0 +ILXW L2_Replacement [0 ] 0 + +IFLS L1_GETS [0 ] 0 +IFLS L1_GETX [0 ] 0 +IFLS L1_PUTO [0 ] 0 +IFLS L1_PUTX [0 ] 0 +IFLS L1_PUTS_only [0 ] 0 +IFLS L1_PUTS [0 ] 0 +IFLS Fwd_GETX [0 ] 0 +IFLS Fwd_GETS [0 ] 0 +IFLS Fwd_DMA [0 ] 0 +IFLS Inv [0 ] 0 +IFLS Unblock [0 ] 0 +IFLS L2_Replacement [0 ] 0 + +IFLO L1_GETS [0 ] 0 +IFLO L1_GETX [0 ] 0 +IFLO L1_PUTO [0 ] 0 +IFLO L1_PUTX [0 ] 0 +IFLO L1_PUTS_only [0 ] 0 +IFLO L1_PUTS [0 ] 0 +IFLO Fwd_GETX [0 ] 0 +IFLO Fwd_GETS [0 ] 0 +IFLO Fwd_DMA [0 ] 0 +IFLO Inv [0 ] 0 +IFLO Unblock [0 ] 0 +IFLO L2_Replacement [0 ] 0 + +IFLOX L1_GETS [0 ] 0 +IFLOX L1_GETX [0 ] 0 +IFLOX L1_PUTO [0 ] 0 +IFLOX L1_PUTX [0 ] 0 +IFLOX L1_PUTS_only [0 ] 0 +IFLOX L1_PUTS [0 ] 0 +IFLOX Fwd_GETX [0 ] 0 +IFLOX Fwd_GETS [0 ] 0 +IFLOX Fwd_DMA [0 ] 0 +IFLOX Inv [0 ] 0 +IFLOX Unblock [0 ] 0 +IFLOX Exclusive_Unblock [0 ] 0 +IFLOX L2_Replacement [0 ] 0 + +IFLOXX L1_GETS [0 ] 0 +IFLOXX L1_GETX [0 ] 0 +IFLOXX L1_PUTO [0 ] 0 +IFLOXX L1_PUTX [0 ] 0 +IFLOXX L1_PUTS_only [0 ] 0 +IFLOXX L1_PUTS [0 ] 0 +IFLOXX Fwd_GETX [0 ] 0 +IFLOXX Fwd_GETS [0 ] 0 +IFLOXX Fwd_DMA [0 ] 0 +IFLOXX Inv [0 ] 0 +IFLOXX Unblock [0 ] 0 +IFLOXX Exclusive_Unblock [0 ] 0 +IFLOXX L2_Replacement [0 ] 0 + +IFLOSX L1_GETS [0 ] 0 +IFLOSX L1_GETX [0 ] 0 +IFLOSX L1_PUTO [0 ] 0 +IFLOSX L1_PUTX [0 ] 0 +IFLOSX L1_PUTS_only [0 ] 0 +IFLOSX L1_PUTS [0 ] 0 +IFLOSX Fwd_GETX [0 ] 0 +IFLOSX Fwd_GETS [0 ] 0 +IFLOSX Fwd_DMA [0 ] 0 +IFLOSX Inv [0 ] 0 +IFLOSX Unblock [0 ] 0 +IFLOSX Exclusive_Unblock [0 ] 0 +IFLOSX L2_Replacement [0 ] 0 + +IFLXO L1_GETS [0 ] 0 +IFLXO L1_GETX [0 ] 0 +IFLXO L1_PUTO [0 ] 0 +IFLXO L1_PUTX [0 ] 0 +IFLXO L1_PUTS_only [0 ] 0 +IFLXO L1_PUTS [0 ] 0 +IFLXO Fwd_GETX [0 ] 0 +IFLXO Fwd_GETS [0 ] 0 +IFLXO Fwd_DMA [0 ] 0 +IFLXO Inv [0 ] 0 +IFLXO Exclusive_Unblock [0 ] 0 +IFLXO L2_Replacement [0 ] 0 + +IGS L1_GETS [0 ] 0 +IGS L1_GETX [0 ] 0 +IGS L1_PUTO [0 ] 0 +IGS L1_PUTX [62 ] 62 +IGS L1_PUTS_only [0 ] 0 +IGS L1_PUTS [0 ] 0 +IGS Fwd_GETX [0 ] 0 +IGS Fwd_GETS [0 ] 0 +IGS Fwd_DMA [0 ] 0 +IGS Own_GETX [0 ] 0 +IGS Inv [0 ] 0 +IGS Data [0 ] 0 +IGS Data_Exclusive [86 ] 86 +IGS Unblock [0 ] 0 +IGS Exclusive_Unblock [85 ] 85 +IGS L2_Replacement [0 ] 0 + +IGM L1_GETS [0 ] 0 +IGM L1_GETX [0 ] 0 +IGM L1_PUTO [0 ] 0 +IGM L1_PUTX [0 ] 0 +IGM L1_PUTS_only [0 ] 0 +IGM L1_PUTS [0 ] 0 +IGM Fwd_GETX [0 ] 0 +IGM Fwd_GETS [0 ] 0 +IGM Fwd_DMA [0 ] 0 +IGM Own_GETX [0 ] 0 +IGM Inv [0 ] 0 +IGM ExtAck [0 ] 0 +IGM Data [795 ] 795 +IGM Data_Exclusive [0 ] 0 +IGM L2_Replacement [0 ] 0 + +IGMLS L1_GETS [0 ] 0 +IGMLS L1_GETX [0 ] 0 +IGMLS L1_PUTO [0 ] 0 +IGMLS L1_PUTX [0 ] 0 +IGMLS L1_PUTS_only [0 ] 0 +IGMLS L1_PUTS [0 ] 0 +IGMLS Inv [0 ] 0 +IGMLS IntAck [0 ] 0 +IGMLS ExtAck [0 ] 0 +IGMLS All_Acks [0 ] 0 +IGMLS Data [0 ] 0 +IGMLS Data_Exclusive [0 ] 0 +IGMLS L2_Replacement [0 ] 0 + +IGMO L1_GETS [0 ] 0 +IGMO L1_GETX [0 ] 0 +IGMO L1_PUTO [0 ] 0 +IGMO L1_PUTX [1243 ] 1243 +IGMO L1_PUTS_only [0 ] 0 +IGMO L1_PUTS [0 ] 0 +IGMO Fwd_GETX [0 ] 0 +IGMO Fwd_GETS [0 ] 0 +IGMO Fwd_DMA [0 ] 0 +IGMO Own_GETX [0 ] 0 +IGMO ExtAck [0 ] 0 +IGMO All_Acks [795 ] 795 +IGMO Exclusive_Unblock [795 ] 795 +IGMO L2_Replacement [0 ] 0 + +IGMIO L1_GETS [0 ] 0 +IGMIO L1_GETX [0 ] 0 +IGMIO L1_PUTO [0 ] 0 +IGMIO L1_PUTX [0 ] 0 +IGMIO L1_PUTS_only [0 ] 0 +IGMIO L1_PUTS [0 ] 0 +IGMIO Fwd_GETX [0 ] 0 +IGMIO Fwd_GETS [0 ] 0 +IGMIO Fwd_DMA [0 ] 0 +IGMIO Own_GETX [0 ] 0 +IGMIO ExtAck [0 ] 0 +IGMIO All_Acks [0 ] 0 + +OGMIO L1_GETS [0 ] 0 +OGMIO L1_GETX [0 ] 0 +OGMIO L1_PUTO [0 ] 0 +OGMIO L1_PUTX [0 ] 0 +OGMIO L1_PUTS_only [0 ] 0 +OGMIO L1_PUTS [0 ] 0 +OGMIO Fwd_GETX [0 ] 0 +OGMIO Fwd_GETS [0 ] 0 +OGMIO Fwd_DMA [0 ] 0 +OGMIO Own_GETX [0 ] 0 +OGMIO ExtAck [0 ] 0 +OGMIO All_Acks [0 ] 0 + +IGMIOF L1_GETS [0 ] 0 +IGMIOF L1_GETX [0 ] 0 +IGMIOF L1_PUTO [0 ] 0 +IGMIOF L1_PUTX [0 ] 0 +IGMIOF L1_PUTS_only [0 ] 0 +IGMIOF L1_PUTS [0 ] 0 +IGMIOF IntAck [0 ] 0 +IGMIOF All_Acks [0 ] 0 +IGMIOF Data_Exclusive [0 ] 0 + +IGMIOFS L1_GETS [0 ] 0 +IGMIOFS L1_GETX [0 ] 0 +IGMIOFS L1_PUTO [0 ] 0 +IGMIOFS L1_PUTX [0 ] 0 +IGMIOFS L1_PUTS_only [0 ] 0 +IGMIOFS L1_PUTS [0 ] 0 +IGMIOFS Fwd_GETX [0 ] 0 +IGMIOFS Fwd_GETS [0 ] 0 +IGMIOFS Fwd_DMA [0 ] 0 +IGMIOFS Inv [0 ] 0 +IGMIOFS Data [0 ] 0 +IGMIOFS L2_Replacement [0 ] 0 + +OGMIOF L1_GETS [0 ] 0 +OGMIOF L1_GETX [0 ] 0 +OGMIOF L1_PUTO [0 ] 0 +OGMIOF L1_PUTX [0 ] 0 +OGMIOF L1_PUTS_only [0 ] 0 +OGMIOF L1_PUTS [0 ] 0 +OGMIOF IntAck [0 ] 0 +OGMIOF All_Acks [0 ] 0 + +II L1_GETS [0 ] 0 +II L1_GETX [0 ] 0 +II L1_PUTO [0 ] 0 +II L1_PUTX [0 ] 0 +II L1_PUTS_only [0 ] 0 +II L1_PUTS [0 ] 0 +II IntAck [0 ] 0 +II All_Acks [0 ] 0 + +MM L1_GETS [0 ] 0 +MM L1_GETX [0 ] 0 +MM L1_PUTO [0 ] 0 +MM L1_PUTX [11 ] 11 +MM L1_PUTS_only [0 ] 0 +MM L1_PUTS [0 ] 0 +MM Fwd_GETX [0 ] 0 +MM Fwd_GETS [0 ] 0 +MM Fwd_DMA [0 ] 0 +MM Inv [0 ] 0 +MM Exclusive_Unblock [40 ] 40 +MM L2_Replacement [0 ] 0 + +SS L1_GETS [0 ] 0 +SS L1_GETX [0 ] 0 +SS L1_PUTO [0 ] 0 +SS L1_PUTX [0 ] 0 +SS L1_PUTS_only [0 ] 0 +SS L1_PUTS [0 ] 0 +SS Fwd_GETX [0 ] 0 +SS Fwd_GETS [0 ] 0 +SS Fwd_DMA [0 ] 0 +SS Inv [0 ] 0 +SS Unblock [0 ] 0 +SS L2_Replacement [0 ] 0 + +OO L1_GETS [0 ] 0 +OO L1_GETX [0 ] 0 +OO L1_PUTO [0 ] 0 +OO L1_PUTX [0 ] 0 +OO L1_PUTS_only [0 ] 0 +OO L1_PUTS [0 ] 0 +OO Fwd_GETX [0 ] 0 +OO Fwd_GETS [0 ] 0 +OO Fwd_DMA [0 ] 0 +OO Inv [0 ] 0 +OO Unblock [0 ] 0 +OO Exclusive_Unblock [6 ] 6 +OO L2_Replacement [0 ] 0 + +OLSS L1_GETS [0 ] 0 +OLSS L1_GETX [0 ] 0 +OLSS L1_PUTO [0 ] 0 +OLSS L1_PUTX [0 ] 0 +OLSS L1_PUTS_only [0 ] 0 +OLSS L1_PUTS [0 ] 0 +OLSS Fwd_GETX [0 ] 0 +OLSS Fwd_GETS [0 ] 0 +OLSS Fwd_DMA [0 ] 0 +OLSS Inv [0 ] 0 +OLSS Unblock [0 ] 0 +OLSS L2_Replacement [0 ] 0 + +OLSXS L1_GETS [0 ] 0 +OLSXS L1_GETX [0 ] 0 +OLSXS L1_PUTO [0 ] 0 +OLSXS L1_PUTX [0 ] 0 +OLSXS L1_PUTS_only [0 ] 0 +OLSXS L1_PUTS [0 ] 0 +OLSXS Fwd_GETX [0 ] 0 +OLSXS Fwd_GETS [0 ] 0 +OLSXS Fwd_DMA [0 ] 0 +OLSXS Inv [0 ] 0 +OLSXS Unblock [0 ] 0 +OLSXS L2_Replacement [0 ] 0 + +SLSS L1_GETS [0 ] 0 +SLSS L1_GETX [0 ] 0 +SLSS L1_PUTO [0 ] 0 +SLSS L1_PUTX [0 ] 0 +SLSS L1_PUTS_only [0 ] 0 +SLSS L1_PUTS [0 ] 0 +SLSS Fwd_GETX [0 ] 0 +SLSS Fwd_GETS [0 ] 0 +SLSS Fwd_DMA [0 ] 0 +SLSS Inv [0 ] 0 +SLSS Unblock [0 ] 0 +SLSS L2_Replacement [0 ] 0 + +OI L1_GETS [0 ] 0 +OI L1_GETX [0 ] 0 +OI L1_PUTO [0 ] 0 +OI L1_PUTX [0 ] 0 +OI L1_PUTS_only [0 ] 0 +OI L1_PUTS [0 ] 0 +OI Fwd_GETX [0 ] 0 +OI Fwd_GETS [0 ] 0 +OI Fwd_DMA [0 ] 0 +OI Writeback_Ack [0 ] 0 +OI Writeback_Nack [0 ] 0 +OI L2_Replacement [0 ] 0 + +MI L1_GETS [0 ] 0 +MI L1_GETX [18 ] 18 +MI L1_PUTO [0 ] 0 +MI L1_PUTX [0 ] 0 +MI L1_PUTS_only [0 ] 0 +MI L1_PUTS [0 ] 0 +MI Fwd_GETX [0 ] 0 +MI Fwd_GETS [0 ] 0 +MI Fwd_DMA [0 ] 0 +MI Writeback_Ack [873 ] 873 +MI L2_Replacement [0 ] 0 + +MII L1_GETS [0 ] 0 +MII L1_GETX [0 ] 0 +MII L1_PUTO [0 ] 0 +MII L1_PUTX [0 ] 0 +MII L1_PUTS_only [0 ] 0 +MII L1_PUTS [0 ] 0 +MII Writeback_Ack [0 ] 0 +MII Writeback_Nack [0 ] 0 +MII L2_Replacement [0 ] 0 + +OLSI L1_GETS [0 ] 0 +OLSI L1_GETX [0 ] 0 +OLSI L1_PUTO [0 ] 0 +OLSI L1_PUTX [0 ] 0 +OLSI L1_PUTS_only [0 ] 0 +OLSI L1_PUTS [0 ] 0 +OLSI Fwd_GETX [0 ] 0 +OLSI Fwd_GETS [0 ] 0 +OLSI Fwd_DMA [0 ] 0 +OLSI Writeback_Ack [0 ] 0 +OLSI L2_Replacement [0 ] 0 + +ILSI L1_GETS [0 ] 0 +ILSI L1_GETX [0 ] 0 +ILSI L1_PUTO [0 ] 0 +ILSI L1_PUTX [0 ] 0 +ILSI L1_PUTS_only [0 ] 0 +ILSI L1_PUTS [0 ] 0 +ILSI IntAck [0 ] 0 +ILSI All_Acks [0 ] 0 +ILSI Writeback_Ack [0 ] 0 +ILSI L2_Replacement [0 ] 0 + +Memory controller: system.dir_cntrl0.memBuffer: + memory_total_requests: 1676 + memory_reads: 882 + memory_writes: 794 + memory_refreshes: 776 + memory_total_request_delays: 684 + memory_delays_per_request: 0.408115 + memory_delays_in_input_queue: 96 + memory_delays_behind_head_of_bank_queue: 16 + memory_delays_stalled_at_head_of_bank_queue: 572 + memory_stalls_for_bank_busy: 161 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 35 + memory_stalls_for_arbitration: 32 memory_stalls_for_bus: 229 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 73 - memory_stalls_for_read_read_turnaround: 66 - accesses_per_bank: 29 65 49 82 66 72 63 36 52 53 42 57 62 51 33 45 44 34 49 49 50 37 55 51 60 45 63 61 47 41 45 47 + memory_stalls_for_read_write_turnaround: 92 + memory_stalls_for_read_read_turnaround: 58 + accesses_per_bank: 47 54 48 87 71 72 66 51 62 62 38 48 48 50 38 58 54 41 58 48 53 30 45 51 53 45 55 52 44 43 42 62 - --- Directory 0 --- + --- Directory --- - Event Counts - -GETX 782 -GETS 98 -PUTX 857 -PUTO 0 -PUTO_SHARERS 0 -Unblock 0 -Last_Unblock 0 -Exclusive_Unblock 862 -Clean_Writeback 85 -Dirty_Writeback 772 -Memory_Data 863 -Memory_Ack 772 -DMA_READ 0 -DMA_WRITE 0 -Data 0 +GETX [807 ] 807 +GETS [86 ] 86 +PUTX [873 ] 873 +PUTO [0 ] 0 +PUTO_SHARERS [0 ] 0 +Unblock [0 ] 0 +Last_Unblock [0 ] 0 +Exclusive_Unblock [880 ] 880 +Clean_Writeback [79 ] 79 +Dirty_Writeback [794 ] 794 +Memory_Data [882 ] 882 +Memory_Ack [793 ] 793 +DMA_READ [0 ] 0 +DMA_WRITE [0 ] 0 +Data [0 ] 0 - Transitions - -I GETX 777 -I GETS 86 -I PUTX 0 <-- -I PUTO 0 <-- -I Memory_Data 0 <-- -I Memory_Ack 767 -I DMA_READ 0 <-- -I DMA_WRITE 0 <-- - -S GETX 0 <-- -S GETS 0 <-- -S PUTX 0 <-- -S PUTO 0 <-- -S Memory_Data 0 <-- -S Memory_Ack 0 <-- -S DMA_READ 0 <-- -S DMA_WRITE 0 <-- - -O GETX 0 <-- -O GETS 0 <-- -O PUTX 0 <-- -O PUTO 0 <-- -O PUTO_SHARERS 0 <-- -O Memory_Data 0 <-- -O Memory_Ack 0 <-- -O DMA_READ 0 <-- -O DMA_WRITE 0 <-- - -M GETX 0 <-- -M GETS 0 <-- -M PUTX 857 -M PUTO 0 <-- -M PUTO_SHARERS 0 <-- -M Memory_Data 0 <-- -M Memory_Ack 0 <-- -M DMA_READ 0 <-- -M DMA_WRITE 0 <-- - -IS GETX 0 <-- -IS GETS 0 <-- -IS PUTX 0 <-- -IS PUTO 0 <-- -IS PUTO_SHARERS 0 <-- -IS Unblock 0 <-- -IS Exclusive_Unblock 86 -IS Memory_Data 86 -IS Memory_Ack 1 -IS DMA_READ 0 <-- -IS DMA_WRITE 0 <-- - -SS GETX 0 <-- -SS GETS 0 <-- -SS PUTX 0 <-- -SS PUTO 0 <-- -SS PUTO_SHARERS 0 <-- -SS Unblock 0 <-- -SS Last_Unblock 0 <-- -SS Memory_Data 0 <-- -SS Memory_Ack 0 <-- -SS DMA_READ 0 <-- -SS DMA_WRITE 0 <-- - -OO GETX 0 <-- -OO GETS 0 <-- -OO PUTX 0 <-- -OO PUTO 0 <-- -OO PUTO_SHARERS 0 <-- -OO Unblock 0 <-- -OO Last_Unblock 0 <-- -OO Memory_Data 0 <-- -OO Memory_Ack 0 <-- -OO DMA_READ 0 <-- -OO DMA_WRITE 0 <-- - -MO GETX 0 <-- -MO GETS 0 <-- -MO PUTX 0 <-- -MO PUTO 0 <-- -MO PUTO_SHARERS 0 <-- -MO Unblock 0 <-- -MO Exclusive_Unblock 0 <-- -MO Memory_Data 0 <-- -MO Memory_Ack 0 <-- -MO DMA_READ 0 <-- -MO DMA_WRITE 0 <-- - -MM GETX 0 <-- -MM GETS 0 <-- -MM PUTX 0 <-- -MM PUTO 0 <-- -MM PUTO_SHARERS 0 <-- -MM Exclusive_Unblock 776 -MM Memory_Data 777 -MM Memory_Ack 4 -MM DMA_READ 0 <-- -MM DMA_WRITE 0 <-- - - -MI GETX 5 -MI GETS 12 -MI PUTX 0 <-- -MI PUTO 0 <-- -MI PUTO_SHARERS 0 <-- -MI Unblock 0 <-- -MI Clean_Writeback 85 -MI Dirty_Writeback 772 -MI Memory_Data 0 <-- -MI Memory_Ack 0 <-- -MI DMA_READ 0 <-- -MI DMA_WRITE 0 <-- - -MIS GETX 0 <-- -MIS GETS 0 <-- -MIS PUTX 0 <-- -MIS PUTO 0 <-- -MIS PUTO_SHARERS 0 <-- -MIS Unblock 0 <-- -MIS Clean_Writeback 0 <-- -MIS Dirty_Writeback 0 <-- -MIS Memory_Data 0 <-- -MIS Memory_Ack 0 <-- -MIS DMA_READ 0 <-- -MIS DMA_WRITE 0 <-- - -OS GETX 0 <-- -OS GETS 0 <-- -OS PUTX 0 <-- -OS PUTO 0 <-- -OS PUTO_SHARERS 0 <-- -OS Unblock 0 <-- -OS Clean_Writeback 0 <-- -OS Dirty_Writeback 0 <-- -OS Memory_Data 0 <-- -OS Memory_Ack 0 <-- -OS DMA_READ 0 <-- -OS DMA_WRITE 0 <-- - -OSS GETX 0 <-- -OSS GETS 0 <-- -OSS PUTX 0 <-- -OSS PUTO 0 <-- -OSS PUTO_SHARERS 0 <-- -OSS Unblock 0 <-- -OSS Clean_Writeback 0 <-- -OSS Dirty_Writeback 0 <-- -OSS Memory_Data 0 <-- -OSS Memory_Ack 0 <-- -OSS DMA_READ 0 <-- -OSS DMA_WRITE 0 <-- - -XI_M GETX 0 <-- -XI_M GETS 0 <-- -XI_M PUTX 0 <-- -XI_M PUTO 0 <-- -XI_M PUTO_SHARERS 0 <-- -XI_M Memory_Data 0 <-- -XI_M Memory_Ack 0 <-- -XI_M DMA_READ 0 <-- -XI_M DMA_WRITE 0 <-- - -XI_U GETX 0 <-- -XI_U GETS 0 <-- -XI_U PUTX 0 <-- -XI_U PUTO 0 <-- -XI_U PUTO_SHARERS 0 <-- -XI_U Exclusive_Unblock 0 <-- -XI_U Memory_Ack 0 <-- -XI_U DMA_READ 0 <-- -XI_U DMA_WRITE 0 <-- - -OI_D GETX 0 <-- -OI_D GETS 0 <-- -OI_D PUTX 0 <-- -OI_D PUTO 0 <-- -OI_D PUTO_SHARERS 0 <-- -OI_D DMA_READ 0 <-- -OI_D DMA_WRITE 0 <-- -OI_D Data 0 <-- - +I GETX [796 ] 796 +I GETS [86 ] 86 +I PUTX [0 ] 0 +I PUTO [0 ] 0 +I Memory_Data [0 ] 0 +I Memory_Ack [791 ] 791 +I DMA_READ [0 ] 0 +I DMA_WRITE [0 ] 0 + +S GETX [0 ] 0 +S GETS [0 ] 0 +S PUTX [0 ] 0 +S PUTO [0 ] 0 +S Memory_Data [0 ] 0 +S Memory_Ack [0 ] 0 +S DMA_READ [0 ] 0 +S DMA_WRITE [0 ] 0 + +O GETX [0 ] 0 +O GETS [0 ] 0 +O PUTX [0 ] 0 +O PUTO [0 ] 0 +O PUTO_SHARERS [0 ] 0 +O Memory_Data [0 ] 0 +O Memory_Ack [0 ] 0 +O DMA_READ [0 ] 0 +O DMA_WRITE [0 ] 0 + +M GETX [0 ] 0 +M GETS [0 ] 0 +M PUTX [873 ] 873 +M PUTO [0 ] 0 +M PUTO_SHARERS [0 ] 0 +M Memory_Data [0 ] 0 +M Memory_Ack [0 ] 0 +M DMA_READ [0 ] 0 +M DMA_WRITE [0 ] 0 + +IS GETX [0 ] 0 +IS GETS [0 ] 0 +IS PUTX [0 ] 0 +IS PUTO [0 ] 0 +IS PUTO_SHARERS [0 ] 0 +IS Unblock [0 ] 0 +IS Exclusive_Unblock [85 ] 85 +IS Memory_Data [86 ] 86 +IS Memory_Ack [1 ] 1 +IS DMA_READ [0 ] 0 +IS DMA_WRITE [0 ] 0 + +SS GETX [0 ] 0 +SS GETS [0 ] 0 +SS PUTX [0 ] 0 +SS PUTO [0 ] 0 +SS PUTO_SHARERS [0 ] 0 +SS Unblock [0 ] 0 +SS Last_Unblock [0 ] 0 +SS Memory_Data [0 ] 0 +SS Memory_Ack [0 ] 0 +SS DMA_READ [0 ] 0 +SS DMA_WRITE [0 ] 0 + +OO GETX [0 ] 0 +OO GETS [0 ] 0 +OO PUTX [0 ] 0 +OO PUTO [0 ] 0 +OO PUTO_SHARERS [0 ] 0 +OO Unblock [0 ] 0 +OO Last_Unblock [0 ] 0 +OO Memory_Data [0 ] 0 +OO Memory_Ack [0 ] 0 +OO DMA_READ [0 ] 0 +OO DMA_WRITE [0 ] 0 + +MO GETX [0 ] 0 +MO GETS [0 ] 0 +MO PUTX [0 ] 0 +MO PUTO [0 ] 0 +MO PUTO_SHARERS [0 ] 0 +MO Unblock [0 ] 0 +MO Exclusive_Unblock [0 ] 0 +MO Memory_Data [0 ] 0 +MO Memory_Ack [0 ] 0 +MO DMA_READ [0 ] 0 +MO DMA_WRITE [0 ] 0 + +MM GETX [0 ] 0 +MM GETS [0 ] 0 +MM PUTX [0 ] 0 +MM PUTO [0 ] 0 +MM PUTO_SHARERS [0 ] 0 +MM Exclusive_Unblock [795 ] 795 +MM Memory_Data [796 ] 796 +MM Memory_Ack [1 ] 1 +MM DMA_READ [0 ] 0 +MM DMA_WRITE [0 ] 0 + + +MI GETX [11 ] 11 +MI GETS [0 ] 0 +MI PUTX [0 ] 0 +MI PUTO [0 ] 0 +MI PUTO_SHARERS [0 ] 0 +MI Unblock [0 ] 0 +MI Clean_Writeback [79 ] 79 +MI Dirty_Writeback [794 ] 794 +MI Memory_Data [0 ] 0 +MI Memory_Ack [0 ] 0 +MI DMA_READ [0 ] 0 +MI DMA_WRITE [0 ] 0 + +MIS GETX [0 ] 0 +MIS GETS [0 ] 0 +MIS PUTX [0 ] 0 +MIS PUTO [0 ] 0 +MIS PUTO_SHARERS [0 ] 0 +MIS Unblock [0 ] 0 +MIS Clean_Writeback [0 ] 0 +MIS Dirty_Writeback [0 ] 0 +MIS Memory_Data [0 ] 0 +MIS Memory_Ack [0 ] 0 +MIS DMA_READ [0 ] 0 +MIS DMA_WRITE [0 ] 0 + +OS GETX [0 ] 0 +OS GETS [0 ] 0 +OS PUTX [0 ] 0 +OS PUTO [0 ] 0 +OS PUTO_SHARERS [0 ] 0 +OS Unblock [0 ] 0 +OS Clean_Writeback [0 ] 0 +OS Dirty_Writeback [0 ] 0 +OS Memory_Data [0 ] 0 +OS Memory_Ack [0 ] 0 +OS DMA_READ [0 ] 0 +OS DMA_WRITE [0 ] 0 + +OSS GETX [0 ] 0 +OSS GETS [0 ] 0 +OSS PUTX [0 ] 0 +OSS PUTO [0 ] 0 +OSS PUTO_SHARERS [0 ] 0 +OSS Unblock [0 ] 0 +OSS Clean_Writeback [0 ] 0 +OSS Dirty_Writeback [0 ] 0 +OSS Memory_Data [0 ] 0 +OSS Memory_Ack [0 ] 0 +OSS DMA_READ [0 ] 0 +OSS DMA_WRITE [0 ] 0 + +XI_M GETX [0 ] 0 +XI_M GETS [0 ] 0 +XI_M PUTX [0 ] 0 +XI_M PUTO [0 ] 0 +XI_M PUTO_SHARERS [0 ] 0 +XI_M Memory_Data [0 ] 0 +XI_M Memory_Ack [0 ] 0 +XI_M DMA_READ [0 ] 0 +XI_M DMA_WRITE [0 ] 0 + +XI_U GETX [0 ] 0 +XI_U GETS [0 ] 0 +XI_U PUTX [0 ] 0 +XI_U PUTO [0 ] 0 +XI_U PUTO_SHARERS [0 ] 0 +XI_U Exclusive_Unblock [0 ] 0 +XI_U Memory_Ack [0 ] 0 +XI_U DMA_READ [0 ] 0 +XI_U DMA_WRITE [0 ] 0 + +OI_D GETX [0 ] 0 +OI_D GETS [0 ] 0 +OI_D PUTX [0 ] 0 +OI_D PUTO [0 ] 0 +OI_D PUTO_SHARERS [0 ] 0 +OI_D DMA_READ [0 ] 0 +OI_D DMA_WRITE [0 ] 0 +OI_D Data
\ No newline at end of file diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout index 69ff17e18..f20a07162 100755 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 18 2010 14:39:50 -M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates -M5 started Mar 18 2010 14:40:19 -M5 executing on cabr0210 +M5 compiled Aug 5 2010 10:34:54 +M5 revision 1cd2a169499f+ 7535+ default brad/hammer_merge_gets qtip tip +M5 started Aug 5 2010 10:40:24 +M5 executing on svvint09 command line: build/ALPHA_SE_MOESI_CMP_directory/m5.fast -d build/ALPHA_SE_MOESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_SE_MOESI_CMP_directory/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 382981 because Ruby Tester completed +Exiting @ tick 372291 because Ruby Tester completed diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt index 020367bbd..c117a9137 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt @@ -1,10 +1,10 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 208684 # Number of bytes of host memory used -host_seconds 6.96 # Real time elapsed on the host -host_tick_rate 55013 # Simulator tick rate (ticks/s) +host_mem_usage 210064 # Number of bytes of host memory used +host_seconds 0.80 # Real time elapsed on the host +host_tick_rate 465329 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.000383 # Number of seconds simulated -sim_ticks 382981 # Number of ticks simulated +sim_seconds 0.000372 # Number of seconds simulated +sim_ticks 372291 # Number of ticks simulated ---------- End Simulation Statistics ---------- diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini index 6a6ab7a0f..e21f56989 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini @@ -5,10 +5,125 @@ dummy=0 [system] type=System -children=physmem ruby +children=dir_cntrl0 l1_cntrl0 l2_cntrl0 physmem ruby mem_mode=timing physmem=system.physmem +[system.dir_cntrl0] +type=Directory_Controller +children=directory memBuffer +buffer_size=0 +directory=system.dir_cntrl0.directory +directory_latency=5 +distributed_persistent=true +fixed_timeout_latency=100 +l2_select_num_bits=0 +memBuffer=system.dir_cntrl0.memBuffer +number_of_TBEs=256 +recycle_latency=10 +transitions_per_cycle=32 +version=0 + +[system.dir_cntrl0.directory] +type=RubyDirectoryMemory +map_levels=4 +numa_high_bit=6 +size=134217728 +use_map=false +version=0 + +[system.dir_cntrl0.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.l1_cntrl0] +type=L1Cache_Controller +children=sequencer +L1DcacheMemory=system.l1_cntrl0.sequencer.dcache +L1IcacheMemory=system.l1_cntrl0.sequencer.icache +N_tokens=2 +buffer_size=0 +dynamic_timeout_enabled=true +fixed_timeout_latency=300 +l1_request_latency=2 +l1_response_latency=2 +l2_select_num_bits=0 +no_mig_atomic=true +number_of_TBEs=256 +recycle_latency=10 +retry_threshold=1 +sequencer=system.l1_cntrl0.sequencer +transitions_per_cycle=32 +version=0 + +[system.l1_cntrl0.sequencer] +type=RubySequencer +children=dcache icache +dcache=system.l1_cntrl0.sequencer.dcache +deadlock_threshold=500000 +icache=system.l1_cntrl0.sequencer.icache +max_outstanding_requests=16 +physmem=system.physmem +using_ruby_tester=true +version=0 +physMemPort=system.physmem.port[0] +port=root.cpuPort[0] + +[system.l1_cntrl0.sequencer.dcache] +type=RubyCache +assoc=2 +latency=2 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l1_cntrl0.sequencer.icache] +type=RubyCache +assoc=2 +latency=2 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l2_cntrl0] +type=L2Cache_Controller +children=L2cacheMemory +L2cacheMemory=system.l2_cntrl0.L2cacheMemory +N_tokens=2 +buffer_size=0 +filtering_enabled=true +l2_request_latency=5 +l2_response_latency=5 +number_of_TBEs=256 +recycle_latency=10 +transitions_per_cycle=32 +version=0 + +[system.l2_cntrl0.L2cacheMemory] +type=RubyCache +assoc=2 +latency=10 +replacement_policy=PSEUDO_LRU +size=512 +start_index_bit=0 + [system.physmem] type=PhysicalMemory file= @@ -17,7 +132,7 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort +port=system.l1_cntrl0.sequencer.physMemPort [system.ruby] type=RubySystem @@ -58,147 +173,34 @@ type=Topology children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2 +name=Crossbar num_int_nodes=4 print_config=false [system.ruby.network.topology.ext_links0] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links0.ext_node +ext_node=system.l1_cntrl0 int_node=0 latency=1 weight=1 -[system.ruby.network.topology.ext_links0.ext_node] -type=L1Cache_Controller -children=sequencer -L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -N_tokens=2 -buffer_size=0 -dynamic_timeout_enabled=true -fixed_timeout_latency=300 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -retry_threshold=1 -sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer] -type=RubySequencer -children=dcache icache -dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -deadlock_threshold=500000 -icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -max_outstanding_requests=16 -physmem=system.physmem -using_ruby_tester=true -version=0 -physMemPort=system.physmem.port[0] -port=root.cpuPort[0] - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - [system.ruby.network.topology.ext_links1] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links1.ext_node +ext_node=system.l2_cntrl0 int_node=1 latency=1 weight=1 -[system.ruby.network.topology.ext_links1.ext_node] -type=L2Cache_Controller -children=L2cacheMemory -L2cacheMemory=system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory -N_tokens=2 -buffer_size=0 -filtering_enabled=true -l2_request_latency=10 -l2_response_latency=10 -number_of_TBEs=256 -recycle_latency=10 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory] -type=RubyCache -assoc=2 -latency=15 -replacement_policy=PSEUDO_LRU -size=512 - [system.ruby.network.topology.ext_links2] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links2.ext_node +ext_node=system.dir_cntrl0 int_node=2 latency=1 weight=1 -[system.ruby.network.topology.ext_links2.ext_node] -type=Directory_Controller -children=directory memBuffer -buffer_size=0 -directory=system.ruby.network.topology.ext_links2.ext_node.directory -directory_latency=6 -distributed_persistent=true -fixed_timeout_latency=300 -l2_select_num_bits=0 -memBuffer=system.ruby.network.topology.ext_links2.ext_node.memBuffer -number_of_TBEs=256 -recycle_latency=10 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links2.ext_node.directory] -type=RubyDirectoryMemory -map_levels=4 -numa_high_bit=0 -size=134217728 -use_map=false -version=0 - -[system.ruby.network.topology.ext_links2.ext_node.memBuffer] -type=RubyMemoryControl -bank_bit_0=8 -bank_busy_time=11 -bank_queue_size=12 -banks_per_rank=8 -basic_bus_busy_time=2 -dimm_bit_0=12 -dimms_per_channel=2 -mem_bus_cycle_multiplier=10 -mem_ctl_latency=12 -mem_fixed_delay=0 -mem_random_arbitrate=0 -rank_bit_0=11 -rank_rank_delay=1 -ranks_per_dimm=2 -read_write_delay=2 -refresh_period=1560 -tFaw=0 -version=0 - [system.ruby.network.topology.int_links0] type=IntLink bw_multiplier=16 diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats index d3e42a722..10b36c0bf 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats @@ -13,7 +13,7 @@ RubySystem config: Network Configuration --------------------- network: SIMPLE_NETWORK -topology: +topology: Crossbar virtual_net_0: active, ordered virtual_net_1: active, unordered @@ -34,7 +34,7 @@ periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ -Real time: Mar/18/2010 14:58:52 +Real time: Aug/05/2010 10:45:27 Profiler Stats -------------- @@ -43,20 +43,20 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.69 -Virtual_time_in_minutes: 0.0115 -Virtual_time_in_hours: 0.000191667 -Virtual_time_in_days: 7.98611e-06 +Virtual_time_in_seconds: 0.75 +Virtual_time_in_minutes: 0.0125 +Virtual_time_in_hours: 0.000208333 +Virtual_time_in_days: 8.68056e-06 -Ruby_current_time: 275491 +Ruby_current_time: 273851 Ruby_start_time: 0 -Ruby_cycles: 275491 +Ruby_cycles: 273851 -mbytes_resident: 30.7305 -mbytes_total: 203.652 -resident_ratio: 0.150935 +mbytes_resident: 31.5859 +mbytes_total: 31.5938 +resident_ratio: 1 -ruby_cycles_executed: [ 275492 ] +ruby_cycles_executed: [ 273852 ] Busy Controller Counts: L1Cache-0:0 @@ -66,13 +66,36 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 981 average: 15.8389 | standard deviation: 1.13074 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 39 928 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1015 average: 15.8108 | standard deviation: 1.12266 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 2 71 929 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 128 max: 24779 count: 966 average: 4458.37 | standard deviation: 6768.43 | 97 8 26 62 82 65 44 31 43 37 32 21 22 21 13 17 18 13 11 4 12 15 6 1 6 11 3 4 7 3 4 1 4 5 3 4 3 2 2 3 1 2 0 0 1 1 0 0 0 0 2 0 1 0 1 0 2 1 0 0 0 0 2 2 0 0 1 0 0 0 0 0 0 1 0 2 0 2 1 0 1 1 2 2 1 1 0 1 1 1 1 3 0 0 1 2 0 1 0 0 2 1 0 0 0 1 2 1 0 1 0 2 3 1 0 1 2 0 1 1 7 1 0 4 3 0 3 3 5 2 1 2 0 3 1 2 3 1 0 5 3 1 4 2 4 1 2 3 0 2 3 1 1 1 2 6 0 0 2 0 4 3 1 2 3 1 3 2 2 2 2 3 1 5 0 2 0 0 1 0 2 1 0 3 2 1 1 1 2 0 2 0 2 1 0 0 0 0 0 0 ] -miss_latency_2: [binsize: 128 max: 22427 count: 100 average: 4703.38 | standard deviation: 6898.45 | 12 2 2 7 12 6 4 3 6 3 1 1 1 3 1 2 2 0 1 0 1 2 0 0 2 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 2 0 0 2 2 0 1 0 1 1 0 0 0 1 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 ] -miss_latency_3: [binsize: 128 max: 24779 count: 866 average: 4430.08 | standard deviation: 6756.74 | 85 6 24 55 70 59 40 28 37 34 31 20 21 18 12 15 16 13 10 4 11 13 6 1 4 11 3 4 7 3 4 1 3 5 3 3 3 1 2 3 1 2 0 0 1 1 0 0 0 0 2 0 1 0 1 0 2 1 0 0 0 0 2 2 0 0 1 0 0 0 0 0 0 1 0 2 0 2 1 0 1 1 2 1 1 1 0 1 1 1 1 3 0 0 1 1 0 1 0 0 1 1 0 0 0 1 2 1 0 1 0 2 2 1 0 1 2 0 1 1 5 1 0 2 1 0 2 3 4 1 1 2 0 2 1 1 3 1 0 5 3 1 4 1 3 1 2 3 0 1 3 1 1 1 1 5 0 0 2 0 4 3 0 2 3 1 3 2 1 2 2 3 1 5 0 1 0 0 1 0 2 1 0 3 2 1 1 1 2 0 2 0 2 1 0 0 0 0 0 0 ] +miss_latency: [binsize: 256 max: 25954 count: 1000 average: 4306.83 | standard deviation: 6237.5 | 90 103 157 85 75 57 42 27 20 32 16 10 14 7 9 7 5 3 3 5 3 8 7 2 2 4 3 2 3 2 2 0 2 1 1 3 3 1 0 3 1 5 2 3 0 1 3 3 2 1 0 1 7 2 4 2 6 3 7 9 5 8 5 9 8 8 4 6 2 0 7 4 10 7 3 3 0 1 6 2 1 1 1 2 0 1 2 1 1 0 1 2 1 1 0 1 1 0 0 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 8 max: 1385 count: 59 average: 543.102 | standard deviation: 246.871 | 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 3 0 0 0 0 0 0 1 1 2 0 1 0 6 3 1 0 0 0 0 0 1 1 2 1 1 3 2 0 0 0 0 0 1 1 0 0 1 0 1 2 3 1 0 0 0 0 0 1 0 0 0 1 0 2 1 1 0 0 0 0 0 0 0 1 0 0 0 2 0 0 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 128 max: 21253 count: 41 average: 5185.15 | standard deviation: 6664.34 | 3 0 2 1 2 3 5 1 0 0 2 2 2 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_ST: [binsize: 256 max: 25954 count: 900 average: 4513.56 | standard deviation: 6344.01 | 83 72 134 72 74 52 40 25 20 31 16 10 14 6 9 6 5 3 2 5 2 8 7 2 2 4 3 2 3 2 2 0 2 1 1 3 2 1 0 3 1 4 2 3 0 1 3 3 2 0 0 1 7 2 4 2 6 3 6 8 5 7 4 9 8 7 4 6 2 0 7 4 9 7 3 2 0 1 6 2 1 1 1 1 0 1 2 1 1 0 1 2 1 1 0 1 1 0 0 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_L1Cache: [binsize: 1 max: 115 count: 78 average: 10.8205 | standard deviation: 28.5871 | 0 16 15 20 21 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 2 1 ] +miss_latency_L2Cache: [binsize: 8 max: 1002 count: 20 average: 461.5 | standard deviation: 273.391 | 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 2 1 1 0 0 0 0 0 0 0 0 0 0 0 2 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_Directory: [binsize: 256 max: 25954 count: 902 average: 4763.59 | standard deviation: 6403.26 | 6 96 154 81 75 57 42 27 20 32 16 10 14 7 9 7 5 3 3 5 3 8 7 2 2 4 3 2 3 2 2 0 2 1 1 3 3 1 0 3 1 5 2 3 0 1 3 3 2 1 0 1 7 2 4 2 6 3 7 9 5 8 5 9 8 8 4 6 2 0 7 4 10 7 3 3 0 1 6 2 1 1 1 2 0 1 2 1 1 0 1 2 1 1 0 1 1 0 0 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_wCC_Times: 0 +miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_dir_Times: 902 +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 4 count: 1 average: 4 | standard deviation: 0 | 0 0 0 0 1 ] +miss_latency_IFETCH_L2Cache: [binsize: 4 max: 568 count: 7 average: 329.571 | standard deviation: 182.864 | 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH_Directory: [binsize: 8 max: 1385 count: 51 average: 582.98 | standard deviation: 229.926 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 3 0 0 0 0 0 0 0 0 1 0 1 0 6 3 1 0 0 0 0 0 0 1 2 1 1 3 2 0 0 0 0 0 1 0 0 0 1 0 1 2 3 1 0 0 0 0 0 1 0 0 0 1 0 2 1 1 0 0 0 0 0 0 0 1 0 0 0 2 0 0 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 3 average: 2.33333 | standard deviation: 1.22474 | 0 1 0 2 ] +miss_latency_LD_L2Cache: [binsize: 8 max: 843 count: 2 average: 551.5 | standard deviation: 412.244 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD_Directory: [binsize: 128 max: 21253 count: 36 average: 5874.47 | standard deviation: 6836.32 | 0 0 1 1 2 3 4 1 0 0 2 2 2 0 1 1 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_ST_L1Cache: [binsize: 1 max: 115 count: 74 average: 11.2568 | standard deviation: 29.2947 | 0 15 15 18 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 2 1 ] +miss_latency_ST_L2Cache: [binsize: 8 max: 1002 count: 11 average: 529.091 | standard deviation: 293.469 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 256 max: 25954 count: 815 average: 4976.13 | standard deviation: 6494.33 | 5 70 132 69 74 52 40 25 20 31 16 10 14 6 9 6 5 3 2 5 2 8 7 2 2 4 3 2 3 2 2 0 2 1 1 3 2 1 0 3 1 4 2 3 0 1 3 3 2 0 0 1 7 2 4 2 6 3 6 8 5 7 4 9 8 7 4 6 2 0 7 4 9 7 3 2 0 1 6 2 1 1 1 1 0 1 2 1 1 0 1 2 1 1 0 1 1 0 0 1 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -104,8 +127,8 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 8875 -page_faults: 0 +page_reclaims: 7004 +page_faults: 1904 swaps: 0 block_inputs: 0 block_outputs: 0 @@ -113,792 +136,918 @@ block_outputs: 0 Network Stats ------------- +total_msg_count_Request_Control: 5485 43880 +total_msg_count_Response_Data: 2871 206712 +total_msg_count_ResponseL2hit_Data: 51 3672 +total_msg_count_Response_Control: 9 72 +total_msg_count_Writeback_Data: 5349 385128 +total_msg_count_Writeback_Control: 246 1968 +total_msg_count_Persistent_Control: 2292 18336 +total_msgs: 16303 total_bytes: 659768 + switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 0.110194 - links_utilized_percent_switch_0_link_0: 0.0410177 bw: 640000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 0.179371 bw: 160000 base_latency: 1 - - outgoing_messages_switch_0_link_0_Response_Data: 873 62856 [ 0 0 0 0 873 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 27 1944 [ 0 0 0 0 27 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Data: 66 4752 [ 0 0 0 0 66 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Persistent_Control: 346 2768 [ 0 0 0 346 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Request_Control: 870 6960 [ 0 870 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Response_Data: 31 2232 [ 0 0 0 0 31 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 932 67104 [ 0 0 0 0 932 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Persistent_Control: 346 2768 [ 0 0 0 346 0 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_0: 0.115928 + links_utilized_percent_switch_0_link_0: 0.0432124 bw: 640000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 0.188643 bw: 160000 base_latency: 1 + + outgoing_messages_switch_0_link_0_Response_Data: 931 67032 [ 0 0 0 0 931 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 17 1224 [ 0 0 0 0 17 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Control: 3 24 [ 0 0 0 0 3 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Data: 61 4392 [ 0 0 0 0 61 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Persistent_Control: 382 3056 [ 0 0 0 382 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Request_Control: 923 7384 [ 0 923 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Response_Data: 26 1872 [ 0 0 0 0 26 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 977 70344 [ 0 0 0 0 977 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Persistent_Control: 382 3056 [ 0 0 0 382 0 0 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 0.092866 - links_utilized_percent_switch_1_link_0: 0.0408816 bw: 640000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 0.14485 bw: 160000 base_latency: 1 - - outgoing_messages_switch_1_link_0_Request_Control: 870 6960 [ 0 870 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Data: 866 62352 [ 0 0 0 0 866 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Persistent_Control: 346 2768 [ 0 0 0 346 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Request_Control: 844 6752 [ 0 0 844 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 28 2016 [ 0 0 0 0 28 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 27 1944 [ 0 0 0 0 27 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Data: 729 52488 [ 0 0 0 0 729 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_1: 0.0997532 + links_utilized_percent_switch_1_link_0: 0.0435821 bw: 640000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 0.155924 bw: 160000 base_latency: 1 + + outgoing_messages_switch_1_link_0_Request_Control: 922 7376 [ 0 922 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Persistent_Control: 382 3056 [ 0 0 0 382 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Request_Control: 906 7248 [ 0 0 906 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 26 1872 [ 0 0 0 0 26 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 17 1224 [ 0 0 0 0 17 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Control: 2 16 [ 0 0 0 0 2 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Data: 796 57312 [ 0 0 0 0 796 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_1_link_1_Writeback_Control: 81 648 [ 0 0 0 0 81 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 0.0881086 - links_utilized_percent_switch_2_link_0: 0.0370475 bw: 640000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 0.13917 bw: 160000 base_latency: 1 +links_utilized_percent_switch_2: 0.09541 + links_utilized_percent_switch_2_link_0: 0.040428 bw: 640000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 0.150392 bw: 160000 base_latency: 1 - outgoing_messages_switch_2_link_0_Request_Control: 844 6752 [ 0 0 844 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Data: 31 2232 [ 0 0 0 0 31 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Data: 735 52920 [ 0 0 0 0 735 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Request_Control: 906 7248 [ 0 0 906 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Data: 26 1872 [ 0 0 0 0 26 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Data: 806 58032 [ 0 0 0 0 806 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_0_Writeback_Control: 81 648 [ 0 0 0 0 81 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Persistent_Control: 346 2768 [ 0 0 0 346 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Data: 845 60840 [ 0 0 0 0 845 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Data: 7 504 [ 0 0 0 0 7 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Persistent_Control: 382 3056 [ 0 0 0 382 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Data: 905 65160 [ 0 0 0 0 905 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Data: 10 720 [ 0 0 0 0 10 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 switch_3_inlinks: 3 switch_3_outlinks: 3 -links_utilized_percent_switch_3: 0.156502 - links_utilized_percent_switch_3_link_0: 0.157791 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 0.163526 bw: 160000 base_latency: 1 - links_utilized_percent_switch_3_link_2: 0.14819 bw: 160000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Response_Data: 873 62856 [ 0 0 0 0 873 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 27 1944 [ 0 0 0 0 27 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Writeback_Data: 66 4752 [ 0 0 0 0 66 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Request_Control: 870 6960 [ 0 870 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Data: 866 62352 [ 0 0 0 0 866 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Persistent_Control: 346 2768 [ 0 0 0 346 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Request_Control: 844 6752 [ 0 0 844 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Response_Data: 31 2232 [ 0 0 0 0 31 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Writeback_Data: 735 52920 [ 0 0 0 0 735 0 0 0 0 0 ] base_latency: 1 +links_utilized_percent_switch_3: 0.167305 + links_utilized_percent_switch_3_link_0: 0.165875 bw: 160000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 0.174328 bw: 160000 base_latency: 1 + links_utilized_percent_switch_3_link_2: 0.161712 bw: 160000 base_latency: 1 + + outgoing_messages_switch_3_link_0_Response_Data: 931 67032 [ 0 0 0 0 931 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 17 1224 [ 0 0 0 0 17 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Control: 3 24 [ 0 0 0 0 3 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Writeback_Data: 61 4392 [ 0 0 0 0 61 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Writeback_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Request_Control: 922 7376 [ 0 922 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Writeback_Data: 916 65952 [ 0 0 0 0 916 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Persistent_Control: 382 3056 [ 0 0 0 382 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Request_Control: 906 7248 [ 0 0 906 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Response_Data: 26 1872 [ 0 0 0 0 26 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Writeback_Data: 806 58032 [ 0 0 0 0 806 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_3_link_2_Writeback_Control: 81 648 [ 0 0 0 0 81 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_2_Persistent_Control: 346 2768 [ 0 0 0 346 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_2_Persistent_Control: 382 3056 [ 0 0 0 382 0 0 0 0 0 0 ] base_latency: 1 + +Cache Stats: system.l1_cntrl0.sequencer.icache + system.l1_cntrl0.sequencer.icache_total_misses: 58 + system.l1_cntrl0.sequencer.icache_total_demand_misses: 58 + system.l1_cntrl0.sequencer.icache_total_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_hw_prefetches: 0 -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0 + system.l1_cntrl0.sequencer.icache_request_type_IFETCH: 100% - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + system.l1_cntrl0.sequencer.icache_access_mode_type_SupervisorMode: 58 100% -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_hw_prefetches: 0 +Cache Stats: system.l1_cntrl0.sequencer.dcache + system.l1_cntrl0.sequencer.dcache_total_misses: 865 + system.l1_cntrl0.sequencer.dcache_total_demand_misses: 865 + system.l1_cntrl0.sequencer.dcache_total_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_hw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + system.l1_cntrl0.sequencer.dcache_request_type_LD: 4.39306% + system.l1_cntrl0.sequencer.dcache_request_type_ST: 95.6069% - --- L1Cache 0 --- + system.l1_cntrl0.sequencer.dcache_access_mode_type_SupervisorMode: 865 100% + + --- L1Cache --- - Event Counts - -Load 100 -Ifetch 0 -Store 867 -L1_Replacement 395000 -Data_Shared 1 -Data_Owner 0 -Data_All_Tokens 965 -Ack 0 -Ack_All_Tokens 0 -Transient_GETX 0 -Transient_Local_GETX 0 -Transient_GETS 0 -Transient_Local_GETS 0 -Transient_GETS_Last_Token 0 -Transient_Local_GETS_Last_Token 0 -Persistent_GETX 0 -Persistent_GETS 0 -Own_Lock_or_Unlock 346 -Request_Timeout 545 -Use_TimeoutStarverX 0 -Use_TimeoutStarverS 0 -Use_TimeoutNoStarvers 867 +Load [41 ] 41 +Ifetch [59 ] 59 +Store [901 ] 901 +Atomic [0 ] 0 +L1_Replacement [388292 ] 388292 +Data_Shared [9 ] 9 +Data_Owner [2 ] 2 +Data_All_Tokens [998 ] 998 +Ack [2 ] 2 +Ack_All_Tokens [2 ] 2 +Transient_GETX [0 ] 0 +Transient_Local_GETX [0 ] 0 +Transient_GETS [0 ] 0 +Transient_Local_GETS [0 ] 0 +Transient_GETS_Last_Token [0 ] 0 +Transient_Local_GETS_Last_Token [0 ] 0 +Persistent_GETX [0 ] 0 +Persistent_GETS [0 ] 0 +Persistent_GETS_Last_Token [0 ] 0 +Own_Lock_or_Unlock [382 ] 382 +Request_Timeout [674 ] 674 +Use_TimeoutStarverX [0 ] 0 +Use_TimeoutStarverS [0 ] 0 +Use_TimeoutNoStarvers [912 ] 912 +Use_TimeoutNoStarvers_NoMig [0 ] 0 - Transitions - -NP Load 88 -NP Ifetch 0 <-- -NP Store 781 -NP Data_Shared 0 <-- -NP Data_Owner 0 <-- -NP Data_All_Tokens 97 -NP Ack 0 <-- -NP Transient_GETX 0 <-- -NP Transient_Local_GETX 0 <-- -NP Transient_GETS 0 <-- -NP Transient_Local_GETS 0 <-- -NP Persistent_GETX 0 <-- -NP Persistent_GETS 0 <-- -NP Own_Lock_or_Unlock 171 - -I Load 0 <-- -I Ifetch 0 <-- -I Store 0 <-- -I L1_Replacement 0 <-- -I Data_Shared 0 <-- -I Data_Owner 0 <-- -I Data_All_Tokens 0 <-- -I Ack 0 <-- -I Transient_GETX 0 <-- -I Transient_Local_GETX 0 <-- -I Transient_GETS 0 <-- -I Transient_Local_GETS 0 <-- -I Transient_GETS_Last_Token 0 <-- -I Transient_Local_GETS_Last_Token 0 <-- -I Persistent_GETX 0 <-- -I Persistent_GETS 0 <-- -I Own_Lock_or_Unlock 0 <-- - -S Load 0 <-- -S Ifetch 0 <-- -S Store 1 -S L1_Replacement 0 <-- -S Data_Shared 0 <-- -S Data_Owner 0 <-- -S Data_All_Tokens 0 <-- -S Ack 0 <-- -S Transient_GETX 0 <-- -S Transient_Local_GETX 0 <-- -S Transient_GETS 0 <-- -S Transient_Local_GETS 0 <-- -S Transient_GETS_Last_Token 0 <-- -S Transient_Local_GETS_Last_Token 0 <-- -S Persistent_GETX 0 <-- -S Persistent_GETS 0 <-- -S Own_Lock_or_Unlock 0 <-- - -O Load 0 <-- -O Ifetch 0 <-- -O Store 0 <-- -O L1_Replacement 0 <-- -O Data_Shared 0 <-- -O Data_All_Tokens 0 <-- -O Ack 0 <-- -O Ack_All_Tokens 0 <-- -O Transient_GETX 0 <-- -O Transient_Local_GETX 0 <-- -O Transient_GETS 0 <-- -O Transient_Local_GETS 0 <-- -O Transient_GETS_Last_Token 0 <-- -O Transient_Local_GETS_Last_Token 0 <-- -O Persistent_GETX 0 <-- -O Persistent_GETS 0 <-- -O Own_Lock_or_Unlock 0 <-- - -M Load 0 <-- -M Ifetch 0 <-- -M Store 0 <-- -M L1_Replacement 86 -M Transient_GETX 0 <-- -M Transient_Local_GETX 0 <-- -M Transient_GETS 0 <-- -M Transient_Local_GETS 0 <-- -M Persistent_GETX 0 <-- -M Persistent_GETS 0 <-- -M Own_Lock_or_Unlock 2 - -MM Load 12 -MM Ifetch 0 <-- -MM Store 74 -MM L1_Replacement 780 -MM Transient_GETX 0 <-- -MM Transient_Local_GETX 0 <-- -MM Transient_GETS 0 <-- -MM Transient_Local_GETS 0 <-- -MM Persistent_GETX 0 <-- -MM Persistent_GETS 0 <-- -MM Own_Lock_or_Unlock 17 - -M_W Load 0 <-- -M_W Ifetch 0 <-- -M_W Store 0 <-- -M_W L1_Replacement 2958 -M_W Transient_GETX 0 <-- -M_W Transient_Local_GETX 0 <-- -M_W Transient_GETS 0 <-- -M_W Transient_Local_GETS 0 <-- -M_W Persistent_GETX 0 <-- -M_W Persistent_GETS 0 <-- -M_W Own_Lock_or_Unlock 2 -M_W Use_TimeoutStarverX 0 <-- -M_W Use_TimeoutStarverS 0 <-- -M_W Use_TimeoutNoStarvers 86 - -MM_W Load 0 <-- -MM_W Ifetch 0 <-- -MM_W Store 11 -MM_W L1_Replacement 29196 -MM_W Transient_GETX 0 <-- -MM_W Transient_Local_GETX 0 <-- -MM_W Transient_GETS 0 <-- -MM_W Transient_Local_GETS 0 <-- -MM_W Persistent_GETX 0 <-- -MM_W Persistent_GETS 0 <-- -MM_W Own_Lock_or_Unlock 33 -MM_W Use_TimeoutStarverX 0 <-- -MM_W Use_TimeoutStarverS 0 <-- -MM_W Use_TimeoutNoStarvers 781 - -IM Load 0 <-- -IM Ifetch 0 <-- -IM Store 0 <-- -IM L1_Replacement 329936 -IM Data_Shared 0 <-- -IM Data_Owner 0 <-- -IM Data_All_Tokens 780 -IM Ack 0 <-- -IM Transient_GETX 0 <-- -IM Transient_Local_GETX 0 <-- -IM Transient_GETS 0 <-- -IM Transient_Local_GETS 0 <-- -IM Transient_GETS_Last_Token 0 <-- -IM Transient_Local_GETS_Last_Token 0 <-- -IM Persistent_GETX 0 <-- -IM Persistent_GETS 0 <-- -IM Own_Lock_or_Unlock 112 -IM Request_Timeout 465 - -SM Load 0 <-- -SM Ifetch 0 <-- -SM Store 0 <-- -SM L1_Replacement 0 <-- -SM Data_Shared 0 <-- -SM Data_Owner 0 <-- -SM Data_All_Tokens 1 -SM Ack 0 <-- -SM Transient_GETX 0 <-- -SM Transient_Local_GETX 0 <-- -SM Transient_GETS 0 <-- -SM Transient_Local_GETS 0 <-- -SM Transient_GETS_Last_Token 0 <-- -SM Transient_Local_GETS_Last_Token 0 <-- -SM Persistent_GETX 0 <-- -SM Persistent_GETS 0 <-- -SM Own_Lock_or_Unlock 0 <-- -SM Request_Timeout 0 <-- - -OM Load 0 <-- -OM Ifetch 0 <-- -OM Store 0 <-- -OM L1_Replacement 0 <-- -OM Data_Shared 0 <-- -OM Data_All_Tokens 0 <-- -OM Ack 0 <-- -OM Ack_All_Tokens 0 <-- -OM Transient_GETX 0 <-- -OM Transient_Local_GETX 0 <-- -OM Transient_GETS 0 <-- -OM Transient_Local_GETS 0 <-- -OM Transient_GETS_Last_Token 0 <-- -OM Transient_Local_GETS_Last_Token 0 <-- -OM Persistent_GETX 0 <-- -OM Persistent_GETS 0 <-- -OM Own_Lock_or_Unlock 0 <-- -OM Request_Timeout 0 <-- - -IS Load 0 <-- -IS Ifetch 0 <-- -IS Store 0 <-- -IS L1_Replacement 32044 -IS Data_Shared 1 -IS Data_Owner 0 <-- -IS Data_All_Tokens 87 -IS Ack 0 <-- -IS Transient_GETX 0 <-- -IS Transient_Local_GETX 0 <-- -IS Transient_GETS 0 <-- -IS Transient_Local_GETS 0 <-- -IS Transient_GETS_Last_Token 0 <-- -IS Transient_Local_GETS_Last_Token 0 <-- -IS Persistent_GETX 0 <-- -IS Persistent_GETS 0 <-- -IS Own_Lock_or_Unlock 9 -IS Request_Timeout 80 - -I_L Load 0 <-- -I_L Ifetch 0 <-- -I_L Store 0 <-- -I_L L1_Replacement 0 <-- -I_L Data_Shared 0 <-- -I_L Data_Owner 0 <-- -I_L Data_All_Tokens 0 <-- -I_L Ack 0 <-- -I_L Transient_GETX 0 <-- -I_L Transient_Local_GETX 0 <-- -I_L Transient_GETS 0 <-- -I_L Transient_Local_GETS 0 <-- -I_L Transient_GETS_Last_Token 0 <-- -I_L Transient_Local_GETS_Last_Token 0 <-- -I_L Persistent_GETX 0 <-- -I_L Persistent_GETS 0 <-- -I_L Own_Lock_or_Unlock 0 <-- - -S_L Load 0 <-- -S_L Ifetch 0 <-- -S_L Store 0 <-- -S_L L1_Replacement 0 <-- -S_L Data_Shared 0 <-- -S_L Data_Owner 0 <-- -S_L Data_All_Tokens 0 <-- -S_L Ack 0 <-- -S_L Transient_GETX 0 <-- -S_L Transient_Local_GETX 0 <-- -S_L Transient_GETS 0 <-- -S_L Transient_Local_GETS 0 <-- -S_L Transient_GETS_Last_Token 0 <-- -S_L Transient_Local_GETS_Last_Token 0 <-- -S_L Persistent_GETX 0 <-- -S_L Persistent_GETS 0 <-- -S_L Own_Lock_or_Unlock 0 <-- - -IM_L Load 0 <-- -IM_L Ifetch 0 <-- -IM_L Store 0 <-- -IM_L L1_Replacement 0 <-- -IM_L Data_Shared 0 <-- -IM_L Data_Owner 0 <-- -IM_L Data_All_Tokens 0 <-- -IM_L Ack 0 <-- -IM_L Transient_GETX 0 <-- -IM_L Transient_Local_GETX 0 <-- -IM_L Transient_GETS 0 <-- -IM_L Transient_Local_GETS 0 <-- -IM_L Transient_GETS_Last_Token 0 <-- -IM_L Transient_Local_GETS_Last_Token 0 <-- -IM_L Persistent_GETX 0 <-- -IM_L Persistent_GETS 0 <-- -IM_L Own_Lock_or_Unlock 0 <-- -IM_L Request_Timeout 0 <-- - -SM_L Load 0 <-- -SM_L Ifetch 0 <-- -SM_L Store 0 <-- -SM_L L1_Replacement 0 <-- -SM_L Data_Shared 0 <-- -SM_L Data_Owner 0 <-- -SM_L Data_All_Tokens 0 <-- -SM_L Ack 0 <-- -SM_L Transient_GETX 0 <-- -SM_L Transient_Local_GETX 0 <-- -SM_L Transient_GETS 0 <-- -SM_L Transient_Local_GETS 0 <-- -SM_L Transient_GETS_Last_Token 0 <-- -SM_L Transient_Local_GETS_Last_Token 0 <-- -SM_L Persistent_GETX 0 <-- -SM_L Persistent_GETS 0 <-- -SM_L Own_Lock_or_Unlock 0 <-- -SM_L Request_Timeout 0 <-- - -IS_L Load 0 <-- -IS_L Ifetch 0 <-- -IS_L Store 0 <-- -IS_L L1_Replacement 0 <-- -IS_L Data_Shared 0 <-- -IS_L Data_Owner 0 <-- -IS_L Data_All_Tokens 0 <-- -IS_L Ack 0 <-- -IS_L Transient_GETX 0 <-- -IS_L Transient_Local_GETX 0 <-- -IS_L Transient_GETS 0 <-- -IS_L Transient_Local_GETS 0 <-- -IS_L Transient_GETS_Last_Token 0 <-- -IS_L Transient_Local_GETS_Last_Token 0 <-- -IS_L Persistent_GETX 0 <-- -IS_L Persistent_GETS 0 <-- -IS_L Own_Lock_or_Unlock 0 <-- -IS_L Request_Timeout 0 <-- - -Cache Stats: system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_misses: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_demand_misses: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_prefetches: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links1.ext_node.L2cacheMemory_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - - --- L2Cache 0 --- +NP Load [38 ] 38 +NP Ifetch [58 ] 58 +NP Store [826 ] 826 +NP Atomic [0 ] 0 +NP Data_Shared [0 ] 0 +NP Data_Owner [0 ] 0 +NP Data_All_Tokens [87 ] 87 +NP Ack [0 ] 0 +NP Transient_GETX [0 ] 0 +NP Transient_Local_GETX [0 ] 0 +NP Transient_GETS [0 ] 0 +NP Transient_Local_GETS [0 ] 0 +NP Persistent_GETX [0 ] 0 +NP Persistent_GETS [0 ] 0 +NP Persistent_GETS_Last_Token [0 ] 0 +NP Own_Lock_or_Unlock [175 ] 175 + +I Load [0 ] 0 +I Ifetch [0 ] 0 +I Store [0 ] 0 +I Atomic [0 ] 0 +I L1_Replacement [0 ] 0 +I Data_Shared [0 ] 0 +I Data_Owner [0 ] 0 +I Data_All_Tokens [0 ] 0 +I Ack [0 ] 0 +I Transient_GETX [0 ] 0 +I Transient_Local_GETX [0 ] 0 +I Transient_GETS [0 ] 0 +I Transient_Local_GETS [0 ] 0 +I Transient_GETS_Last_Token [0 ] 0 +I Transient_Local_GETS_Last_Token [0 ] 0 +I Persistent_GETX [0 ] 0 +I Persistent_GETS [0 ] 0 +I Persistent_GETS_Last_Token [0 ] 0 +I Own_Lock_or_Unlock [0 ] 0 + +S Load [0 ] 0 +S Ifetch [1 ] 1 +S Store [1 ] 1 +S Atomic [0 ] 0 +S L1_Replacement [8 ] 8 +S Data_Shared [0 ] 0 +S Data_Owner [0 ] 0 +S Data_All_Tokens [0 ] 0 +S Ack [0 ] 0 +S Transient_GETX [0 ] 0 +S Transient_Local_GETX [0 ] 0 +S Transient_GETS [0 ] 0 +S Transient_Local_GETS [0 ] 0 +S Transient_GETS_Last_Token [0 ] 0 +S Transient_Local_GETS_Last_Token [0 ] 0 +S Persistent_GETX [0 ] 0 +S Persistent_GETS [0 ] 0 +S Persistent_GETS_Last_Token [0 ] 0 +S Own_Lock_or_Unlock [0 ] 0 + +O Load [0 ] 0 +O Ifetch [0 ] 0 +O Store [0 ] 0 +O Atomic [0 ] 0 +O L1_Replacement [0 ] 0 +O Data_Shared [0 ] 0 +O Data_All_Tokens [0 ] 0 +O Ack [0 ] 0 +O Ack_All_Tokens [0 ] 0 +O Transient_GETX [0 ] 0 +O Transient_Local_GETX [0 ] 0 +O Transient_GETS [0 ] 0 +O Transient_Local_GETS [0 ] 0 +O Transient_GETS_Last_Token [0 ] 0 +O Transient_Local_GETS_Last_Token [0 ] 0 +O Persistent_GETX [0 ] 0 +O Persistent_GETS [0 ] 0 +O Persistent_GETS_Last_Token [0 ] 0 +O Own_Lock_or_Unlock [0 ] 0 + +M Load [0 ] 0 +M Ifetch [0 ] 0 +M Store [0 ] 0 +M Atomic [0 ] 0 +M L1_Replacement [83 ] 83 +M Transient_GETX [0 ] 0 +M Transient_Local_GETX [0 ] 0 +M Transient_GETS [0 ] 0 +M Transient_Local_GETS [0 ] 0 +M Persistent_GETX [0 ] 0 +M Persistent_GETS [0 ] 0 +M Own_Lock_or_Unlock [12 ] 12 + +MM Load [2 ] 2 +MM Ifetch [0 ] 0 +MM Store [64 ] 64 +MM Atomic [0 ] 0 +MM L1_Replacement [826 ] 826 +MM Transient_GETX [0 ] 0 +MM Transient_Local_GETX [0 ] 0 +MM Transient_GETS [0 ] 0 +MM Transient_Local_GETS [0 ] 0 +MM Persistent_GETX [0 ] 0 +MM Persistent_GETS [0 ] 0 +MM Own_Lock_or_Unlock [27 ] 27 + +M_W Load [0 ] 0 +M_W Ifetch [0 ] 0 +M_W Store [1 ] 1 +M_W Atomic [0 ] 0 +M_W L1_Replacement [1338 ] 1338 +M_W Transient_GETX [0 ] 0 +M_W Transient_Local_GETX [0 ] 0 +M_W Transient_GETS [0 ] 0 +M_W Transient_Local_GETS [0 ] 0 +M_W Persistent_GETX [0 ] 0 +M_W Persistent_GETS [0 ] 0 +M_W Own_Lock_or_Unlock [1 ] 1 +M_W Use_TimeoutStarverX [0 ] 0 +M_W Use_TimeoutStarverS [0 ] 0 +M_W Use_TimeoutNoStarvers [85 ] 85 +M_W Use_TimeoutNoStarvers_NoMig [0 ] 0 + +MM_W Load [1 ] 1 +MM_W Ifetch [0 ] 0 +MM_W Store [9 ] 9 +MM_W Atomic [0 ] 0 +MM_W L1_Replacement [30069 ] 30069 +MM_W Transient_GETX [0 ] 0 +MM_W Transient_Local_GETX [0 ] 0 +MM_W Transient_GETS [0 ] 0 +MM_W Transient_Local_GETS [0 ] 0 +MM_W Persistent_GETX [0 ] 0 +MM_W Persistent_GETS [0 ] 0 +MM_W Own_Lock_or_Unlock [26 ] 26 +MM_W Use_TimeoutStarverX [0 ] 0 +MM_W Use_TimeoutStarverS [0 ] 0 +MM_W Use_TimeoutNoStarvers [827 ] 827 +MM_W Use_TimeoutNoStarvers_NoMig [0 ] 0 + +IM Load [0 ] 0 +IM Ifetch [0 ] 0 +IM Store [0 ] 0 +IM Atomic [0 ] 0 +IM L1_Replacement [341249 ] 341249 +IM Data_Shared [0 ] 0 +IM Data_Owner [2 ] 2 +IM Data_All_Tokens [823 ] 823 +IM Ack [2 ] 2 +IM Transient_GETX [0 ] 0 +IM Transient_Local_GETX [0 ] 0 +IM Transient_GETS [0 ] 0 +IM Transient_Local_GETS [0 ] 0 +IM Transient_GETS_Last_Token [0 ] 0 +IM Transient_Local_GETS_Last_Token [0 ] 0 +IM Persistent_GETX [0 ] 0 +IM Persistent_GETS [0 ] 0 +IM Persistent_GETS_Last_Token [0 ] 0 +IM Own_Lock_or_Unlock [124 ] 124 +IM Request_Timeout [608 ] 608 + +SM Load [0 ] 0 +SM Ifetch [0 ] 0 +SM Store [0 ] 0 +SM Atomic [0 ] 0 +SM L1_Replacement [0 ] 0 +SM Data_Shared [0 ] 0 +SM Data_Owner [0 ] 0 +SM Data_All_Tokens [1 ] 1 +SM Ack [0 ] 0 +SM Transient_GETX [0 ] 0 +SM Transient_Local_GETX [0 ] 0 +SM Transient_GETS [0 ] 0 +SM Transient_Local_GETS [0 ] 0 +SM Transient_GETS_Last_Token [0 ] 0 +SM Transient_Local_GETS_Last_Token [0 ] 0 +SM Persistent_GETX [0 ] 0 +SM Persistent_GETS [0 ] 0 +SM Persistent_GETS_Last_Token [0 ] 0 +SM Own_Lock_or_Unlock [0 ] 0 +SM Request_Timeout [0 ] 0 + +OM Load [0 ] 0 +OM Ifetch [0 ] 0 +OM Store [0 ] 0 +OM Atomic [0 ] 0 +OM L1_Replacement [0 ] 0 +OM Data_Shared [0 ] 0 +OM Data_All_Tokens [0 ] 0 +OM Ack [0 ] 0 +OM Ack_All_Tokens [2 ] 2 +OM Transient_GETX [0 ] 0 +OM Transient_Local_GETX [0 ] 0 +OM Transient_GETS [0 ] 0 +OM Transient_Local_GETS [0 ] 0 +OM Transient_GETS_Last_Token [0 ] 0 +OM Transient_Local_GETS_Last_Token [0 ] 0 +OM Persistent_GETX [0 ] 0 +OM Persistent_GETS [0 ] 0 +OM Persistent_GETS_Last_Token [0 ] 0 +OM Own_Lock_or_Unlock [1 ] 1 +OM Request_Timeout [1 ] 1 + +IS Load [0 ] 0 +IS Ifetch [0 ] 0 +IS Store [0 ] 0 +IS Atomic [0 ] 0 +IS L1_Replacement [14719 ] 14719 +IS Data_Shared [9 ] 9 +IS Data_Owner [0 ] 0 +IS Data_All_Tokens [87 ] 87 +IS Ack [0 ] 0 +IS Transient_GETX [0 ] 0 +IS Transient_Local_GETX [0 ] 0 +IS Transient_GETS [0 ] 0 +IS Transient_Local_GETS [0 ] 0 +IS Transient_GETS_Last_Token [0 ] 0 +IS Transient_Local_GETS_Last_Token [0 ] 0 +IS Persistent_GETX [0 ] 0 +IS Persistent_GETS [0 ] 0 +IS Persistent_GETS_Last_Token [0 ] 0 +IS Own_Lock_or_Unlock [16 ] 16 +IS Request_Timeout [65 ] 65 + +I_L Load [0 ] 0 +I_L Ifetch [0 ] 0 +I_L Store [0 ] 0 +I_L Atomic [0 ] 0 +I_L L1_Replacement [0 ] 0 +I_L Data_Shared [0 ] 0 +I_L Data_Owner [0 ] 0 +I_L Data_All_Tokens [0 ] 0 +I_L Ack [0 ] 0 +I_L Transient_GETX [0 ] 0 +I_L Transient_Local_GETX [0 ] 0 +I_L Transient_GETS [0 ] 0 +I_L Transient_Local_GETS [0 ] 0 +I_L Transient_GETS_Last_Token [0 ] 0 +I_L Transient_Local_GETS_Last_Token [0 ] 0 +I_L Persistent_GETX [0 ] 0 +I_L Persistent_GETS [0 ] 0 +I_L Persistent_GETS_Last_Token [0 ] 0 +I_L Own_Lock_or_Unlock [0 ] 0 + +S_L Load [0 ] 0 +S_L Ifetch [0 ] 0 +S_L Store [0 ] 0 +S_L Atomic [0 ] 0 +S_L L1_Replacement [0 ] 0 +S_L Data_Shared [0 ] 0 +S_L Data_Owner [0 ] 0 +S_L Data_All_Tokens [0 ] 0 +S_L Ack [0 ] 0 +S_L Transient_GETX [0 ] 0 +S_L Transient_Local_GETX [0 ] 0 +S_L Transient_GETS [0 ] 0 +S_L Transient_Local_GETS [0 ] 0 +S_L Transient_GETS_Last_Token [0 ] 0 +S_L Transient_Local_GETS_Last_Token [0 ] 0 +S_L Persistent_GETX [0 ] 0 +S_L Persistent_GETS [0 ] 0 +S_L Persistent_GETS_Last_Token [0 ] 0 +S_L Own_Lock_or_Unlock [0 ] 0 + +IM_L Load [0 ] 0 +IM_L Ifetch [0 ] 0 +IM_L Store [0 ] 0 +IM_L Atomic [0 ] 0 +IM_L L1_Replacement [0 ] 0 +IM_L Data_Shared [0 ] 0 +IM_L Data_Owner [0 ] 0 +IM_L Data_All_Tokens [0 ] 0 +IM_L Ack [0 ] 0 +IM_L Transient_GETX [0 ] 0 +IM_L Transient_Local_GETX [0 ] 0 +IM_L Transient_GETS [0 ] 0 +IM_L Transient_Local_GETS [0 ] 0 +IM_L Transient_GETS_Last_Token [0 ] 0 +IM_L Transient_Local_GETS_Last_Token [0 ] 0 +IM_L Persistent_GETX [0 ] 0 +IM_L Persistent_GETS [0 ] 0 +IM_L Own_Lock_or_Unlock [0 ] 0 +IM_L Request_Timeout [0 ] 0 + +SM_L Load [0 ] 0 +SM_L Ifetch [0 ] 0 +SM_L Store [0 ] 0 +SM_L Atomic [0 ] 0 +SM_L L1_Replacement [0 ] 0 +SM_L Data_Shared [0 ] 0 +SM_L Data_Owner [0 ] 0 +SM_L Data_All_Tokens [0 ] 0 +SM_L Ack [0 ] 0 +SM_L Transient_GETX [0 ] 0 +SM_L Transient_Local_GETX [0 ] 0 +SM_L Transient_GETS [0 ] 0 +SM_L Transient_Local_GETS [0 ] 0 +SM_L Transient_GETS_Last_Token [0 ] 0 +SM_L Transient_Local_GETS_Last_Token [0 ] 0 +SM_L Persistent_GETX [0 ] 0 +SM_L Persistent_GETS [0 ] 0 +SM_L Persistent_GETS_Last_Token [0 ] 0 +SM_L Own_Lock_or_Unlock [0 ] 0 +SM_L Request_Timeout [0 ] 0 + +IS_L Load [0 ] 0 +IS_L Ifetch [0 ] 0 +IS_L Store [0 ] 0 +IS_L Atomic [0 ] 0 +IS_L L1_Replacement [0 ] 0 +IS_L Data_Shared [0 ] 0 +IS_L Data_Owner [0 ] 0 +IS_L Data_All_Tokens [0 ] 0 +IS_L Ack [0 ] 0 +IS_L Transient_GETX [0 ] 0 +IS_L Transient_Local_GETX [0 ] 0 +IS_L Transient_GETS [0 ] 0 +IS_L Transient_Local_GETS [0 ] 0 +IS_L Transient_GETS_Last_Token [0 ] 0 +IS_L Transient_Local_GETS_Last_Token [0 ] 0 +IS_L Persistent_GETX [0 ] 0 +IS_L Persistent_GETS [0 ] 0 +IS_L Own_Lock_or_Unlock [0 ] 0 +IS_L Request_Timeout [0 ] 0 + +Cache Stats: system.l2_cntrl0.L2cacheMemory + system.l2_cntrl0.L2cacheMemory_total_misses: 906 + system.l2_cntrl0.L2cacheMemory_total_demand_misses: 906 + system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 + + system.l2_cntrl0.L2cacheMemory_request_type_GETS: 9.60265% + system.l2_cntrl0.L2cacheMemory_request_type_GETX: 90.3974% + + system.l2_cntrl0.L2cacheMemory_access_mode_type_SupervisorMode: 906 100% + + --- L2Cache --- - Event Counts - -L1_GETS 88 -L1_GETS_Last_Token 0 -L1_GETX 782 -L1_INV 0 -Transient_GETX 0 -Transient_GETS 0 -Transient_GETS_Last_Token 0 -L2_Replacement 781 -Writeback_Tokens 0 -Writeback_Shared_Data 0 -Writeback_All_Tokens 866 -Writeback_Owned 0 -Data_Shared 0 -Data_Owner 0 -Data_All_Tokens 0 -Ack 0 -Ack_All_Tokens 0 -Persistent_GETX 161 -Persistent_GETS 12 -Own_Lock_or_Unlock 173 +L1_GETS [95 ] 95 +L1_GETS_Last_Token [1 ] 1 +L1_GETX [826 ] 826 +L1_INV [0 ] 0 +Transient_GETX [0 ] 0 +Transient_GETS [0 ] 0 +Transient_GETS_Last_Token [0 ] 0 +L2_Replacement [857 ] 857 +Writeback_Tokens [0 ] 0 +Writeback_Shared_Data [8 ] 8 +Writeback_All_Tokens [908 ] 908 +Writeback_Owned [0 ] 0 +Data_Shared [0 ] 0 +Data_Owner [0 ] 0 +Data_All_Tokens [0 ] 0 +Ack [0 ] 0 +Ack_All_Tokens [0 ] 0 +Persistent_GETX [173 ] 173 +Persistent_GETS [18 ] 18 +Persistent_GETS_Last_Token [0 ] 0 +Own_Lock_or_Unlock [191 ] 191 - Transitions - -NP L1_GETS 87 -NP L1_GETX 756 -NP L1_INV 0 <-- -NP Transient_GETX 0 <-- -NP Transient_GETS 0 <-- -NP Writeback_Tokens 0 <-- -NP Writeback_Shared_Data 0 <-- -NP Writeback_All_Tokens 783 -NP Writeback_Owned 0 <-- -NP Data_Shared 0 <-- -NP Data_Owner 0 <-- -NP Data_All_Tokens 0 <-- -NP Ack 0 <-- -NP Persistent_GETX 0 <-- -NP Persistent_GETS 0 <-- -NP Own_Lock_or_Unlock 145 - -I L1_GETS 0 <-- -I L1_GETS_Last_Token 0 <-- -I L1_GETX 0 <-- -I L1_INV 0 <-- -I Transient_GETX 0 <-- -I Transient_GETS 0 <-- -I Transient_GETS_Last_Token 0 <-- -I L2_Replacement 30 -I Writeback_Tokens 0 <-- -I Writeback_Shared_Data 0 <-- -I Writeback_All_Tokens 24 -I Writeback_Owned 0 <-- -I Data_Shared 0 <-- -I Data_Owner 0 <-- -I Data_All_Tokens 0 <-- -I Ack 0 <-- -I Persistent_GETX 0 <-- -I Persistent_GETS 0 <-- -I Own_Lock_or_Unlock 0 <-- - -S L1_GETS 0 <-- -S L1_GETS_Last_Token 0 <-- -S L1_GETX 0 <-- -S L1_INV 0 <-- -S Transient_GETX 0 <-- -S Transient_GETS 0 <-- -S Transient_GETS_Last_Token 0 <-- -S L2_Replacement 0 <-- -S Writeback_Tokens 0 <-- -S Writeback_Shared_Data 0 <-- -S Writeback_All_Tokens 0 <-- -S Writeback_Owned 0 <-- -S Data_Shared 0 <-- -S Data_Owner 0 <-- -S Data_All_Tokens 0 <-- -S Ack 0 <-- -S Persistent_GETX 0 <-- -S Persistent_GETS 0 <-- -S Own_Lock_or_Unlock 0 <-- - -O L1_GETS 0 <-- -O L1_GETS_Last_Token 0 <-- -O L1_GETX 1 -O L1_INV 0 <-- -O Transient_GETX 0 <-- -O Transient_GETS 0 <-- -O Transient_GETS_Last_Token 0 <-- -O L2_Replacement 0 <-- -O Writeback_Tokens 0 <-- -O Writeback_Shared_Data 0 <-- -O Writeback_All_Tokens 0 <-- -O Data_Shared 0 <-- -O Data_All_Tokens 0 <-- -O Ack 0 <-- -O Ack_All_Tokens 0 <-- -O Persistent_GETX 0 <-- -O Persistent_GETS 0 <-- -O Own_Lock_or_Unlock 0 <-- - -M L1_GETS 1 -M L1_GETX 25 -M L1_INV 0 <-- -M Transient_GETX 0 <-- -M Transient_GETS 0 <-- -M L2_Replacement 751 -M Persistent_GETX 26 -M Persistent_GETS 2 -M Own_Lock_or_Unlock 0 <-- - -I_L L1_GETS 0 <-- -I_L L1_GETX 0 <-- -I_L L1_INV 0 <-- -I_L Transient_GETX 0 <-- -I_L Transient_GETS 0 <-- -I_L Transient_GETS_Last_Token 0 <-- -I_L L2_Replacement 0 <-- -I_L Writeback_Tokens 0 <-- -I_L Writeback_Shared_Data 0 <-- -I_L Writeback_All_Tokens 59 -I_L Writeback_Owned 0 <-- -I_L Data_Shared 0 <-- -I_L Data_Owner 0 <-- -I_L Data_All_Tokens 0 <-- -I_L Ack 0 <-- -I_L Persistent_GETX 135 -I_L Persistent_GETS 10 -I_L Own_Lock_or_Unlock 28 - -S_L L1_GETS 0 <-- -S_L L1_GETS_Last_Token 0 <-- -S_L L1_GETX 0 <-- -S_L L1_INV 0 <-- -S_L Transient_GETX 0 <-- -S_L Transient_GETS 0 <-- -S_L Transient_GETS_Last_Token 0 <-- -S_L L2_Replacement 0 <-- -S_L Writeback_Tokens 0 <-- -S_L Writeback_Shared_Data 0 <-- -S_L Writeback_All_Tokens 0 <-- -S_L Writeback_Owned 0 <-- -S_L Data_Shared 0 <-- -S_L Data_Owner 0 <-- -S_L Data_All_Tokens 0 <-- -S_L Ack 0 <-- -S_L Persistent_GETX 0 <-- -S_L Persistent_GETS 0 <-- -S_L Own_Lock_or_Unlock 0 <-- - -Memory controller: system.ruby.network.topology.ext_links2.ext_node.memBuffer: - memory_total_requests: 1599 - memory_reads: 842 - memory_writes: 756 - memory_refreshes: 574 - memory_total_request_delays: 1024 - memory_delays_per_request: 0.6404 - memory_delays_in_input_queue: 172 - memory_delays_behind_head_of_bank_queue: 2 - memory_delays_stalled_at_head_of_bank_queue: 850 - memory_stalls_for_bank_busy: 171 +NP L1_GETS [87 ] 87 +NP L1_GETX [816 ] 816 +NP L1_INV [0 ] 0 +NP Transient_GETX [0 ] 0 +NP Transient_GETS [0 ] 0 +NP Writeback_Tokens [0 ] 0 +NP Writeback_Shared_Data [7 ] 7 +NP Writeback_All_Tokens [852 ] 852 +NP Writeback_Owned [0 ] 0 +NP Data_Shared [0 ] 0 +NP Data_Owner [0 ] 0 +NP Data_All_Tokens [0 ] 0 +NP Ack [0 ] 0 +NP Persistent_GETX [0 ] 0 +NP Persistent_GETS [0 ] 0 +NP Persistent_GETS_Last_Token [0 ] 0 +NP Own_Lock_or_Unlock [168 ] 168 + +I L1_GETS [0 ] 0 +I L1_GETS_Last_Token [0 ] 0 +I L1_GETX [0 ] 0 +I L1_INV [0 ] 0 +I Transient_GETX [0 ] 0 +I Transient_GETS [0 ] 0 +I Transient_GETS_Last_Token [0 ] 0 +I L2_Replacement [28 ] 28 +I Writeback_Tokens [0 ] 0 +I Writeback_Shared_Data [1 ] 1 +I Writeback_All_Tokens [5 ] 5 +I Writeback_Owned [0 ] 0 +I Data_Shared [0 ] 0 +I Data_Owner [0 ] 0 +I Data_All_Tokens [0 ] 0 +I Ack [0 ] 0 +I Persistent_GETX [0 ] 0 +I Persistent_GETS [0 ] 0 +I Persistent_GETS_Last_Token [0 ] 0 +I Own_Lock_or_Unlock [0 ] 0 + +S L1_GETS [0 ] 0 +S L1_GETS_Last_Token [1 ] 1 +S L1_GETX [2 ] 2 +S L1_INV [0 ] 0 +S Transient_GETX [0 ] 0 +S Transient_GETS [0 ] 0 +S Transient_GETS_Last_Token [0 ] 0 +S L2_Replacement [5 ] 5 +S Writeback_Tokens [0 ] 0 +S Writeback_Shared_Data [0 ] 0 +S Writeback_All_Tokens [0 ] 0 +S Writeback_Owned [0 ] 0 +S Data_Shared [0 ] 0 +S Data_Owner [0 ] 0 +S Data_All_Tokens [0 ] 0 +S Ack [0 ] 0 +S Persistent_GETX [0 ] 0 +S Persistent_GETS [0 ] 0 +S Persistent_GETS_Last_Token [0 ] 0 +S Own_Lock_or_Unlock [0 ] 0 + +O L1_GETS [0 ] 0 +O L1_GETS_Last_Token [0 ] 0 +O L1_GETX [1 ] 1 +O L1_INV [0 ] 0 +O Transient_GETX [0 ] 0 +O Transient_GETS [0 ] 0 +O Transient_GETS_Last_Token [0 ] 0 +O L2_Replacement [7 ] 7 +O Writeback_Tokens [0 ] 0 +O Writeback_Shared_Data [0 ] 0 +O Writeback_All_Tokens [0 ] 0 +O Data_Shared [0 ] 0 +O Data_All_Tokens [0 ] 0 +O Ack [0 ] 0 +O Ack_All_Tokens [0 ] 0 +O Persistent_GETX [0 ] 0 +O Persistent_GETS [0 ] 0 +O Persistent_GETS_Last_Token [0 ] 0 +O Own_Lock_or_Unlock [0 ] 0 + +M L1_GETS [8 ] 8 +M L1_GETX [7 ] 7 +M L1_INV [0 ] 0 +M Transient_GETX [0 ] 0 +M Transient_GETS [0 ] 0 +M L2_Replacement [814 ] 814 +M Persistent_GETX [26 ] 26 +M Persistent_GETS [0 ] 0 +M Own_Lock_or_Unlock [0 ] 0 + +I_L L1_GETS [0 ] 0 +I_L L1_GETX [0 ] 0 +I_L L1_INV [0 ] 0 +I_L Transient_GETX [0 ] 0 +I_L Transient_GETS [0 ] 0 +I_L Transient_GETS_Last_Token [0 ] 0 +I_L L2_Replacement [3 ] 3 +I_L Writeback_Tokens [0 ] 0 +I_L Writeback_Shared_Data [0 ] 0 +I_L Writeback_All_Tokens [51 ] 51 +I_L Writeback_Owned [0 ] 0 +I_L Data_Shared [0 ] 0 +I_L Data_Owner [0 ] 0 +I_L Data_All_Tokens [0 ] 0 +I_L Ack [0 ] 0 +I_L Persistent_GETX [147 ] 147 +I_L Persistent_GETS [18 ] 18 +I_L Own_Lock_or_Unlock [23 ] 23 + +S_L L1_GETS [0 ] 0 +S_L L1_GETS_Last_Token [0 ] 0 +S_L L1_GETX [0 ] 0 +S_L L1_INV [0 ] 0 +S_L Transient_GETX [0 ] 0 +S_L Transient_GETS [0 ] 0 +S_L Transient_GETS_Last_Token [0 ] 0 +S_L L2_Replacement [0 ] 0 +S_L Writeback_Tokens [0 ] 0 +S_L Writeback_Shared_Data [0 ] 0 +S_L Writeback_All_Tokens [0 ] 0 +S_L Writeback_Owned [0 ] 0 +S_L Data_Shared [0 ] 0 +S_L Data_Owner [0 ] 0 +S_L Data_All_Tokens [0 ] 0 +S_L Ack [0 ] 0 +S_L Persistent_GETX [0 ] 0 +S_L Persistent_GETS [0 ] 0 +S_L Persistent_GETS_Last_Token [0 ] 0 +S_L Own_Lock_or_Unlock [0 ] 0 + +Memory controller: system.dir_cntrl0.memBuffer: + memory_total_requests: 1720 + memory_reads: 902 + memory_writes: 818 + memory_refreshes: 571 + memory_total_request_delays: 1302 + memory_delays_per_request: 0.756977 + memory_delays_in_input_queue: 202 + memory_delays_behind_head_of_bank_queue: 0 + memory_delays_stalled_at_head_of_bank_queue: 1100 + memory_stalls_for_bank_busy: 220 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 68 - memory_stalls_for_bus: 354 + memory_stalls_for_arbitration: 97 + memory_stalls_for_bus: 424 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 184 - memory_stalls_for_read_read_turnaround: 73 - accesses_per_bank: 49 42 55 87 81 71 69 52 62 53 36 48 32 44 42 54 55 42 39 43 42 41 41 55 58 45 50 41 45 33 49 43 + memory_stalls_for_read_write_turnaround: 268 + memory_stalls_for_read_read_turnaround: 91 + accesses_per_bank: 61 42 48 69 122 69 58 56 55 51 54 41 43 47 55 55 46 45 53 50 43 51 55 52 43 56 60 54 49 40 40 57 - --- Directory 0 --- + --- Directory --- - Event Counts - -GETX 771 -GETS 89 -Lockdown 173 -Unlockdown 173 -Own_Lock_or_Unlock 0 -Data_Owner 0 -Data_All_Tokens 766 -Ack_Owner 0 -Ack_Owner_All_Tokens 81 -Tokens 0 -Ack_All_Tokens 0 -Request_Timeout 0 -Memory_Data 842 -Memory_Ack 755 -DMA_READ 0 -DMA_WRITE 0 -DMA_WRITE_All_Tokens 0 +GETX [828 ] 828 +GETS [87 ] 87 +Lockdown [191 ] 191 +Unlockdown [191 ] 191 +Own_Lock_or_Unlock [0 ] 0 +Own_Lock_or_Unlock_Tokens [0 ] 0 +Data_Owner [7 ] 7 +Data_All_Tokens [825 ] 825 +Ack_Owner [0 ] 0 +Ack_Owner_All_Tokens [76 ] 76 +Tokens [2 ] 2 +Ack_All_Tokens [3 ] 3 +Request_Timeout [0 ] 0 +Memory_Data [902 ] 902 +Memory_Ack [817 ] 817 +DMA_READ [0 ] 0 +DMA_WRITE [0 ] 0 +DMA_WRITE_All_Tokens [0 ] 0 - Transitions - -O GETX 751 -O GETS 87 -O Lockdown 5 -O Own_Lock_or_Unlock 0 <-- -O Data_Owner 0 <-- -O Data_All_Tokens 0 <-- -O Tokens 0 <-- -O Ack_All_Tokens 0 <-- -O DMA_READ 0 <-- -O DMA_WRITE 0 <-- -O DMA_WRITE_All_Tokens 0 <-- - -NO GETX 4 -NO GETS 0 <-- -NO Lockdown 151 -NO Own_Lock_or_Unlock 0 <-- -NO Data_Owner 0 <-- -NO Data_All_Tokens 756 -NO Ack_Owner 0 <-- -NO Ack_Owner_All_Tokens 81 -NO Tokens 0 <-- -NO DMA_READ 0 <-- -NO DMA_WRITE 0 <-- - -L GETX 2 -L GETS 0 <-- -L Lockdown 0 <-- -L Unlockdown 172 -L Own_Lock_or_Unlock 0 <-- -L Data_Owner 0 <-- -L Data_All_Tokens 10 -L Ack_Owner 0 <-- -L Ack_Owner_All_Tokens 0 <-- -L Tokens 0 <-- -L DMA_READ 0 <-- -L DMA_WRITE 0 <-- - -O_W GETX 4 -O_W GETS 2 -O_W Lockdown 1 -O_W Unlockdown 0 <-- -O_W Own_Lock_or_Unlock 0 <-- -O_W Data_Owner 0 <-- -O_W Ack_Owner 0 <-- -O_W Tokens 0 <-- -O_W Ack_All_Tokens 0 <-- -O_W Memory_Data 0 <-- -O_W Memory_Ack 755 -O_W DMA_READ 0 <-- -O_W DMA_WRITE 0 <-- - -L_O_W GETX 10 -L_O_W GETS 0 <-- -L_O_W Lockdown 0 <-- -L_O_W Unlockdown 1 -L_O_W Own_Lock_or_Unlock 0 <-- -L_O_W Data_Owner 0 <-- -L_O_W Ack_Owner 0 <-- -L_O_W Tokens 0 <-- -L_O_W Ack_All_Tokens 0 <-- -L_O_W Memory_Data 5 -L_O_W Memory_Ack 0 <-- -L_O_W DMA_READ 0 <-- -L_O_W DMA_WRITE 0 <-- - -L_NO_W GETX 0 <-- -L_NO_W GETS 0 <-- -L_NO_W Lockdown 0 <-- -L_NO_W Unlockdown 0 <-- -L_NO_W Own_Lock_or_Unlock 0 <-- -L_NO_W Data_Owner 0 <-- -L_NO_W Ack_Owner 0 <-- -L_NO_W Tokens 0 <-- -L_NO_W Ack_All_Tokens 0 <-- -L_NO_W Memory_Data 16 -L_NO_W DMA_READ 0 <-- -L_NO_W DMA_WRITE 0 <-- - -DR_L_W GETX 0 <-- -DR_L_W GETS 0 <-- -DR_L_W Lockdown 0 <-- -DR_L_W Unlockdown 0 <-- -DR_L_W Own_Lock_or_Unlock 0 <-- -DR_L_W Data_Owner 0 <-- -DR_L_W Ack_Owner 0 <-- -DR_L_W Tokens 0 <-- -DR_L_W Ack_All_Tokens 0 <-- -DR_L_W Request_Timeout 0 <-- -DR_L_W Memory_Data 0 <-- -DR_L_W DMA_READ 0 <-- -DR_L_W DMA_WRITE 0 <-- - -NO_W GETX 0 <-- -NO_W GETS 0 <-- -NO_W Lockdown 16 -NO_W Unlockdown 0 <-- -NO_W Own_Lock_or_Unlock 0 <-- -NO_W Data_Owner 0 <-- -NO_W Ack_Owner 0 <-- -NO_W Tokens 0 <-- -NO_W Ack_All_Tokens 0 <-- -NO_W Memory_Data 821 -NO_W DMA_READ 0 <-- -NO_W DMA_WRITE 0 <-- - -O_DW_W GETX 0 <-- -O_DW_W GETS 0 <-- -O_DW_W Data_Owner 0 <-- -O_DW_W Ack_Owner 0 <-- -O_DW_W Tokens 0 <-- -O_DW_W Ack_All_Tokens 0 <-- -O_DW_W Memory_Ack 0 <-- -O_DW_W DMA_READ 0 <-- -O_DW_W DMA_WRITE 0 <-- - -O_DR_W GETX 0 <-- -O_DR_W GETS 0 <-- -O_DR_W Lockdown 0 <-- -O_DR_W Unlockdown 0 <-- -O_DR_W Own_Lock_or_Unlock 0 <-- -O_DR_W Data_Owner 0 <-- -O_DR_W Ack_Owner 0 <-- -O_DR_W Tokens 0 <-- -O_DR_W Ack_All_Tokens 0 <-- -O_DR_W Memory_Data 0 <-- -O_DR_W DMA_READ 0 <-- -O_DR_W DMA_WRITE 0 <-- - -O_DW GETX 0 <-- -O_DW GETS 0 <-- -O_DW Lockdown 0 <-- -O_DW Own_Lock_or_Unlock 0 <-- -O_DW Data_Owner 0 <-- -O_DW Data_All_Tokens 0 <-- -O_DW Ack_Owner 0 <-- -O_DW Ack_Owner_All_Tokens 0 <-- -O_DW Tokens 0 <-- -O_DW Ack_All_Tokens 0 <-- -O_DW DMA_READ 0 <-- -O_DW DMA_WRITE 0 <-- - -NO_DW GETX 0 <-- -NO_DW GETS 0 <-- -NO_DW Lockdown 0 <-- -NO_DW Own_Lock_or_Unlock 0 <-- -NO_DW Data_Owner 0 <-- -NO_DW Data_All_Tokens 0 <-- -NO_DW Tokens 0 <-- -NO_DW Request_Timeout 0 <-- -NO_DW DMA_READ 0 <-- -NO_DW DMA_WRITE 0 <-- - -NO_DR GETX 0 <-- -NO_DR GETS 0 <-- -NO_DR Lockdown 0 <-- -NO_DR Own_Lock_or_Unlock 0 <-- -NO_DR Data_Owner 0 <-- -NO_DR Data_All_Tokens 0 <-- -NO_DR Tokens 0 <-- -NO_DR Request_Timeout 0 <-- -NO_DR DMA_READ 0 <-- -NO_DR DMA_WRITE 0 <-- - -DW_L GETX 0 <-- -DW_L GETS 0 <-- -DW_L Lockdown 0 <-- -DW_L Unlockdown 0 <-- -DW_L Own_Lock_or_Unlock 0 <-- -DW_L Data_Owner 0 <-- -DW_L Data_All_Tokens 0 <-- -DW_L Ack_Owner 0 <-- -DW_L Ack_Owner_All_Tokens 0 <-- -DW_L Tokens 0 <-- -DW_L Request_Timeout 0 <-- -DW_L DMA_READ 0 <-- -DW_L DMA_WRITE 0 <-- - -DR_L GETX 0 <-- -DR_L GETS 0 <-- -DR_L Lockdown 0 <-- -DR_L Unlockdown 0 <-- -DR_L Own_Lock_or_Unlock 0 <-- -DR_L Data_Owner 0 <-- -DR_L Data_All_Tokens 0 <-- -DR_L Ack_Owner 0 <-- -DR_L Ack_Owner_All_Tokens 0 <-- -DR_L Tokens 0 <-- -DR_L Request_Timeout 0 <-- -DR_L DMA_READ 0 <-- -DR_L DMA_WRITE 0 <-- - +O GETX [811 ] 811 +O GETS [83 ] 83 +O Lockdown [6 ] 6 +O Unlockdown [0 ] 0 +O Own_Lock_or_Unlock [0 ] 0 +O Own_Lock_or_Unlock_Tokens [0 ] 0 +O Data_Owner [0 ] 0 +O Data_All_Tokens [0 ] 0 +O Tokens [0 ] 0 +O Ack_All_Tokens [3 ] 3 +O DMA_READ [0 ] 0 +O DMA_WRITE [0 ] 0 +O DMA_WRITE_All_Tokens [0 ] 0 + +NO GETX [8 ] 8 +NO GETS [4 ] 4 +NO Lockdown [168 ] 168 +NO Unlockdown [0 ] 0 +NO Own_Lock_or_Unlock [0 ] 0 +NO Own_Lock_or_Unlock_Tokens [0 ] 0 +NO Data_Owner [7 ] 7 +NO Data_All_Tokens [811 ] 811 +NO Ack_Owner [0 ] 0 +NO Ack_Owner_All_Tokens [76 ] 76 +NO Tokens [1 ] 1 +NO DMA_READ [0 ] 0 +NO DMA_WRITE [0 ] 0 + +L GETX [0 ] 0 +L GETS [0 ] 0 +L Lockdown [0 ] 0 +L Unlockdown [189 ] 189 +L Own_Lock_or_Unlock [0 ] 0 +L Own_Lock_or_Unlock_Tokens [0 ] 0 +L Data_Owner [0 ] 0 +L Data_All_Tokens [14 ] 14 +L Ack_Owner [0 ] 0 +L Ack_Owner_All_Tokens [0 ] 0 +L Tokens [1 ] 1 +L DMA_READ [0 ] 0 +L DMA_WRITE [0 ] 0 +L DMA_WRITE_All_Tokens [0 ] 0 + +O_W GETX [9 ] 9 +O_W GETS [0 ] 0 +O_W Lockdown [3 ] 3 +O_W Unlockdown [0 ] 0 +O_W Own_Lock_or_Unlock [0 ] 0 +O_W Own_Lock_or_Unlock_Tokens [0 ] 0 +O_W Data_Owner [0 ] 0 +O_W Data_All_Tokens [0 ] 0 +O_W Ack_Owner [0 ] 0 +O_W Tokens [0 ] 0 +O_W Ack_All_Tokens [0 ] 0 +O_W Memory_Data [1 ] 1 +O_W Memory_Ack [815 ] 815 +O_W DMA_READ [0 ] 0 +O_W DMA_WRITE [0 ] 0 +O_W DMA_WRITE_All_Tokens [0 ] 0 + +L_O_W GETX [0 ] 0 +L_O_W GETS [0 ] 0 +L_O_W Lockdown [0 ] 0 +L_O_W Unlockdown [2 ] 2 +L_O_W Own_Lock_or_Unlock [0 ] 0 +L_O_W Own_Lock_or_Unlock_Tokens [0 ] 0 +L_O_W Data_Owner [0 ] 0 +L_O_W Data_All_Tokens [0 ] 0 +L_O_W Ack_Owner [0 ] 0 +L_O_W Tokens [0 ] 0 +L_O_W Ack_All_Tokens [0 ] 0 +L_O_W Memory_Data [7 ] 7 +L_O_W Memory_Ack [2 ] 2 +L_O_W DMA_READ [0 ] 0 +L_O_W DMA_WRITE [0 ] 0 +L_O_W DMA_WRITE_All_Tokens [0 ] 0 + +L_NO_W GETX [0 ] 0 +L_NO_W GETS [0 ] 0 +L_NO_W Lockdown [0 ] 0 +L_NO_W Unlockdown [0 ] 0 +L_NO_W Own_Lock_or_Unlock [0 ] 0 +L_NO_W Own_Lock_or_Unlock_Tokens [0 ] 0 +L_NO_W Data_Owner [0 ] 0 +L_NO_W Data_All_Tokens [0 ] 0 +L_NO_W Ack_Owner [0 ] 0 +L_NO_W Tokens [0 ] 0 +L_NO_W Ack_All_Tokens [0 ] 0 +L_NO_W Memory_Data [14 ] 14 +L_NO_W DMA_READ [0 ] 0 +L_NO_W DMA_WRITE [0 ] 0 +L_NO_W DMA_WRITE_All_Tokens [0 ] 0 + +DR_L_W GETX [0 ] 0 +DR_L_W GETS [0 ] 0 +DR_L_W Lockdown [0 ] 0 +DR_L_W Unlockdown [0 ] 0 +DR_L_W Own_Lock_or_Unlock [0 ] 0 +DR_L_W Own_Lock_or_Unlock_Tokens [0 ] 0 +DR_L_W Data_Owner [0 ] 0 +DR_L_W Data_All_Tokens [0 ] 0 +DR_L_W Ack_Owner [0 ] 0 +DR_L_W Tokens [0 ] 0 +DR_L_W Ack_All_Tokens [0 ] 0 +DR_L_W Request_Timeout [0 ] 0 +DR_L_W Memory_Data [0 ] 0 +DR_L_W DMA_READ [0 ] 0 +DR_L_W DMA_WRITE [0 ] 0 +DR_L_W DMA_WRITE_All_Tokens [0 ] 0 + +DW_L_W GETX [0 ] 0 +DW_L_W GETS [0 ] 0 +DW_L_W Lockdown [0 ] 0 +DW_L_W Unlockdown [0 ] 0 +DW_L_W Own_Lock_or_Unlock [0 ] 0 +DW_L_W Own_Lock_or_Unlock_Tokens [0 ] 0 +DW_L_W Data_Owner [0 ] 0 +DW_L_W Data_All_Tokens [0 ] 0 +DW_L_W Ack_Owner [0 ] 0 +DW_L_W Tokens [0 ] 0 +DW_L_W Ack_All_Tokens [0 ] 0 +DW_L_W Request_Timeout [0 ] 0 +DW_L_W Memory_Ack [0 ] 0 +DW_L_W DMA_READ [0 ] 0 +DW_L_W DMA_WRITE [0 ] 0 +DW_L_W DMA_WRITE_All_Tokens [0 ] 0 + +NO_W GETX [0 ] 0 +NO_W GETS [0 ] 0 +NO_W Lockdown [14 ] 14 +NO_W Unlockdown [0 ] 0 +NO_W Own_Lock_or_Unlock [0 ] 0 +NO_W Own_Lock_or_Unlock_Tokens [0 ] 0 +NO_W Data_Owner [0 ] 0 +NO_W Data_All_Tokens [0 ] 0 +NO_W Ack_Owner [0 ] 0 +NO_W Tokens [0 ] 0 +NO_W Ack_All_Tokens [0 ] 0 +NO_W Memory_Data [880 ] 880 +NO_W DMA_READ [0 ] 0 +NO_W DMA_WRITE [0 ] 0 +NO_W DMA_WRITE_All_Tokens [0 ] 0 + +O_DW_W GETX [0 ] 0 +O_DW_W GETS [0 ] 0 +O_DW_W Lockdown [0 ] 0 +O_DW_W Unlockdown [0 ] 0 +O_DW_W Own_Lock_or_Unlock [0 ] 0 +O_DW_W Own_Lock_or_Unlock_Tokens [0 ] 0 +O_DW_W Data_Owner [0 ] 0 +O_DW_W Data_All_Tokens [0 ] 0 +O_DW_W Ack_Owner [0 ] 0 +O_DW_W Tokens [0 ] 0 +O_DW_W Ack_All_Tokens [0 ] 0 +O_DW_W Request_Timeout [0 ] 0 +O_DW_W Memory_Ack [0 ] 0 +O_DW_W DMA_READ [0 ] 0 +O_DW_W DMA_WRITE [0 ] 0 +O_DW_W DMA_WRITE_All_Tokens [0 ] 0 + +O_DR_W GETX [0 ] 0 +O_DR_W GETS [0 ] 0 +O_DR_W Lockdown [0 ] 0 +O_DR_W Unlockdown [0 ] 0 +O_DR_W Own_Lock_or_Unlock [0 ] 0 +O_DR_W Own_Lock_or_Unlock_Tokens [0 ] 0 +O_DR_W Data_Owner [0 ] 0 +O_DR_W Data_All_Tokens [0 ] 0 +O_DR_W Ack_Owner [0 ] 0 +O_DR_W Tokens [0 ] 0 +O_DR_W Ack_All_Tokens [0 ] 0 +O_DR_W Request_Timeout [0 ] 0 +O_DR_W Memory_Data [0 ] 0 +O_DR_W DMA_READ [0 ] 0 +O_DR_W DMA_WRITE [0 ] 0 +O_DR_W DMA_WRITE_All_Tokens [0 ] 0 + +O_DW GETX [0 ] 0 +O_DW GETS [0 ] 0 +O_DW Lockdown [0 ] 0 +O_DW Unlockdown [0 ] 0 +O_DW Own_Lock_or_Unlock [0 ] 0 +O_DW Own_Lock_or_Unlock_Tokens [0 ] 0 +O_DW Data_Owner [0 ] 0 +O_DW Data_All_Tokens [0 ] 0 +O_DW Ack_Owner [0 ] 0 +O_DW Ack_Owner_All_Tokens [0 ] 0 +O_DW Tokens [0 ] 0 +O_DW Ack_All_Tokens [0 ] 0 +O_DW Request_Timeout [0 ] 0 +O_DW DMA_READ [0 ] 0 +O_DW DMA_WRITE [0 ] 0 +O_DW DMA_WRITE_All_Tokens [0 ] 0 + +NO_DW GETX [0 ] 0 +NO_DW GETS [0 ] 0 +NO_DW Lockdown [0 ] 0 +NO_DW Unlockdown [0 ] 0 +NO_DW Own_Lock_or_Unlock [0 ] 0 +NO_DW Own_Lock_or_Unlock_Tokens [0 ] 0 +NO_DW Data_Owner [0 ] 0 +NO_DW Data_All_Tokens [0 ] 0 +NO_DW Tokens [0 ] 0 +NO_DW Request_Timeout [0 ] 0 +NO_DW DMA_READ [0 ] 0 +NO_DW DMA_WRITE [0 ] 0 +NO_DW DMA_WRITE_All_Tokens [0 ] 0 + +NO_DR GETX [0 ] 0 +NO_DR GETS [0 ] 0 +NO_DR Lockdown [0 ] 0 +NO_DR Unlockdown [0 ] 0 +NO_DR Own_Lock_or_Unlock [0 ] 0 +NO_DR Own_Lock_or_Unlock_Tokens [0 ] 0 +NO_DR Data_Owner [0 ] 0 +NO_DR Data_All_Tokens [0 ] 0 +NO_DR Tokens [0 ] 0 +NO_DR Request_Timeout [0 ] 0 +NO_DR DMA_READ [0 ] 0 +NO_DR DMA_WRITE [0 ] 0 +NO_DR DMA_WRITE_All_Tokens [0 ] 0 + +DW_L GETX [0 ] 0 +DW_L GETS [0 ] 0 +DW_L Lockdown [0 ] 0 +DW_L Unlockdown [0 ] 0 +DW_L Own_Lock_or_Unlock [0 ] 0 +DW_L Own_Lock_or_Unlock_Tokens [0 ] 0 +DW_L Data_Owner [0 ] 0 +DW_L Data_All_Tokens [0 ] 0 +DW_L Ack_Owner [0 ] 0 +DW_L Ack_Owner_All_Tokens [0 ] 0 +DW_L Tokens [0 ] 0 +DW_L Request_Timeout [0 ] 0 +DW_L DMA_READ [0 ] 0 +DW_L DMA_WRITE [0 ] 0 +DW_L DMA_WRITE_All_Tokens [0 ] 0 + +DR_L GETX [0 ] 0 +DR_L GETS [0 ] 0 +DR_L Lockdown [0 ] 0 +DR_L Unlockdown [0 ] 0 +DR_L Own_Lock_or_Unlock [0 ] 0 +DR_L Own_Lock_or_Unlock_Tokens [0 ] 0 +DR_L Data_Owner [0 ] 0 +DR_L Data_All_Tokens [0 ] 0 +DR_L Ack_Owner [0 ] 0 +DR_L Ack_Owner_All_Tokens [0 ] 0 +DR_L Tokens [0 ] 0 +DR_L Request_Timeout [0 ] 0 +DR_L DMA_READ [0 ] 0 +DR_L DMA_WRITE [0 ] 0 +DR_L DMA_WRITE_All_Tokens
\ No newline at end of file diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout index f528d26bf..5d4c3c605 100755 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 18 2010 14:58:42 -M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates -M5 started Mar 18 2010 14:58:52 -M5 executing on cabr0210 +M5 compiled Aug 5 2010 10:41:36 +M5 revision 1cd2a169499f+ 7535+ default brad/hammer_merge_gets qtip tip +M5 started Aug 5 2010 10:45:27 +M5 executing on svvint09 command line: build/ALPHA_SE_MOESI_CMP_token/m5.fast -d build/ALPHA_SE_MOESI_CMP_token/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_SE_MOESI_CMP_token/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 275491 because Ruby Tester completed +Exiting @ tick 273851 because Ruby Tester completed diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt index e9b91bb36..a749dd61b 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt @@ -1,10 +1,10 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 208544 # Number of bytes of host memory used +host_mem_usage 210052 # Number of bytes of host memory used host_seconds 0.53 # Real time elapsed on the host -host_tick_rate 518969 # Simulator tick rate (ticks/s) +host_tick_rate 516678 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.000275 # Number of seconds simulated -sim_ticks 275491 # Number of ticks simulated +sim_seconds 0.000274 # Number of seconds simulated +sim_ticks 273851 # Number of ticks simulated ---------- End Simulation Statistics ---------- diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini index 16aeab94e..24f058dce 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini @@ -5,10 +5,114 @@ dummy=0 [system] type=System -children=physmem ruby +children=dir_cntrl0 l1_cntrl0 physmem ruby mem_mode=timing physmem=system.physmem +[system.dir_cntrl0] +type=Directory_Controller +children=directory memBuffer probeFilter +buffer_size=0 +directory=system.dir_cntrl0.directory +memBuffer=system.dir_cntrl0.memBuffer +memory_controller_latency=2 +number_of_TBEs=256 +probeFilter=system.dir_cntrl0.probeFilter +probe_filter_enabled=false +recycle_latency=10 +transitions_per_cycle=32 +version=0 + +[system.dir_cntrl0.directory] +type=RubyDirectoryMemory +map_levels=4 +numa_high_bit=6 +size=134217728 +use_map=false +version=0 + +[system.dir_cntrl0.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.dir_cntrl0.probeFilter] +type=RubyCache +assoc=4 +latency=1 +replacement_policy=PSEUDO_LRU +size=1024 +start_index_bit=6 + +[system.l1_cntrl0] +type=L1Cache_Controller +children=L2cacheMemory sequencer +L1DcacheMemory=system.l1_cntrl0.sequencer.dcache +L1IcacheMemory=system.l1_cntrl0.sequencer.icache +L2cacheMemory=system.l1_cntrl0.L2cacheMemory +buffer_size=0 +cache_response_latency=10 +issue_latency=2 +no_mig_atomic=true +number_of_TBEs=256 +recycle_latency=10 +sequencer=system.l1_cntrl0.sequencer +transitions_per_cycle=32 +version=0 + +[system.l1_cntrl0.L2cacheMemory] +type=RubyCache +assoc=2 +latency=10 +replacement_policy=PSEUDO_LRU +size=512 +start_index_bit=6 + +[system.l1_cntrl0.sequencer] +type=RubySequencer +children=dcache icache +dcache=system.l1_cntrl0.sequencer.dcache +deadlock_threshold=500000 +icache=system.l1_cntrl0.sequencer.icache +max_outstanding_requests=16 +physmem=system.physmem +using_ruby_tester=true +version=0 +physMemPort=system.physmem.port[0] +port=root.cpuPort[0] + +[system.l1_cntrl0.sequencer.dcache] +type=RubyCache +assoc=2 +latency=2 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + +[system.l1_cntrl0.sequencer.icache] +type=RubyCache +assoc=2 +latency=2 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + [system.physmem] type=PhysicalMemory file= @@ -17,7 +121,7 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort +port=system.l1_cntrl0.sequencer.physMemPort [system.ruby] type=RubySystem @@ -58,117 +162,26 @@ type=Topology children=ext_links0 ext_links1 int_links0 int_links1 ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 +name=Crossbar num_int_nodes=3 print_config=false [system.ruby.network.topology.ext_links0] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links0.ext_node +ext_node=system.l1_cntrl0 int_node=0 latency=1 weight=1 -[system.ruby.network.topology.ext_links0.ext_node] -type=L1Cache_Controller -children=L2cacheMemory sequencer -L1DcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -L1IcacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -L2cacheMemory=system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory -buffer_size=0 -cache_response_latency=12 -issue_latency=2 -number_of_TBEs=256 -recycle_latency=10 -sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory] -type=RubyCache -assoc=2 -latency=15 -replacement_policy=PSEUDO_LRU -size=512 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer] -type=RubySequencer -children=dcache icache -dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache -deadlock_threshold=500000 -icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -max_outstanding_requests=16 -physmem=system.physmem -using_ruby_tester=true -version=0 -physMemPort=system.physmem.port[0] -port=root.cpuPort[0] - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - [system.ruby.network.topology.ext_links1] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links1.ext_node +ext_node=system.dir_cntrl0 int_node=1 latency=1 weight=1 -[system.ruby.network.topology.ext_links1.ext_node] -type=Directory_Controller -children=directory memBuffer -buffer_size=0 -directory=system.ruby.network.topology.ext_links1.ext_node.directory -memBuffer=system.ruby.network.topology.ext_links1.ext_node.memBuffer -memory_controller_latency=12 -number_of_TBEs=256 -recycle_latency=10 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.directory] -type=RubyDirectoryMemory -map_levels=4 -numa_high_bit=0 -size=134217728 -use_map=false -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.memBuffer] -type=RubyMemoryControl -bank_bit_0=8 -bank_busy_time=11 -bank_queue_size=12 -banks_per_rank=8 -basic_bus_busy_time=2 -dimm_bit_0=12 -dimms_per_channel=2 -mem_bus_cycle_multiplier=10 -mem_ctl_latency=12 -mem_fixed_delay=0 -mem_random_arbitrate=0 -rank_bit_0=11 -rank_rank_delay=1 -ranks_per_dimm=2 -read_write_delay=2 -refresh_period=1560 -tFaw=0 -version=0 - [system.ruby.network.topology.int_links0] type=IntLink bw_multiplier=16 diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats index ee96f0f1f..57c443be3 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats @@ -13,7 +13,7 @@ RubySystem config: Network Configuration --------------------- network: SIMPLE_NETWORK -topology: +topology: Crossbar virtual_net_0: active, ordered virtual_net_1: active, ordered @@ -34,29 +34,29 @@ periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ -Real time: Mar/18/2010 14:59:23 +Real time: Aug/05/2010 14:46:32 Profiler Stats -------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 +Elapsed_time_in_seconds: 0 +Elapsed_time_in_minutes: 0 +Elapsed_time_in_hours: 0 +Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.7 -Virtual_time_in_minutes: 0.0116667 -Virtual_time_in_hours: 0.000194444 -Virtual_time_in_days: 8.10185e-06 +Virtual_time_in_seconds: 0.69 +Virtual_time_in_minutes: 0.0115 +Virtual_time_in_hours: 0.000191667 +Virtual_time_in_days: 7.98611e-06 -Ruby_current_time: 222961 +Ruby_current_time: 213851 Ruby_start_time: 0 -Ruby_cycles: 222961 +Ruby_cycles: 213851 -mbytes_resident: 30.5156 -mbytes_total: 203.461 -resident_ratio: 0.150021 +mbytes_resident: 31.293 +mbytes_total: 31.3008 +resident_ratio: 1 -ruby_cycles_executed: [ 222962 ] +ruby_cycles_executed: [ 213852 ] Busy Controller Counts: L1Cache-0:0 @@ -65,13 +65,35 @@ Directory-0:0 Busy Bank Count:0 -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 998 average: 15.7946 | standard deviation: 1.13528 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 2 84 899 ] +sequencer_requests_outstanding: [binsize: 1 max: 16 count: 963 average: 15.8069 | standard deviation: 1.15034 | 0 1 1 1 1 1 1 1 1 1 1 1 1 1 2 65 883 ] All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- -miss_latency: [binsize: 128 max: 23668 count: 983 average: 3530.64 | standard deviation: 5276.54 | 101 19 29 85 80 66 72 59 50 28 40 22 22 14 14 10 5 3 6 7 5 5 2 3 4 1 2 1 1 1 0 2 0 1 2 0 0 0 1 1 1 3 0 1 1 1 0 1 0 1 0 1 0 3 2 0 1 2 2 2 3 1 3 2 2 4 4 3 1 2 0 3 1 1 0 4 4 3 0 3 2 0 0 0 3 3 3 2 2 0 1 2 2 5 6 1 9 3 2 3 2 3 3 2 3 8 2 2 2 3 2 3 5 4 1 4 1 1 0 4 3 3 1 3 4 1 1 3 0 1 0 1 0 0 1 2 0 0 1 0 1 0 1 0 1 0 1 2 1 0 0 1 1 2 2 0 1 0 1 0 0 1 0 2 0 0 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_2: [binsize: 128 max: 19690 count: 100 average: 3024.87 | standard deviation: 5133.9 | 15 3 2 5 6 12 9 4 5 2 7 1 5 2 1 0 2 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 2 1 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ] -miss_latency_3: [binsize: 128 max: 23668 count: 883 average: 3587.92 | standard deviation: 5292.25 | 86 16 27 80 74 54 63 55 45 26 33 21 17 12 13 10 3 3 5 7 5 4 2 3 4 1 2 1 1 1 0 2 0 1 1 0 0 0 1 1 1 3 0 1 1 1 0 1 0 1 0 1 0 3 2 0 1 2 2 2 3 1 3 2 2 4 4 3 0 2 0 3 1 1 0 4 4 3 0 3 2 0 0 0 2 2 3 2 2 0 1 2 2 5 6 1 9 3 2 1 2 3 3 2 3 6 1 2 2 3 1 3 5 4 1 4 1 1 0 3 2 3 1 3 3 1 1 2 0 1 0 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 2 0 1 0 1 0 0 1 0 2 0 0 1 0 1 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 ] +miss_latency: [binsize: 128 max: 23081 count: 948 average: 3529.13 | standard deviation: 5116.76 | 71 12 47 82 73 59 68 59 47 38 28 25 17 14 12 7 10 4 1 9 4 5 5 7 3 3 6 3 1 0 4 1 3 0 3 2 2 3 2 4 1 0 0 2 0 0 2 0 1 2 1 2 1 1 2 4 0 3 2 1 2 2 5 2 2 2 1 1 1 2 1 1 4 3 1 2 2 0 1 0 1 0 3 1 2 4 0 6 1 1 1 3 1 4 0 4 2 4 4 5 5 1 4 3 3 3 3 3 3 4 1 2 3 2 4 2 2 0 0 2 1 6 3 4 1 0 2 1 0 0 3 3 1 1 1 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 2 1 1 1 0 0 0 1 0 1 1 0 0 2 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 8 max: 1215 count: 59 average: 478.39 | standard deviation: 246.067 | 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 3 1 1 0 0 2 0 2 0 0 0 0 1 0 3 2 2 0 0 1 0 0 0 0 0 1 1 4 0 0 1 2 1 0 0 1 0 1 0 2 1 2 1 2 0 0 0 0 0 0 0 1 0 1 1 0 0 1 0 0 0 0 1 2 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD: [binsize: 128 max: 15642 count: 41 average: 3000.32 | standard deviation: 4886.74 | 5 0 3 6 1 3 2 3 3 2 1 1 0 0 0 2 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST: [binsize: 128 max: 23081 count: 848 average: 3766.95 | standard deviation: 5236.59 | 61 10 32 62 58 52 60 56 43 35 27 24 17 14 12 5 10 4 0 9 4 5 5 6 3 3 6 3 1 0 4 1 3 0 3 2 2 3 2 4 1 0 0 2 0 0 2 0 1 2 1 2 1 1 2 4 0 3 2 1 2 2 5 2 2 2 1 1 1 2 1 1 4 3 1 2 2 0 1 0 1 0 3 1 2 3 0 6 1 1 1 3 1 4 0 4 2 4 3 4 4 1 4 3 3 3 3 3 3 4 1 2 2 2 4 2 1 0 0 2 1 6 2 4 1 0 2 1 0 0 3 3 1 1 1 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 2 1 1 1 0 0 0 1 0 1 1 0 0 2 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_L1Cache: [binsize: 1 max: 118 count: 65 average: 15.8923 | standard deviation: 35.394 | 0 9 14 16 18 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 2 1 0 1 0 0 0 0 0 1 0 1 ] +miss_latency_L2Cache: [binsize: 128 max: 19544 count: 29 average: 3519.03 | standard deviation: 5619.12 | 6 2 1 4 1 2 1 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_Directory: [binsize: 128 max: 23081 count: 854 average: 3796.87 | standard deviation: 5197.84 | 0 10 46 78 72 57 67 59 47 38 27 25 16 14 12 7 10 3 1 9 4 5 5 6 3 3 5 3 1 0 4 1 3 0 3 2 2 2 2 3 1 0 0 2 0 0 2 0 1 2 1 2 1 1 2 4 0 3 2 1 2 2 5 2 2 2 1 1 1 2 1 1 4 3 1 2 2 0 1 0 1 0 3 1 2 4 0 6 1 1 1 3 1 4 0 4 2 3 4 5 4 1 4 3 3 3 3 3 3 3 1 2 3 2 4 2 2 0 0 2 1 6 3 4 1 0 2 0 0 0 3 3 1 1 1 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 2 1 0 1 0 0 0 1 0 1 1 0 0 2 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_wCC_Times: 0 +miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_dir_Times: 854 +miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 2 average: 2.5 | standard deviation: 1 | 0 0 1 1 ] +miss_latency_IFETCH_L2Cache: [binsize: 1 max: 123 count: 3 average: 50 | standard deviation: 63.2218 | 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH_Directory: [binsize: 8 max: 1215 count: 54 average: 519.815 | standard deviation: 213.139 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 2 3 1 1 0 0 2 0 2 0 0 0 0 1 0 3 2 2 0 0 1 0 0 0 0 0 1 1 4 0 0 1 2 1 0 0 1 0 1 0 2 1 2 1 2 0 0 0 0 0 0 0 1 0 1 1 0 0 1 0 0 0 0 1 2 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_LD_L1Cache: [binsize: 1 max: 4 count: 5 average: 3 | standard deviation: 0.707107 | 0 0 1 3 1 ] +miss_latency_LD_Directory: [binsize: 128 max: 15642 count: 36 average: 3416.61 | standard deviation: 5082.33 | 0 0 3 6 1 3 2 3 3 2 1 1 0 0 0 2 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_L1Cache: [binsize: 1 max: 118 count: 58 average: 17.4655 | standard deviation: 37.1906 | 0 9 12 12 17 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 2 1 0 1 0 0 0 0 0 1 0 1 ] +miss_latency_ST_L2Cache: [binsize: 128 max: 19544 count: 26 average: 3919.31 | standard deviation: 5809.69 | 3 2 1 4 1 2 1 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] +miss_latency_ST_Directory: [binsize: 128 max: 23081 count: 764 average: 4046.41 | standard deviation: 5309.16 | 0 8 31 58 57 50 59 56 43 35 26 24 16 14 12 5 10 3 0 9 4 5 5 5 3 3 5 3 1 0 4 1 3 0 3 2 2 2 2 3 1 0 0 2 0 0 2 0 1 2 1 2 1 1 2 4 0 3 2 1 2 2 5 2 2 2 1 1 1 2 1 1 4 3 1 2 2 0 1 0 1 0 3 1 2 3 0 6 1 1 1 3 1 4 0 4 2 3 3 4 3 1 4 3 3 3 3 3 3 3 1 2 2 2 4 2 1 0 0 2 1 6 2 4 1 0 2 0 0 0 3 3 1 1 1 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 2 1 0 1 0 0 0 1 0 1 1 0 0 2 0 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -103,8 +125,8 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 8816 -page_faults: 0 +page_reclaims: 6929 +page_faults: 1882 swaps: 0 block_inputs: 0 block_outputs: 0 @@ -112,451 +134,665 @@ block_outputs: 0 Network Stats ------------- +total_msg_count_Request_Control: 2568 20544 +total_msg_count_Response_Data: 2562 184464 +total_msg_count_Writeback_Data: 2281 164232 +total_msg_count_Writeback_Control: 5351 42808 +total_msg_count_Unblock_Control: 2559 20472 +total_msgs: 15321 total_bytes: 432520 + switch_0_inlinks: 2 switch_0_outlinks: 2 -links_utilized_percent_switch_0: 0.13187 - links_utilized_percent_switch_0_link_0: 0.0481867 bw: 640000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 0.215553 bw: 160000 base_latency: 1 +links_utilized_percent_switch_0: 0.13593 + links_utilized_percent_switch_0_link_0: 0.0498829 bw: 640000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 0.221977 bw: 160000 base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 860 61920 [ 0 0 0 0 860 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Writeback_Control: 855 6840 [ 0 0 0 855 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Request_Control: 860 6880 [ 0 0 860 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 773 55656 [ 0 0 0 0 0 773 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 937 7496 [ 0 0 855 0 0 82 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Unblock_Control: 858 6864 [ 0 0 0 0 0 858 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 854 61488 [ 0 0 0 0 854 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Writeback_Control: 848 6784 [ 0 0 0 848 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Request_Control: 856 6848 [ 0 0 856 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 761 54792 [ 0 0 0 0 0 761 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 936 7488 [ 0 0 849 0 0 87 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Unblock_Control: 853 6824 [ 0 0 0 0 0 853 0 0 0 0 ] base_latency: 1 switch_1_inlinks: 2 switch_1_outlinks: 2 -links_utilized_percent_switch_1: 0.123292 - links_utilized_percent_switch_1_link_0: 0.0538379 bw: 640000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 0.192747 bw: 160000 base_latency: 1 +links_utilized_percent_switch_1: 0.127495 + links_utilized_percent_switch_1_link_0: 0.0554358 bw: 640000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 0.199555 bw: 160000 base_latency: 1 - outgoing_messages_switch_1_link_0_Request_Control: 860 6880 [ 0 0 860 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Data: 772 55584 [ 0 0 0 0 0 772 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Writeback_Control: 937 7496 [ 0 0 855 0 0 82 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Unblock_Control: 858 6864 [ 0 0 0 0 0 858 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 860 61920 [ 0 0 0 0 860 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 855 6840 [ 0 0 0 855 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Request_Control: 856 6848 [ 0 0 856 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Data: 760 54720 [ 0 0 0 0 0 760 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Writeback_Control: 935 7480 [ 0 0 849 0 0 86 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Unblock_Control: 853 6824 [ 0 0 0 0 0 853 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 854 61488 [ 0 0 0 0 854 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 849 6792 [ 0 0 0 849 0 0 0 0 0 0 ] base_latency: 1 switch_2_inlinks: 2 switch_2_outlinks: 2 -links_utilized_percent_switch_2: 0.20415 - links_utilized_percent_switch_2_link_0: 0.192747 bw: 160000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 0.215553 bw: 160000 base_latency: 1 - - outgoing_messages_switch_2_link_0_Response_Data: 860 61920 [ 0 0 0 0 860 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Writeback_Control: 855 6840 [ 0 0 0 855 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Request_Control: 860 6880 [ 0 0 860 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Data: 773 55656 [ 0 0 0 0 0 773 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Control: 937 7496 [ 0 0 855 0 0 82 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Unblock_Control: 858 6864 [ 0 0 0 0 0 858 0 0 0 0 ] base_latency: 1 - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_misses: 889 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_demand_misses: 889 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_type_LD: 9.67379% - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_type_ST: 90.3262% - - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_access_mode_type_SupervisorMode: 889 100% - system.ruby.network.topology.ext_links0.ext_node.sequencer.dcache_request_size: [binsize: 1 max: 4 count: 889 average: 1.29021 | standard deviation: 0.887856 | 0 803 0 0 86 ] - -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_total_misses: 860 - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_total_demand_misses: 860 - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_total_hw_prefetches: 0 - - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_request_type_LD: 9.76744% - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_request_type_ST: 90.2326% - - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_access_mode_type_SupervisorMode: 860 100% - system.ruby.network.topology.ext_links0.ext_node.L2cacheMemory_request_size: [binsize: 1 max: 4 count: 860 average: 1.29302 | standard deviation: 0.89169 | 0 776 0 0 84 ] - - --- L1Cache 0 --- +links_utilized_percent_switch_2: 0.210637 + links_utilized_percent_switch_2_link_0: 0.199531 bw: 160000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 0.221743 bw: 160000 base_latency: 1 + + outgoing_messages_switch_2_link_0_Response_Data: 854 61488 [ 0 0 0 0 854 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 848 6784 [ 0 0 0 848 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Request_Control: 856 6848 [ 0 0 856 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Data: 760 54720 [ 0 0 0 0 0 760 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Writeback_Control: 935 7480 [ 0 0 849 0 0 86 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Unblock_Control: 853 6824 [ 0 0 0 0 0 853 0 0 0 0 ] base_latency: 1 + +Cache Stats: system.l1_cntrl0.sequencer.icache + system.l1_cntrl0.sequencer.icache_total_misses: 57 + system.l1_cntrl0.sequencer.icache_total_demand_misses: 57 + system.l1_cntrl0.sequencer.icache_total_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_hw_prefetches: 0 + + system.l1_cntrl0.sequencer.icache_request_type_IFETCH: 100% + + system.l1_cntrl0.sequencer.icache_access_mode_type_SupervisorMode: 57 100% + +Cache Stats: system.l1_cntrl0.sequencer.dcache + system.l1_cntrl0.sequencer.dcache_total_misses: 840 + system.l1_cntrl0.sequencer.dcache_total_demand_misses: 840 + system.l1_cntrl0.sequencer.dcache_total_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.dcache_total_hw_prefetches: 0 + + system.l1_cntrl0.sequencer.dcache_request_type_LD: 4.28571% + system.l1_cntrl0.sequencer.dcache_request_type_ST: 95.7143% + + system.l1_cntrl0.sequencer.dcache_access_mode_type_SupervisorMode: 840 100% + +Cache Stats: system.l1_cntrl0.L2cacheMemory + system.l1_cntrl0.L2cacheMemory_total_misses: 856 + system.l1_cntrl0.L2cacheMemory_total_demand_misses: 856 + system.l1_cntrl0.L2cacheMemory_total_prefetches: 0 + system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0 + system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0 + + system.l1_cntrl0.L2cacheMemory_request_type_LD: 4.20561% + system.l1_cntrl0.L2cacheMemory_request_type_ST: 89.486% + system.l1_cntrl0.L2cacheMemory_request_type_IFETCH: 6.30841% + + system.l1_cntrl0.L2cacheMemory_access_mode_type_SupervisorMode: 856 100% + + --- L1Cache --- - Event Counts - -Load 100 -Ifetch 0 -Store 887 -L2_Replacement 855 -L1_to_L2 318465 -L2_to_L1D 29 -L2_to_L1I 0 -Other_GETX 0 -Other_GETS 0 -Ack 0 -Shared_Ack 0 -Data 0 -Shared_Data 0 -Exclusive_Data 860 -Writeback_Ack 855 -Writeback_Nack 0 -All_acks 0 -All_acks_no_sharers 859 +Load [41 ] 41 +Ifetch [106 ] 106 +Store [906 ] 906 +L2_Replacement [849 ] 849 +L1_to_L2 [303164 ] 303164 +Trigger_L2_to_L1D [38 ] 38 +Trigger_L2_to_L1I [3 ] 3 +Complete_L2_to_L1 [41 ] 41 +Other_GETX [0 ] 0 +Other_GETS [0 ] 0 +Merged_GETS [0 ] 0 +Other_GETS_No_Mig [0 ] 0 +Invalidate [0 ] 0 +Ack [0 ] 0 +Shared_Ack [0 ] 0 +Data [0 ] 0 +Shared_Data [0 ] 0 +Exclusive_Data [854 ] 854 +Writeback_Ack [848 ] 848 +Writeback_Nack [0 ] 0 +All_acks [0 ] 0 +All_acks_no_sharers [853 ] 853 - Transitions - -I Load 84 -I Ifetch 0 <-- -I Store 776 -I L2_Replacement 0 <-- -I L1_to_L2 0 <-- -I L2_to_L1D 0 <-- -I L2_to_L1I 0 <-- -I Other_GETX 0 <-- -I Other_GETS 0 <-- - -S Load 0 <-- -S Ifetch 0 <-- -S Store 0 <-- -S L2_Replacement 0 <-- -S L1_to_L2 0 <-- -S L2_to_L1D 0 <-- -S L2_to_L1I 0 <-- -S Other_GETX 0 <-- -S Other_GETS 0 <-- - -O Load 0 <-- -O Ifetch 0 <-- -O Store 0 <-- -O L2_Replacement 0 <-- -O L1_to_L2 0 <-- -O L2_to_L1D 0 <-- -O L2_to_L1I 0 <-- -O Other_GETX 0 <-- -O Other_GETS 0 <-- - -M Load 0 <-- -M Ifetch 0 <-- -M Store 1 -M L2_Replacement 82 -M L1_to_L2 82 -M L2_to_L1D 0 <-- -M L2_to_L1I 0 <-- -M Other_GETX 0 <-- -M Other_GETS 0 <-- - -MM Load 16 -MM Ifetch 0 <-- -MM Store 102 -MM L2_Replacement 773 -MM L1_to_L2 804 -MM L2_to_L1D 29 -MM L2_to_L1I 0 <-- -MM Other_GETX 0 <-- -MM Other_GETS 0 <-- - -IM Load 0 <-- -IM Ifetch 0 <-- -IM Store 0 <-- -IM L2_Replacement 0 <-- -IM L1_to_L2 276294 -IM Other_GETX 0 <-- -IM Other_GETS 0 <-- -IM Ack 0 <-- -IM Data 0 <-- -IM Exclusive_Data 776 - -SM Load 0 <-- -SM Ifetch 0 <-- -SM Store 0 <-- -SM L2_Replacement 0 <-- -SM L1_to_L2 0 <-- -SM Other_GETX 0 <-- -SM Other_GETS 0 <-- -SM Ack 0 <-- -SM Data 0 <-- - -OM Load 0 <-- -OM Ifetch 0 <-- -OM Store 0 <-- -OM L2_Replacement 0 <-- -OM L1_to_L2 0 <-- -OM Other_GETX 0 <-- -OM Other_GETS 0 <-- -OM Ack 0 <-- -OM All_acks 0 <-- -OM All_acks_no_sharers 0 <-- - -ISM Load 0 <-- -ISM Ifetch 0 <-- -ISM Store 0 <-- -ISM L2_Replacement 0 <-- -ISM L1_to_L2 0 <-- -ISM Ack 0 <-- -ISM All_acks_no_sharers 0 <-- - -M_W Load 0 <-- -M_W Ifetch 0 <-- -M_W Store 0 <-- -M_W L2_Replacement 0 <-- -M_W L1_to_L2 1192 -M_W Ack 0 <-- -M_W All_acks_no_sharers 83 - -MM_W Load 0 <-- -MM_W Ifetch 0 <-- -MM_W Store 4 -MM_W L2_Replacement 0 <-- -MM_W L1_to_L2 11046 -MM_W Ack 0 <-- -MM_W All_acks_no_sharers 776 - -IS Load 0 <-- -IS Ifetch 0 <-- -IS Store 0 <-- -IS L2_Replacement 0 <-- -IS L1_to_L2 29047 -IS Other_GETX 0 <-- -IS Other_GETS 0 <-- -IS Ack 0 <-- -IS Shared_Ack 0 <-- -IS Data 0 <-- -IS Shared_Data 0 <-- -IS Exclusive_Data 84 - -SS Load 0 <-- -SS Ifetch 0 <-- -SS Store 0 <-- -SS L2_Replacement 0 <-- -SS L1_to_L2 0 <-- -SS Ack 0 <-- -SS Shared_Ack 0 <-- -SS All_acks 0 <-- -SS All_acks_no_sharers 0 <-- - -OI Load 0 <-- -OI Ifetch 0 <-- -OI Store 0 <-- -OI L2_Replacement 0 <-- -OI L1_to_L2 0 <-- -OI Other_GETX 0 <-- -OI Other_GETS 0 <-- -OI Writeback_Ack 0 <-- - -MI Load 0 <-- -MI Ifetch 0 <-- -MI Store 4 -MI L2_Replacement 0 <-- -MI L1_to_L2 0 <-- -MI Other_GETX 0 <-- -MI Other_GETS 0 <-- -MI Writeback_Ack 855 - -II Load 0 <-- -II Ifetch 0 <-- -II Store 0 <-- -II L2_Replacement 0 <-- -II L1_to_L2 0 <-- -II Other_GETX 0 <-- -II Other_GETS 0 <-- -II Writeback_Ack 0 <-- -II Writeback_Nack 0 <-- - -Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer: - memory_total_requests: 1632 - memory_reads: 860 - memory_writes: 772 - memory_refreshes: 465 - memory_total_request_delays: 1106 - memory_delays_per_request: 0.677696 - memory_delays_in_input_queue: 152 - memory_delays_behind_head_of_bank_queue: 0 - memory_delays_stalled_at_head_of_bank_queue: 954 - memory_stalls_for_bank_busy: 245 +I Load [36 ] 36 +I Ifetch [54 ] 54 +I Store [766 ] 766 +I L2_Replacement [0 ] 0 +I L1_to_L2 [0 ] 0 +I Trigger_L2_to_L1D [0 ] 0 +I Trigger_L2_to_L1I [0 ] 0 +I Other_GETX [0 ] 0 +I Other_GETS [0 ] 0 +I Other_GETS_No_Mig [0 ] 0 +I Invalidate [0 ] 0 + +S Load [0 ] 0 +S Ifetch [0 ] 0 +S Store [0 ] 0 +S L2_Replacement [0 ] 0 +S L1_to_L2 [0 ] 0 +S Trigger_L2_to_L1D [0 ] 0 +S Trigger_L2_to_L1I [0 ] 0 +S Other_GETX [0 ] 0 +S Other_GETS [0 ] 0 +S Other_GETS_No_Mig [0 ] 0 +S Invalidate [0 ] 0 + +O Load [0 ] 0 +O Ifetch [0 ] 0 +O Store [0 ] 0 +O L2_Replacement [0 ] 0 +O L1_to_L2 [0 ] 0 +O Trigger_L2_to_L1D [0 ] 0 +O Trigger_L2_to_L1I [0 ] 0 +O Other_GETX [0 ] 0 +O Other_GETS [0 ] 0 +O Merged_GETS [0 ] 0 +O Other_GETS_No_Mig [0 ] 0 +O Invalidate [0 ] 0 + +M Load [0 ] 0 +M Ifetch [1 ] 1 +M Store [1 ] 1 +M L2_Replacement [87 ] 87 +M L1_to_L2 [88 ] 88 +M Trigger_L2_to_L1D [1 ] 1 +M Trigger_L2_to_L1I [0 ] 0 +M Other_GETX [0 ] 0 +M Other_GETS [0 ] 0 +M Merged_GETS [0 ] 0 +M Other_GETS_No_Mig [0 ] 0 +M Invalidate [0 ] 0 + +MM Load [5 ] 5 +MM Ifetch [4 ] 4 +MM Store [82 ] 82 +MM L2_Replacement [762 ] 762 +MM L1_to_L2 [804 ] 804 +MM Trigger_L2_to_L1D [37 ] 37 +MM Trigger_L2_to_L1I [3 ] 3 +MM Other_GETX [0 ] 0 +MM Other_GETS [0 ] 0 +MM Merged_GETS [0 ] 0 +MM Other_GETS_No_Mig [0 ] 0 +MM Invalidate [0 ] 0 + +IM Load [0 ] 0 +IM Ifetch [0 ] 0 +IM Store [0 ] 0 +IM L2_Replacement [0 ] 0 +IM L1_to_L2 [275518 ] 275518 +IM Other_GETX [0 ] 0 +IM Other_GETS [0 ] 0 +IM Other_GETS_No_Mig [0 ] 0 +IM Invalidate [0 ] 0 +IM Ack [0 ] 0 +IM Data [0 ] 0 +IM Exclusive_Data [764 ] 764 + +SM Load [0 ] 0 +SM Ifetch [0 ] 0 +SM Store [0 ] 0 +SM L2_Replacement [0 ] 0 +SM L1_to_L2 [0 ] 0 +SM Other_GETX [0 ] 0 +SM Other_GETS [0 ] 0 +SM Other_GETS_No_Mig [0 ] 0 +SM Invalidate [0 ] 0 +SM Ack [0 ] 0 +SM Data [0 ] 0 + +OM Load [0 ] 0 +OM Ifetch [0 ] 0 +OM Store [0 ] 0 +OM L2_Replacement [0 ] 0 +OM L1_to_L2 [0 ] 0 +OM Other_GETX [0 ] 0 +OM Other_GETS [0 ] 0 +OM Merged_GETS [0 ] 0 +OM Other_GETS_No_Mig [0 ] 0 +OM Invalidate [0 ] 0 +OM Ack [0 ] 0 +OM All_acks [0 ] 0 +OM All_acks_no_sharers [0 ] 0 + +ISM Load [0 ] 0 +ISM Ifetch [0 ] 0 +ISM Store [0 ] 0 +ISM L2_Replacement [0 ] 0 +ISM L1_to_L2 [0 ] 0 +ISM Ack [0 ] 0 +ISM All_acks_no_sharers [0 ] 0 + +M_W Load [0 ] 0 +M_W Ifetch [0 ] 0 +M_W Store [0 ] 0 +M_W L2_Replacement [0 ] 0 +M_W L1_to_L2 [483 ] 483 +M_W Ack [0 ] 0 +M_W All_acks_no_sharers [89 ] 89 + +MM_W Load [0 ] 0 +MM_W Ifetch [0 ] 0 +MM_W Store [1 ] 1 +MM_W L2_Replacement [0 ] 0 +MM_W L1_to_L2 [10887 ] 10887 +MM_W Ack [0 ] 0 +MM_W All_acks_no_sharers [764 ] 764 + +IS Load [0 ] 0 +IS Ifetch [0 ] 0 +IS Store [0 ] 0 +IS L2_Replacement [0 ] 0 +IS L1_to_L2 [14644 ] 14644 +IS Other_GETX [0 ] 0 +IS Other_GETS [0 ] 0 +IS Other_GETS_No_Mig [0 ] 0 +IS Invalidate [0 ] 0 +IS Ack [0 ] 0 +IS Shared_Ack [0 ] 0 +IS Data [0 ] 0 +IS Shared_Data [0 ] 0 +IS Exclusive_Data [90 ] 90 + +SS Load [0 ] 0 +SS Ifetch [0 ] 0 +SS Store [0 ] 0 +SS L2_Replacement [0 ] 0 +SS L1_to_L2 [0 ] 0 +SS Ack [0 ] 0 +SS Shared_Ack [0 ] 0 +SS All_acks [0 ] 0 +SS All_acks_no_sharers [0 ] 0 + +OI Load [0 ] 0 +OI Ifetch [0 ] 0 +OI Store [0 ] 0 +OI L2_Replacement [0 ] 0 +OI L1_to_L2 [0 ] 0 +OI Other_GETX [0 ] 0 +OI Other_GETS [0 ] 0 +OI Merged_GETS [0 ] 0 +OI Other_GETS_No_Mig [0 ] 0 +OI Invalidate [0 ] 0 +OI Writeback_Ack [0 ] 0 + +MI Load [0 ] 0 +MI Ifetch [36 ] 36 +MI Store [5 ] 5 +MI L2_Replacement [0 ] 0 +MI L1_to_L2 [0 ] 0 +MI Other_GETX [0 ] 0 +MI Other_GETS [0 ] 0 +MI Merged_GETS [0 ] 0 +MI Other_GETS_No_Mig [0 ] 0 +MI Invalidate [0 ] 0 +MI Writeback_Ack [848 ] 848 + +II Load [0 ] 0 +II Ifetch [0 ] 0 +II Store [0 ] 0 +II L2_Replacement [0 ] 0 +II L1_to_L2 [0 ] 0 +II Other_GETX [0 ] 0 +II Other_GETS [0 ] 0 +II Other_GETS_No_Mig [0 ] 0 +II Invalidate [0 ] 0 +II Writeback_Ack [0 ] 0 +II Writeback_Nack [0 ] 0 + +IT Load [0 ] 0 +IT Ifetch [0 ] 0 +IT Store [0 ] 0 +IT L2_Replacement [0 ] 0 +IT L1_to_L2 [0 ] 0 +IT Complete_L2_to_L1 [0 ] 0 +IT Other_GETX [0 ] 0 +IT Other_GETS [0 ] 0 +IT Merged_GETS [0 ] 0 +IT Other_GETS_No_Mig [0 ] 0 +IT Invalidate [0 ] 0 + +ST Load [0 ] 0 +ST Ifetch [0 ] 0 +ST Store [0 ] 0 +ST L2_Replacement [0 ] 0 +ST L1_to_L2 [0 ] 0 +ST Complete_L2_to_L1 [0 ] 0 +ST Other_GETX [0 ] 0 +ST Other_GETS [0 ] 0 +ST Merged_GETS [0 ] 0 +ST Other_GETS_No_Mig [0 ] 0 +ST Invalidate [0 ] 0 + +OT Load [0 ] 0 +OT Ifetch [0 ] 0 +OT Store [0 ] 0 +OT L2_Replacement [0 ] 0 +OT L1_to_L2 [0 ] 0 +OT Complete_L2_to_L1 [0 ] 0 +OT Other_GETX [0 ] 0 +OT Other_GETS [0 ] 0 +OT Merged_GETS [0 ] 0 +OT Other_GETS_No_Mig [0 ] 0 +OT Invalidate [0 ] 0 + +MT Load [0 ] 0 +MT Ifetch [0 ] 0 +MT Store [10 ] 10 +MT L2_Replacement [0 ] 0 +MT L1_to_L2 [154 ] 154 +MT Complete_L2_to_L1 [1 ] 1 +MT Other_GETX [0 ] 0 +MT Other_GETS [0 ] 0 +MT Merged_GETS [0 ] 0 +MT Other_GETS_No_Mig [0 ] 0 +MT Invalidate [0 ] 0 + +MMT Load [0 ] 0 +MMT Ifetch [11 ] 11 +MMT Store [41 ] 41 +MMT L2_Replacement [0 ] 0 +MMT L1_to_L2 [586 ] 586 +MMT Complete_L2_to_L1 [40 ] 40 +MMT Other_GETX [0 ] 0 +MMT Other_GETS [0 ] 0 +MMT Merged_GETS [0 ] 0 +MMT Other_GETS_No_Mig [0 ] 0 +MMT Invalidate [0 ] 0 + +Cache Stats: system.dir_cntrl0.probeFilter + system.dir_cntrl0.probeFilter_total_misses: 0 + system.dir_cntrl0.probeFilter_total_demand_misses: 0 + system.dir_cntrl0.probeFilter_total_prefetches: 0 + system.dir_cntrl0.probeFilter_total_sw_prefetches: 0 + system.dir_cntrl0.probeFilter_total_hw_prefetches: 0 + + +Memory controller: system.dir_cntrl0.memBuffer: + memory_total_requests: 1616 + memory_reads: 856 + memory_writes: 760 + memory_refreshes: 446 + memory_total_request_delays: 1108 + memory_delays_per_request: 0.685644 + memory_delays_in_input_queue: 161 + memory_delays_behind_head_of_bank_queue: 2 + memory_delays_stalled_at_head_of_bank_queue: 945 + memory_stalls_for_bank_busy: 192 memory_stalls_for_random_busy: 0 memory_stalls_for_anti_starvation: 0 - memory_stalls_for_arbitration: 77 - memory_stalls_for_bus: 374 + memory_stalls_for_arbitration: 83 + memory_stalls_for_bus: 395 memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 150 - memory_stalls_for_read_read_turnaround: 108 - accesses_per_bank: 35 39 45 95 73 66 68 49 65 50 44 55 48 35 48 57 45 44 54 56 48 27 42 58 48 39 39 44 54 55 48 59 + memory_stalls_for_read_write_turnaround: 154 + memory_stalls_for_read_read_turnaround: 121 + accesses_per_bank: 34 44 48 84 67 62 61 53 41 30 54 49 46 47 41 52 49 35 67 45 67 44 44 46 55 52 53 50 44 47 56 49 - --- Directory 0 --- + --- Directory --- - Event Counts - -GETX 809 -GETS 84 -PUT 1454 -Unblock 858 -Writeback_Clean 0 -Writeback_Dirty 0 -Writeback_Exclusive_Clean 82 -Writeback_Exclusive_Dirty 772 -DMA_READ 0 -DMA_WRITE 0 -Memory_Data 860 -Memory_Ack 772 -Ack 0 -Shared_Ack 0 -Shared_Data 0 -Exclusive_Data 0 -All_acks_and_data 0 -All_acks_and_data_no_sharers 0 +GETX [770 ] 770 +GETS [91 ] 91 +PUT [909 ] 909 +Unblock [0 ] 0 +UnblockS [0 ] 0 +UnblockM [853 ] 853 +Writeback_Clean [0 ] 0 +Writeback_Dirty [0 ] 0 +Writeback_Exclusive_Clean [86 ] 86 +Writeback_Exclusive_Dirty [760 ] 760 +Pf_Replacement [0 ] 0 +DMA_READ [0 ] 0 +DMA_WRITE [0 ] 0 +Memory_Data [854 ] 854 +Memory_Ack [760 ] 760 +Ack [0 ] 0 +Shared_Ack [0 ] 0 +Shared_Data [0 ] 0 +Data [0 ] 0 +Exclusive_Data [0 ] 0 +All_acks_and_shared_data [0 ] 0 +All_acks_and_owner_data [0 ] 0 +All_acks_and_data_no_sharers [0 ] 0 +All_Unblocks [0 ] 0 - Transitions - -NO GETX 0 <-- -NO GETS 0 <-- -NO PUT 855 -NO DMA_READ 0 <-- -NO DMA_WRITE 0 <-- - -O GETX 0 <-- -O GETS 0 <-- -O PUT 0 <-- -O DMA_READ 0 <-- -O DMA_WRITE 0 <-- - -E GETX 776 -E GETS 84 -E PUT 0 <-- -E DMA_READ 0 <-- -E DMA_WRITE 0 <-- - -NO_B GETX 0 <-- -NO_B GETS 0 <-- -NO_B PUT 599 -NO_B Unblock 858 -NO_B DMA_READ 0 <-- -NO_B DMA_WRITE 0 <-- - -O_B GETX 0 <-- -O_B GETS 0 <-- -O_B PUT 0 <-- -O_B Unblock 0 <-- -O_B DMA_READ 0 <-- -O_B DMA_WRITE 0 <-- - -NO_B_W GETX 0 <-- -NO_B_W GETS 0 <-- -NO_B_W PUT 0 <-- -NO_B_W Unblock 0 <-- -NO_B_W DMA_READ 0 <-- -NO_B_W DMA_WRITE 0 <-- -NO_B_W Memory_Data 860 - -O_B_W GETX 0 <-- -O_B_W GETS 0 <-- -O_B_W PUT 0 <-- -O_B_W Unblock 0 <-- -O_B_W DMA_READ 0 <-- -O_B_W DMA_WRITE 0 <-- -O_B_W Memory_Data 0 <-- - -NO_W GETX 0 <-- -NO_W GETS 0 <-- -NO_W PUT 0 <-- -NO_W DMA_READ 0 <-- -NO_W DMA_WRITE 0 <-- -NO_W Memory_Data 0 <-- - -O_W GETX 0 <-- -O_W GETS 0 <-- -O_W PUT 0 <-- -O_W DMA_READ 0 <-- -O_W DMA_WRITE 0 <-- -O_W Memory_Data 0 <-- - -NO_DW_B_W GETX 0 <-- -NO_DW_B_W GETS 0 <-- -NO_DW_B_W PUT 0 <-- -NO_DW_B_W DMA_READ 0 <-- -NO_DW_B_W DMA_WRITE 0 <-- -NO_DW_B_W Ack 0 <-- -NO_DW_B_W Exclusive_Data 0 <-- -NO_DW_B_W All_acks_and_data_no_sharers 0 <-- - -NO_DR_B_W GETX 0 <-- -NO_DR_B_W GETS 0 <-- -NO_DR_B_W PUT 0 <-- -NO_DR_B_W DMA_READ 0 <-- -NO_DR_B_W DMA_WRITE 0 <-- -NO_DR_B_W Memory_Data 0 <-- -NO_DR_B_W Ack 0 <-- -NO_DR_B_W Shared_Ack 0 <-- -NO_DR_B_W Shared_Data 0 <-- -NO_DR_B_W Exclusive_Data 0 <-- - -NO_DR_B_D GETX 0 <-- -NO_DR_B_D GETS 0 <-- -NO_DR_B_D PUT 0 <-- -NO_DR_B_D DMA_READ 0 <-- -NO_DR_B_D DMA_WRITE 0 <-- -NO_DR_B_D Ack 0 <-- -NO_DR_B_D Shared_Ack 0 <-- -NO_DR_B_D Shared_Data 0 <-- -NO_DR_B_D Exclusive_Data 0 <-- -NO_DR_B_D All_acks_and_data 0 <-- -NO_DR_B_D All_acks_and_data_no_sharers 0 <-- - -NO_DR_B GETX 0 <-- -NO_DR_B GETS 0 <-- -NO_DR_B PUT 0 <-- -NO_DR_B DMA_READ 0 <-- -NO_DR_B DMA_WRITE 0 <-- -NO_DR_B Ack 0 <-- -NO_DR_B Shared_Ack 0 <-- -NO_DR_B Shared_Data 0 <-- -NO_DR_B Exclusive_Data 0 <-- -NO_DR_B All_acks_and_data 0 <-- -NO_DR_B All_acks_and_data_no_sharers 0 <-- - -NO_DW_W GETX 0 <-- -NO_DW_W GETS 0 <-- -NO_DW_W PUT 0 <-- -NO_DW_W DMA_READ 0 <-- -NO_DW_W DMA_WRITE 0 <-- -NO_DW_W Memory_Ack 0 <-- - -O_DR_B_W GETX 0 <-- -O_DR_B_W GETS 0 <-- -O_DR_B_W PUT 0 <-- -O_DR_B_W DMA_READ 0 <-- -O_DR_B_W DMA_WRITE 0 <-- -O_DR_B_W Memory_Data 0 <-- - -O_DR_B GETX 0 <-- -O_DR_B GETS 0 <-- -O_DR_B PUT 0 <-- -O_DR_B DMA_READ 0 <-- -O_DR_B DMA_WRITE 0 <-- -O_DR_B Ack 0 <-- -O_DR_B All_acks_and_data_no_sharers 0 <-- - -WB GETX 0 <-- -WB GETS 0 <-- -WB PUT 0 <-- -WB Unblock 0 <-- -WB Writeback_Clean 0 <-- -WB Writeback_Dirty 0 <-- -WB Writeback_Exclusive_Clean 82 -WB Writeback_Exclusive_Dirty 772 -WB DMA_READ 0 <-- -WB DMA_WRITE 0 <-- - -WB_O_W GETX 0 <-- -WB_O_W GETS 0 <-- -WB_O_W PUT 0 <-- -WB_O_W DMA_READ 0 <-- -WB_O_W DMA_WRITE 0 <-- -WB_O_W Memory_Ack 0 <-- - -WB_E_W GETX 33 -WB_E_W GETS 0 <-- -WB_E_W PUT 0 <-- -WB_E_W DMA_READ 0 <-- -WB_E_W DMA_WRITE 0 <-- -WB_E_W Memory_Ack 772 - +NX GETX [0 ] 0 +NX GETS [0 ] 0 +NX PUT [0 ] 0 +NX Pf_Replacement [0 ] 0 +NX DMA_READ [0 ] 0 +NX DMA_WRITE [0 ] 0 + +NO GETX [0 ] 0 +NO GETS [0 ] 0 +NO PUT [849 ] 849 +NO Pf_Replacement [0 ] 0 +NO DMA_READ [0 ] 0 +NO DMA_WRITE [0 ] 0 + +S GETX [0 ] 0 +S GETS [0 ] 0 +S PUT [0 ] 0 +S Pf_Replacement [0 ] 0 +S DMA_READ [0 ] 0 +S DMA_WRITE [0 ] 0 + +O GETX [0 ] 0 +O GETS [0 ] 0 +O PUT [0 ] 0 +O Pf_Replacement [0 ] 0 +O DMA_READ [0 ] 0 +O DMA_WRITE [0 ] 0 + +E GETX [766 ] 766 +E GETS [90 ] 90 +E PUT [0 ] 0 +E DMA_READ [0 ] 0 +E DMA_WRITE [0 ] 0 + +O_R GETX [0 ] 0 +O_R GETS [0 ] 0 +O_R PUT [0 ] 0 +O_R Pf_Replacement [0 ] 0 +O_R DMA_READ [0 ] 0 +O_R DMA_WRITE [0 ] 0 +O_R Ack [0 ] 0 +O_R All_acks_and_data_no_sharers [0 ] 0 + +S_R GETX [0 ] 0 +S_R GETS [0 ] 0 +S_R PUT [0 ] 0 +S_R Pf_Replacement [0 ] 0 +S_R DMA_READ [0 ] 0 +S_R DMA_WRITE [0 ] 0 +S_R Ack [0 ] 0 +S_R Data [0 ] 0 +S_R All_acks_and_data_no_sharers [0 ] 0 + +NO_R GETX [0 ] 0 +NO_R GETS [0 ] 0 +NO_R PUT [0 ] 0 +NO_R Pf_Replacement [0 ] 0 +NO_R DMA_READ [0 ] 0 +NO_R DMA_WRITE [0 ] 0 +NO_R Ack [0 ] 0 +NO_R Data [0 ] 0 +NO_R Exclusive_Data [0 ] 0 +NO_R All_acks_and_data_no_sharers [0 ] 0 + +NO_B GETX [0 ] 0 +NO_B GETS [0 ] 0 +NO_B PUT [60 ] 60 +NO_B UnblockS [0 ] 0 +NO_B UnblockM [853 ] 853 +NO_B Pf_Replacement [0 ] 0 +NO_B DMA_READ [0 ] 0 +NO_B DMA_WRITE [0 ] 0 + +NO_B_X GETX [0 ] 0 +NO_B_X GETS [0 ] 0 +NO_B_X PUT [0 ] 0 +NO_B_X UnblockS [0 ] 0 +NO_B_X UnblockM [0 ] 0 +NO_B_X Pf_Replacement [0 ] 0 + +NO_B_S GETX [0 ] 0 +NO_B_S GETS [0 ] 0 +NO_B_S PUT [0 ] 0 +NO_B_S UnblockS [0 ] 0 +NO_B_S UnblockM [0 ] 0 +NO_B_S Pf_Replacement [0 ] 0 +NO_B_S DMA_READ [0 ] 0 +NO_B_S DMA_WRITE [0 ] 0 + +NO_B_S_W GETX [0 ] 0 +NO_B_S_W GETS [0 ] 0 +NO_B_S_W PUT [0 ] 0 +NO_B_S_W UnblockS [0 ] 0 +NO_B_S_W Pf_Replacement [0 ] 0 +NO_B_S_W DMA_READ [0 ] 0 +NO_B_S_W DMA_WRITE [0 ] 0 +NO_B_S_W All_Unblocks [0 ] 0 + +O_B GETX [0 ] 0 +O_B GETS [0 ] 0 +O_B PUT [0 ] 0 +O_B UnblockS [0 ] 0 +O_B Pf_Replacement [0 ] 0 +O_B DMA_READ [0 ] 0 +O_B DMA_WRITE [0 ] 0 + +NO_B_W GETX [0 ] 0 +NO_B_W GETS [0 ] 0 +NO_B_W PUT [0 ] 0 +NO_B_W UnblockS [0 ] 0 +NO_B_W UnblockM [0 ] 0 +NO_B_W Pf_Replacement [0 ] 0 +NO_B_W DMA_READ [0 ] 0 +NO_B_W DMA_WRITE [0 ] 0 +NO_B_W Memory_Data [854 ] 854 + +O_B_W GETX [0 ] 0 +O_B_W GETS [0 ] 0 +O_B_W PUT [0 ] 0 +O_B_W UnblockS [0 ] 0 +O_B_W Pf_Replacement [0 ] 0 +O_B_W DMA_READ [0 ] 0 +O_B_W DMA_WRITE [0 ] 0 +O_B_W Memory_Data [0 ] 0 + +NO_W GETX [0 ] 0 +NO_W GETS [0 ] 0 +NO_W PUT [0 ] 0 +NO_W Pf_Replacement [0 ] 0 +NO_W DMA_READ [0 ] 0 +NO_W DMA_WRITE [0 ] 0 +NO_W Memory_Data [0 ] 0 + +O_W GETX [0 ] 0 +O_W GETS [0 ] 0 +O_W PUT [0 ] 0 +O_W Pf_Replacement [0 ] 0 +O_W DMA_READ [0 ] 0 +O_W DMA_WRITE [0 ] 0 +O_W Memory_Data [0 ] 0 + +NO_DW_B_W GETX [0 ] 0 +NO_DW_B_W GETS [0 ] 0 +NO_DW_B_W PUT [0 ] 0 +NO_DW_B_W Pf_Replacement [0 ] 0 +NO_DW_B_W DMA_READ [0 ] 0 +NO_DW_B_W DMA_WRITE [0 ] 0 +NO_DW_B_W Ack [0 ] 0 +NO_DW_B_W Data [0 ] 0 +NO_DW_B_W Exclusive_Data [0 ] 0 +NO_DW_B_W All_acks_and_data_no_sharers [0 ] 0 + +NO_DR_B_W GETX [0 ] 0 +NO_DR_B_W GETS [0 ] 0 +NO_DR_B_W PUT [0 ] 0 +NO_DR_B_W Pf_Replacement [0 ] 0 +NO_DR_B_W DMA_READ [0 ] 0 +NO_DR_B_W DMA_WRITE [0 ] 0 +NO_DR_B_W Memory_Data [0 ] 0 +NO_DR_B_W Ack [0 ] 0 +NO_DR_B_W Shared_Ack [0 ] 0 +NO_DR_B_W Shared_Data [0 ] 0 +NO_DR_B_W Data [0 ] 0 +NO_DR_B_W Exclusive_Data [0 ] 0 + +NO_DR_B_D GETX [0 ] 0 +NO_DR_B_D GETS [0 ] 0 +NO_DR_B_D PUT [0 ] 0 +NO_DR_B_D Pf_Replacement [0 ] 0 +NO_DR_B_D DMA_READ [0 ] 0 +NO_DR_B_D DMA_WRITE [0 ] 0 +NO_DR_B_D Ack [0 ] 0 +NO_DR_B_D Shared_Ack [0 ] 0 +NO_DR_B_D Shared_Data [0 ] 0 +NO_DR_B_D Data [0 ] 0 +NO_DR_B_D Exclusive_Data [0 ] 0 +NO_DR_B_D All_acks_and_shared_data [0 ] 0 +NO_DR_B_D All_acks_and_owner_data [0 ] 0 +NO_DR_B_D All_acks_and_data_no_sharers [0 ] 0 + +NO_DR_B GETX [0 ] 0 +NO_DR_B GETS [0 ] 0 +NO_DR_B PUT [0 ] 0 +NO_DR_B Pf_Replacement [0 ] 0 +NO_DR_B DMA_READ [0 ] 0 +NO_DR_B DMA_WRITE [0 ] 0 +NO_DR_B Ack [0 ] 0 +NO_DR_B Shared_Ack [0 ] 0 +NO_DR_B Shared_Data [0 ] 0 +NO_DR_B Data [0 ] 0 +NO_DR_B Exclusive_Data [0 ] 0 +NO_DR_B All_acks_and_shared_data [0 ] 0 +NO_DR_B All_acks_and_owner_data [0 ] 0 +NO_DR_B All_acks_and_data_no_sharers [0 ] 0 + +NO_DW_W GETX [0 ] 0 +NO_DW_W GETS [0 ] 0 +NO_DW_W PUT [0 ] 0 +NO_DW_W Pf_Replacement [0 ] 0 +NO_DW_W DMA_READ [0 ] 0 +NO_DW_W DMA_WRITE [0 ] 0 +NO_DW_W Memory_Ack [0 ] 0 + +O_DR_B_W GETX [0 ] 0 +O_DR_B_W GETS [0 ] 0 +O_DR_B_W PUT [0 ] 0 +O_DR_B_W Pf_Replacement [0 ] 0 +O_DR_B_W DMA_READ [0 ] 0 +O_DR_B_W DMA_WRITE [0 ] 0 +O_DR_B_W Memory_Data [0 ] 0 +O_DR_B_W Ack [0 ] 0 +O_DR_B_W Shared_Ack [0 ] 0 + +O_DR_B GETX [0 ] 0 +O_DR_B GETS [0 ] 0 +O_DR_B PUT [0 ] 0 +O_DR_B Pf_Replacement [0 ] 0 +O_DR_B DMA_READ [0 ] 0 +O_DR_B DMA_WRITE [0 ] 0 +O_DR_B Ack [0 ] 0 +O_DR_B Shared_Ack [0 ] 0 +O_DR_B All_acks_and_owner_data [0 ] 0 +O_DR_B All_acks_and_data_no_sharers [0 ] 0 + +WB GETX [2 ] 2 +WB GETS [1 ] 1 +WB PUT [0 ] 0 +WB Unblock [0 ] 0 +WB Writeback_Clean [0 ] 0 +WB Writeback_Dirty [0 ] 0 +WB Writeback_Exclusive_Clean [86 ] 86 +WB Writeback_Exclusive_Dirty [760 ] 760 +WB Pf_Replacement [0 ] 0 +WB DMA_READ [0 ] 0 +WB DMA_WRITE [0 ] 0 + +WB_O_W GETX [0 ] 0 +WB_O_W GETS [0 ] 0 +WB_O_W PUT [0 ] 0 +WB_O_W Pf_Replacement [0 ] 0 +WB_O_W DMA_READ [0 ] 0 +WB_O_W DMA_WRITE [0 ] 0 +WB_O_W Memory_Ack [0 ] 0 + +WB_E_W GETX [2 ] 2 +WB_E_W GETS [0 ] 0 +WB_E_W PUT [0 ] 0 +WB_E_W Pf_Replacement [0 ] 0 +WB_E_W DMA_READ [0 ] 0 +WB_E_W DMA_WRITE [0 ] 0 +WB_E_W Memory_Ack
\ No newline at end of file diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout index f0188e492..03174a5ad 100755 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 18 2010 14:59:19 -M5 revision 6a6bb24e484f+ 7041+ default qtip tip brad/regress_updates -M5 started Mar 18 2010 14:59:22 -M5 executing on cabr0210 +M5 compiled Aug 5 2010 14:43:33 +M5 revision c5f5b5533e96+ 7536+ default qtip tip brad/regress_updates +M5 started Aug 5 2010 14:46:32 +M5 executing on svvint09 command line: build/ALPHA_SE_MOESI_hammer/m5.fast -d build/ALPHA_SE_MOESI_hammer/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer -re tests/run.py build/ALPHA_SE_MOESI_hammer/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 222961 because Ruby Tester completed +Exiting @ tick 213851 because Ruby Tester completed diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt index e9601c124..6827d9d11 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt @@ -1,10 +1,10 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 208348 # Number of bytes of host memory used -host_seconds 0.53 # Real time elapsed on the host -host_tick_rate 420464 # Simulator tick rate (ticks/s) +host_mem_usage 209796 # Number of bytes of host memory used +host_seconds 0.44 # Real time elapsed on the host +host_tick_rate 485996 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks -sim_seconds 0.000223 # Number of seconds simulated -sim_ticks 222961 # Number of ticks simulated +sim_seconds 0.000214 # Number of seconds simulated +sim_ticks 213851 # Number of ticks simulated ---------- End Simulation Statistics ---------- diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini index 1aee478d8..2e46bddba 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini @@ -5,10 +5,85 @@ dummy=0 [system] type=System -children=physmem ruby +children=dir_cntrl0 l1_cntrl0 physmem ruby mem_mode=timing physmem=system.physmem +[system.dir_cntrl0] +type=Directory_Controller +children=directory memBuffer +buffer_size=0 +directory=system.dir_cntrl0.directory +directory_latency=12 +memBuffer=system.dir_cntrl0.memBuffer +number_of_TBEs=256 +recycle_latency=10 +transitions_per_cycle=32 +version=0 + +[system.dir_cntrl0.directory] +type=RubyDirectoryMemory +map_levels=4 +numa_high_bit=6 +size=134217728 +use_map=false +version=0 + +[system.dir_cntrl0.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.l1_cntrl0] +type=L1Cache_Controller +children=sequencer +buffer_size=0 +cacheMemory=system.l1_cntrl0.sequencer.icache +cache_response_latency=12 +issue_latency=2 +number_of_TBEs=256 +recycle_latency=10 +sequencer=system.l1_cntrl0.sequencer +transitions_per_cycle=32 +version=0 + +[system.l1_cntrl0.sequencer] +type=RubySequencer +children=icache +dcache=system.l1_cntrl0.sequencer.icache +deadlock_threshold=500000 +icache=system.l1_cntrl0.sequencer.icache +max_outstanding_requests=16 +physmem=system.physmem +using_ruby_tester=true +version=0 +physMemPort=system.physmem.port[0] +port=root.cpuPort[0] + +[system.l1_cntrl0.sequencer.icache] +type=RubyCache +assoc=2 +latency=3 +replacement_policy=PSEUDO_LRU +size=256 +start_index_bit=6 + [system.physmem] type=PhysicalMemory file= @@ -17,7 +92,7 @@ latency_var=0 null=false range=0:134217727 zero=false -port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort +port=system.l1_cntrl0.sequencer.physMemPort [system.ruby] type=RubySystem @@ -58,101 +133,26 @@ type=Topology children=ext_links0 ext_links1 int_links0 int_links1 ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 +name=Crossbar num_int_nodes=3 print_config=false [system.ruby.network.topology.ext_links0] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links0.ext_node +ext_node=system.l1_cntrl0 int_node=0 latency=1 weight=1 -[system.ruby.network.topology.ext_links0.ext_node] -type=L1Cache_Controller -children=sequencer -buffer_size=0 -cacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -cache_response_latency=12 -issue_latency=2 -number_of_TBEs=256 -recycle_latency=10 -sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links0.ext_node.sequencer] -type=RubySequencer -children=icache -dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -deadlock_threshold=500000 -icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache -max_outstanding_requests=16 -physmem=system.physmem -using_ruby_tester=true -version=0 -physMemPort=system.physmem.port[0] -port=root.cpuPort[0] - -[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache] -type=RubyCache -assoc=2 -latency=3 -replacement_policy=PSEUDO_LRU -size=256 - [system.ruby.network.topology.ext_links1] type=ExtLink -children=ext_node bw_multiplier=64 -ext_node=system.ruby.network.topology.ext_links1.ext_node +ext_node=system.dir_cntrl0 int_node=1 latency=1 weight=1 -[system.ruby.network.topology.ext_links1.ext_node] -type=Directory_Controller -children=directory memBuffer -buffer_size=0 -directory=system.ruby.network.topology.ext_links1.ext_node.directory -directory_latency=12 -memBuffer=system.ruby.network.topology.ext_links1.ext_node.memBuffer -number_of_TBEs=256 -recycle_latency=10 -transitions_per_cycle=32 -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.directory] -type=RubyDirectoryMemory -map_levels=4 -numa_high_bit=0 -size=134217728 -use_map=false -version=0 - -[system.ruby.network.topology.ext_links1.ext_node.memBuffer] -type=RubyMemoryControl -bank_bit_0=8 -bank_busy_time=11 -bank_queue_size=12 -banks_per_rank=8 -basic_bus_busy_time=2 -dimm_bit_0=12 -dimms_per_channel=2 -mem_bus_cycle_multiplier=10 -mem_ctl_latency=12 -mem_fixed_delay=0 -mem_random_arbitrate=0 -rank_bit_0=11 -rank_rank_delay=1 -ranks_per_dimm=2 -read_write_delay=2 -refresh_period=1560 -tFaw=0 -version=0 - [system.ruby.network.topology.int_links0] type=IntLink bw_multiplier=16 diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats index ba59ac498..4b8c316dc 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats @@ -13,7 +13,7 @@ RubySystem config: Network Configuration --------------------- network: SIMPLE_NETWORK -topology: +topology: Crossbar virtual_net_0: active, ordered virtual_net_1: active, ordered @@ -34,27 +34,27 @@ periodic_stats_period: 1000000 ================ End RubySystem Configuration Print ================ -Real time: Mar/18/2010 13:52:47 +Real time: Aug/05/2010 10:10:57 Profiler Stats -------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 +Elapsed_time_in_seconds: 0 +Elapsed_time_in_minutes: 0 +Elapsed_time_in_hours: 0 +Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.27 -Virtual_time_in_minutes: 0.0045 -Virtual_time_in_hours: 7.5e-05 -Virtual_time_in_days: 3.125e-06 +Virtual_time_in_seconds: 0.29 +Virtual_time_in_minutes: 0.00483333 +Virtual_time_in_hours: 8.05556e-05 +Virtual_time_in_days: 3.35648e-06 Ruby_current_time: 281031 Ruby_start_time: 0 Ruby_cycles: 281031 -mbytes_resident: 30.418 -mbytes_total: 203.402 -resident_ratio: 0.149584 +mbytes_resident: 30.9531 +mbytes_total: 203.703 +resident_ratio: 0.15199 ruby_cycles_executed: [ 281032 ] @@ -70,8 +70,27 @@ sequencer_requests_outstanding: [binsize: 1 max: 16 count: 1014 average: 15.7801 All Non-Zero Cycle Demand Cache Accesses ---------------------------------------- miss_latency: [binsize: 32 max: 6068 count: 999 average: 4453.7 | standard deviation: 529.325 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 1 1 1 0 1 0 1 1 2 5 0 4 1 2 6 3 6 5 6 4 7 8 11 10 20 9 19 17 13 22 23 30 23 21 22 25 31 27 31 39 35 22 20 39 25 30 27 25 23 23 19 22 10 24 20 22 19 19 12 21 14 12 11 5 8 6 0 3 2 0 2 0 2 0 1 0 0 0 0 2 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ] -miss_latency_2: [binsize: 32 max: 5702 count: 100 average: 4601.67 | standard deviation: 400.66 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 2 0 3 1 1 3 4 5 2 3 1 2 2 1 1 5 2 0 2 2 2 5 2 2 3 1 3 3 1 5 4 4 2 3 3 1 1 3 3 1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] -miss_latency_3: [binsize: 32 max: 6068 count: 899 average: 4437.24 | standard deviation: 539.424 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 1 1 1 0 1 0 1 1 2 5 0 4 1 2 6 3 6 4 6 4 7 7 11 9 18 9 16 16 12 19 19 25 21 18 21 23 29 26 30 34 33 22 18 37 23 25 25 23 20 22 16 19 9 19 16 18 17 16 9 20 13 9 8 4 7 6 0 3 2 0 1 0 2 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ] +miss_latency_IFETCH: [binsize: 32 max: 5702 count: 52 average: 4674.27 | standard deviation: 454.241 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 2 0 0 1 3 4 0 0 0 0 1 0 1 1 1 0 0 1 0 1 0 2 2 0 3 2 0 3 0 3 1 3 3 1 1 3 2 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD: [binsize: 32 max: 5245 count: 48 average: 4523.02 | standard deviation: 319.516 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 2 1 1 2 3 1 2 1 1 0 4 1 0 2 1 2 4 2 0 1 1 0 1 1 2 4 1 1 0 0 0 0 0 1 0 1 ] +miss_latency_ST: [binsize: 32 max: 6068 count: 899 average: 4437.24 | standard deviation: 539.424 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 1 0 0 0 0 1 1 1 0 1 0 1 1 2 5 0 4 1 2 6 3 6 4 6 4 7 7 11 9 18 9 16 16 12 19 19 25 21 18 21 23 29 26 30 34 33 22 18 37 23 25 25 23 20 22 16 19 9 19 16 18 17 16 9 20 13 9 8 4 7 6 0 3 2 0 1 0 2 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ] +miss_latency_L1Cache: [binsize: 32 max: 4572 count: 43 average: 3768.3 | standard deviation: 359.401 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 2 2 0 3 1 0 2 2 1 1 3 1 2 1 1 0 4 1 3 0 2 0 0 1 0 0 0 0 0 0 0 2 0 0 0 2 ] +miss_latency_Directory: [binsize: 32 max: 6068 count: 956 average: 4484.53 | standard deviation: 514.797 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 0 1 0 2 4 1 5 4 3 3 5 7 10 10 16 8 16 17 11 22 23 29 23 21 22 25 31 27 31 37 35 22 20 37 25 30 27 25 23 23 19 22 10 24 20 22 19 19 12 21 14 12 11 5 8 6 0 3 2 0 2 0 2 0 1 0 0 0 0 2 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ] +miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_wCC_Times: 0 +miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_dir_Times: 956 +miss_latency_IFETCH_L1Cache: [binsize: 32 max: 4022 count: 1 average: 4022 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_IFETCH_Directory: [binsize: 32 max: 5702 count: 51 average: 4687.06 | standard deviation: 449.206 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 1 0 0 1 3 4 0 0 0 0 1 0 1 1 1 0 0 1 0 1 0 2 2 0 3 2 0 3 0 3 1 3 3 1 1 3 2 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD_L1Cache: [binsize: 32 max: 3964 count: 1 average: 3964 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ] +miss_latency_LD_Directory: [binsize: 32 max: 5245 count: 47 average: 4534.91 | standard deviation: 312.044 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 2 1 1 2 3 1 2 1 1 0 4 1 0 2 1 2 4 2 0 1 1 0 1 1 2 4 1 1 0 0 0 0 0 1 0 1 ] +miss_latency_ST_L1Cache: [binsize: 32 max: 4572 count: 41 average: 3757.34 | standard deviation: 364.607 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 1 0 1 0 2 2 0 3 1 0 2 2 1 1 3 1 2 1 1 0 3 1 2 0 2 0 0 1 0 0 0 0 0 0 0 2 0 0 0 2 ] +miss_latency_ST_Directory: [binsize: 32 max: 6068 count: 858 average: 4469.73 | standard deviation: 524.902 | 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 0 1 0 2 4 1 5 3 3 3 5 6 10 9 15 8 14 16 10 19 19 24 21 18 21 23 29 26 30 32 33 22 18 35 23 25 25 23 20 22 16 19 9 19 16 18 17 16 9 20 13 9 8 4 7 6 0 3 2 0 1 0 2 0 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 ] All Non-Zero Cycle SW Prefetch Requests ------------------------------------ @@ -103,7 +122,7 @@ Resource Usage page_size: 4096 user_time: 0 system_time: 0 -page_reclaims: 8779 +page_reclaims: 9003 page_faults: 0 swaps: 0 block_inputs: 0 @@ -112,6 +131,12 @@ block_outputs: 0 Network Stats ------------- +total_msg_count_Control: 2871 22968 +total_msg_count_Data: 2862 206064 +total_msg_count_Response_Data: 2870 206640 +total_msg_count_Writeback_Control: 2861 22888 +total_msgs: 11464 total_bytes: 458560 + switch_0_inlinks: 2 switch_0_outlinks: 2 links_utilized_percent_switch_0: 0.106147 @@ -145,59 +170,59 @@ links_utilized_percent_switch_2: 0.169999 outgoing_messages_switch_2_link_1_Control: 957 7656 [ 0 0 957 0 0 0 0 0 0 0 ] base_latency: 1 outgoing_messages_switch_2_link_1_Data: 954 68688 [ 0 0 954 0 0 0 0 0 0 0 ] base_latency: 1 -Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 957 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 957 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0 +Cache Stats: system.l1_cntrl0.sequencer.icache + system.l1_cntrl0.sequencer.icache_total_misses: 957 + system.l1_cntrl0.sequencer.icache_total_demand_misses: 957 + system.l1_cntrl0.sequencer.icache_total_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_sw_prefetches: 0 + system.l1_cntrl0.sequencer.icache_total_hw_prefetches: 0 - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_LD: 10.2403% - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_ST: 89.7597% + system.l1_cntrl0.sequencer.icache_request_type_LD: 4.91118% + system.l1_cntrl0.sequencer.icache_request_type_ST: 89.7597% + system.l1_cntrl0.sequencer.icache_request_type_IFETCH: 5.32915% - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_access_mode_type_SupervisorMode: 957 100% - system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 4 count: 957 average: 1.30721 | standard deviation: 0.910193 | 0 859 0 0 98 ] + system.l1_cntrl0.sequencer.icache_access_mode_type_SupervisorMode: 957 100% - --- L1Cache 0 --- + --- L1Cache --- - Event Counts - -Load 100 -Ifetch 0 -Store 900 -Data 956 -Fwd_GETX 0 -Inv 0 -Replacement 954 -Writeback_Ack 953 -Writeback_Nack 0 +Load [48 ] 48 +Ifetch [52 ] 52 +Store [900 ] 900 +Data [956 ] 956 +Fwd_GETX [0 ] 0 +Inv [0 ] 0 +Replacement [954 ] 954 +Writeback_Ack [953 ] 953 +Writeback_Nack [0 ] 0 - Transitions - -I Load 98 -I Ifetch 0 <-- -I Store 859 -I Inv 0 <-- -I Replacement 0 <-- +I Load [47 ] 47 +I Ifetch [51 ] 51 +I Store [859 ] 859 +I Inv [0 ] 0 +I Replacement [0 ] 0 -II Writeback_Nack 0 <-- +II Writeback_Nack [0 ] 0 -M Load 2 -M Ifetch 0 <-- -M Store 41 -M Fwd_GETX 0 <-- -M Inv 0 <-- -M Replacement 954 +M Load [1 ] 1 +M Ifetch [1 ] 1 +M Store [41 ] 41 +M Fwd_GETX [0 ] 0 +M Inv [0 ] 0 +M Replacement [954 ] 954 -MI Fwd_GETX 0 <-- -MI Inv 0 <-- -MI Writeback_Ack 953 -MI Writeback_Nack 0 <-- +MI Fwd_GETX [0 ] 0 +MI Inv [0 ] 0 +MI Writeback_Ack [953 ] 953 +MI Writeback_Nack [0 ] 0 -MII Fwd_GETX 0 <-- +MII Fwd_GETX [0 ] 0 -IS Data 98 +IS Data [98 ] 98 -IM Data 858 +IM Data [858 ] 858 -Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer: +Memory controller: system.dir_cntrl0.memBuffer: memory_total_requests: 1911 memory_reads: 957 memory_writes: 954 @@ -217,70 +242,69 @@ Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer: memory_stalls_for_read_read_turnaround: 112 accesses_per_bank: 52 59 44 109 131 76 66 52 64 66 66 44 56 54 54 52 52 48 76 50 48 60 56 48 50 62 66 48 36 64 48 54 - --- Directory 0 --- + --- Directory --- - Event Counts - -GETX 957 -GETS 0 -PUTX 954 -PUTX_NotOwner 0 -DMA_READ 0 -DMA_WRITE 0 -Memory_Data 957 -Memory_Ack 954 +GETX [957 ] 957 +GETS [0 ] 0 +PUTX [954 ] 954 +PUTX_NotOwner [0 ] 0 +DMA_READ [0 ] 0 +DMA_WRITE [0 ] 0 +Memory_Data [957 ] 957 +Memory_Ack [954 ] 954 - Transitions - -I GETX 957 -I PUTX_NotOwner 0 <-- -I DMA_READ 0 <-- -I DMA_WRITE 0 <-- - -M GETX 0 <-- -M PUTX 954 -M PUTX_NotOwner 0 <-- -M DMA_READ 0 <-- -M DMA_WRITE 0 <-- - -M_DRD GETX 0 <-- -M_DRD PUTX 0 <-- - -M_DWR GETX 0 <-- -M_DWR PUTX 0 <-- - -M_DWRI GETX 0 <-- -M_DWRI Memory_Ack 0 <-- - -M_DRDI GETX 0 <-- -M_DRDI Memory_Ack 0 <-- - -IM GETX 0 <-- -IM GETS 0 <-- -IM PUTX 0 <-- -IM PUTX_NotOwner 0 <-- -IM DMA_READ 0 <-- -IM DMA_WRITE 0 <-- -IM Memory_Data 957 - -MI GETX 0 <-- -MI GETS 0 <-- -MI PUTX 0 <-- -MI PUTX_NotOwner 0 <-- -MI DMA_READ 0 <-- -MI DMA_WRITE 0 <-- -MI Memory_Ack 954 - -ID GETX 0 <-- -ID GETS 0 <-- -ID PUTX 0 <-- -ID PUTX_NotOwner 0 <-- -ID DMA_READ 0 <-- -ID DMA_WRITE 0 <-- -ID Memory_Data 0 <-- - -ID_W GETX 0 <-- -ID_W GETS 0 <-- -ID_W PUTX 0 <-- -ID_W PUTX_NotOwner 0 <-- -ID_W DMA_READ 0 <-- -ID_W DMA_WRITE 0 <-- -ID_W Memory_Ack 0 <-- - +I GETX [957 ] 957 +I PUTX_NotOwner [0 ] 0 +I DMA_READ [0 ] 0 +I DMA_WRITE [0 ] 0 + +M GETX [0 ] 0 +M PUTX [954 ] 954 +M PUTX_NotOwner [0 ] 0 +M DMA_READ [0 ] 0 +M DMA_WRITE [0 ] 0 + +M_DRD GETX [0 ] 0 +M_DRD PUTX [0 ] 0 + +M_DWR GETX [0 ] 0 +M_DWR PUTX [0 ] 0 + +M_DWRI GETX [0 ] 0 +M_DWRI Memory_Ack [0 ] 0 + +M_DRDI GETX [0 ] 0 +M_DRDI Memory_Ack [0 ] 0 + +IM GETX [0 ] 0 +IM GETS [0 ] 0 +IM PUTX [0 ] 0 +IM PUTX_NotOwner [0 ] 0 +IM DMA_READ [0 ] 0 +IM DMA_WRITE [0 ] 0 +IM Memory_Data [957 ] 957 + +MI GETX [0 ] 0 +MI GETS [0 ] 0 +MI PUTX [0 ] 0 +MI PUTX_NotOwner [0 ] 0 +MI DMA_READ [0 ] 0 +MI DMA_WRITE [0 ] 0 +MI Memory_Ack [954 ] 954 + +ID GETX [0 ] 0 +ID GETS [0 ] 0 +ID PUTX [0 ] 0 +ID PUTX_NotOwner [0 ] 0 +ID DMA_READ [0 ] 0 +ID DMA_WRITE [0 ] 0 +ID Memory_Data [0 ] 0 + +ID_W GETX [0 ] 0 +ID_W GETS [0 ] 0 +ID_W PUTX [0 ] 0 +ID_W PUTX_NotOwner [0 ] 0 +ID_W DMA_READ [0 ] 0 +ID_W DMA_WRITE [0 ] 0 +ID_W Memory_Ack
\ No newline at end of file diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout index 5ef371e45..566ba5c1a 100755 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout @@ -1,3 +1,5 @@ +Redirecting stdout to build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby/simout +Redirecting stderr to build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby/simerr M5 Simulator System Copyright (c) 2001-2008 @@ -5,10 +7,10 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Mar 18 2010 13:52:42 -M5 revision 6a6bb24e484f 7041 default qtip tip brad/regress_updates -M5 started Mar 18 2010 13:52:46 -M5 executing on cabr0210 +M5 compiled Aug 4 2010 17:29:21 +M5 revision 1cd2a169499f+ 7535+ default brad/hammer_merge_gets qtip tip +M5 started Aug 5 2010 10:10:57 +M5 executing on SC2B0617 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby -re tests/run.py build/ALPHA_SE/tests/fast/quick/60.rubytest/alpha/linux/rubytest-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt index 182f5ad99..104ae3de6 100644 --- a/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt +++ b/tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt @@ -1,8 +1,8 @@ ---------- Begin Simulation Statistics ---------- -host_mem_usage 208288 # Number of bytes of host memory used -host_seconds 0.10 # Real time elapsed on the host -host_tick_rate 2919378 # Simulator tick rate (ticks/s) +host_mem_usage 208596 # Number of bytes of host memory used +host_seconds 0.09 # Real time elapsed on the host +host_tick_rate 3195386 # Simulator tick rate (ticks/s) sim_freq 1000000000 # Frequency of simulated ticks sim_seconds 0.000281 # Number of seconds simulated sim_ticks 281031 # Number of ticks simulated |