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Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt')
-rw-r--r--tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt327
1 files changed, 167 insertions, 160 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
index 34e6d6348..3a45545f2 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
@@ -4,42 +4,42 @@ sim_seconds 1.829332 # Nu
sim_ticks 1829332273500 # Number of ticks simulated
final_tick 1829332273500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 2390951 # Simulator instruction rate (inst/s)
-host_op_rate 2390950 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 72850763127 # Simulator tick rate (ticks/s)
-host_mem_usage 374092 # Number of bytes of host memory used
-host_seconds 25.11 # Real time elapsed on the host
+host_inst_rate 2238603 # Simulator instruction rate (inst/s)
+host_op_rate 2238602 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 68208828665 # Simulator tick rate (ticks/s)
+host_mem_usage 373932 # Number of bytes of host memory used
+host_seconds 26.82 # Real time elapsed on the host
sim_insts 60038341 # Number of instructions simulated
sim_ops 60038341 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.bytes_read::cpu.inst 856000 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 66836224 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.inst 850496 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.data 66835456 # Number of bytes read from this memory
system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
-system.physmem.bytes_read::total 67693184 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 856000 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 856000 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 7414144 # Number of bytes written to this memory
-system.physmem.bytes_written::total 7414144 # Number of bytes written to this memory
-system.physmem.num_reads::cpu.inst 13375 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 1044316 # Number of read requests responded to by this memory
+system.physmem.bytes_read::total 67686912 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 850496 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 850496 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 7416128 # Number of bytes written to this memory
+system.physmem.bytes_written::total 7416128 # Number of bytes written to this memory
+system.physmem.num_reads::cpu.inst 13289 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.data 1044304 # Number of read requests responded to by this memory
system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 1057706 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 115846 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 115846 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu.inst 467930 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 36535858 # Total read bandwidth from this memory (bytes/s)
+system.physmem.num_reads::total 1057608 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 115877 # Number of write requests responded to by this memory
+system.physmem.num_writes::total 115877 # Number of write requests responded to by this memory
+system.physmem.bw_read::cpu.inst 464922 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 36535438 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::tsunami.ide 525 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 37004313 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 467930 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 467930 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 4052924 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 4052924 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 4052924 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 467930 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 36535858 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::total 37000884 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 464922 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 464922 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 4054008 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 4054008 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 4054008 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 464922 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 36535438 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::tsunami.ide 525 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 41057237 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 41054893 # Total bandwidth to/from this memory (bytes/s)
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
@@ -76,61 +76,6 @@ system.cpu.itb.data_accesses 0 # DT
system.cpu.numCycles 3658670905 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 60038341 # Number of instructions committed
-system.cpu.committedOps 60038341 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 55913563 # Number of integer alu accesses
-system.cpu.num_fp_alu_accesses 324460 # Number of float alu accesses
-system.cpu.num_func_calls 1484182 # number of times a function call or return occured
-system.cpu.num_conditional_control_insts 7110761 # number of instructions that are conditional controls
-system.cpu.num_int_insts 55913563 # number of integer instructions
-system.cpu.num_fp_insts 324460 # number of float instructions
-system.cpu.num_int_register_reads 76954014 # number of times the integer registers were read
-system.cpu.num_int_register_writes 41740254 # number of times the integer registers were written
-system.cpu.num_fp_register_reads 163642 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 166520 # number of times the floating registers were written
-system.cpu.num_mem_refs 16115702 # number of memory refs
-system.cpu.num_load_insts 9747508 # Number of load instructions
-system.cpu.num_store_insts 6368194 # Number of store instructions
-system.cpu.num_idle_cycles 3598621691.055137 # Number of idle cycles
-system.cpu.num_busy_cycles 60049213.944863 # Number of busy cycles
-system.cpu.not_idle_fraction 0.016413 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0.983587 # Percentage of idle cycles
-system.cpu.Branches 9064400 # Number of branches fetched
-system.cpu.op_class::No_OpClass 3199098 5.33% 5.33% # Class of executed instruction
-system.cpu.op_class::IntAlu 39448273 65.69% 71.02% # Class of executed instruction
-system.cpu.op_class::IntMult 60677 0.10% 71.12% # Class of executed instruction
-system.cpu.op_class::IntDiv 0 0.00% 71.12% # Class of executed instruction
-system.cpu.op_class::FloatAdd 38087 0.06% 71.18% # Class of executed instruction
-system.cpu.op_class::FloatCmp 0 0.00% 71.18% # Class of executed instruction
-system.cpu.op_class::FloatCvt 0 0.00% 71.18% # Class of executed instruction
-system.cpu.op_class::FloatMult 0 0.00% 71.18% # Class of executed instruction
-system.cpu.op_class::FloatDiv 3636 0.01% 71.19% # Class of executed instruction
-system.cpu.op_class::FloatSqrt 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdAdd 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdAlu 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdCmp 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdCvt 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdMisc 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdMult 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdShift 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdSqrt 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 71.19% # Class of executed instruction
-system.cpu.op_class::MemRead 9975076 16.61% 87.80% # Class of executed instruction
-system.cpu.op_class::MemWrite 6374115 10.61% 98.42% # Class of executed instruction
-system.cpu.op_class::IprAccess 951217 1.58% 100.00% # Class of executed instruction
-system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 60050179 # Class of executed instruction
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.quiesce 6357 # number of quiesce instructions executed
system.cpu.kern.inst.hwrei 211319 # number of hwrei instructions executed
@@ -216,6 +161,61 @@ system.cpu.kern.mode_ticks::kernel 26833319500 1.47% 1.47% # nu
system.cpu.kern.mode_ticks::user 1465074000 0.08% 1.55% # number of ticks spent at the given mode
system.cpu.kern.mode_ticks::idle 1801033671500 98.45% 100.00% # number of ticks spent at the given mode
system.cpu.kern.swap_context 4178 # number of times the context was actually changed
+system.cpu.committedInsts 60038341 # Number of instructions committed
+system.cpu.committedOps 60038341 # Number of ops (including micro ops) committed
+system.cpu.num_int_alu_accesses 55913563 # Number of integer alu accesses
+system.cpu.num_fp_alu_accesses 324460 # Number of float alu accesses
+system.cpu.num_func_calls 1484182 # number of times a function call or return occured
+system.cpu.num_conditional_control_insts 7110761 # number of instructions that are conditional controls
+system.cpu.num_int_insts 55913563 # number of integer instructions
+system.cpu.num_fp_insts 324460 # number of float instructions
+system.cpu.num_int_register_reads 76954014 # number of times the integer registers were read
+system.cpu.num_int_register_writes 41740254 # number of times the integer registers were written
+system.cpu.num_fp_register_reads 163642 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 166520 # number of times the floating registers were written
+system.cpu.num_mem_refs 16115702 # number of memory refs
+system.cpu.num_load_insts 9747508 # Number of load instructions
+system.cpu.num_store_insts 6368194 # Number of store instructions
+system.cpu.num_idle_cycles 3598621691.055137 # Number of idle cycles
+system.cpu.num_busy_cycles 60049213.944863 # Number of busy cycles
+system.cpu.not_idle_fraction 0.016413 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.983587 # Percentage of idle cycles
+system.cpu.Branches 9064400 # Number of branches fetched
+system.cpu.op_class::No_OpClass 3199098 5.33% 5.33% # Class of executed instruction
+system.cpu.op_class::IntAlu 39448273 65.69% 71.02% # Class of executed instruction
+system.cpu.op_class::IntMult 60677 0.10% 71.12% # Class of executed instruction
+system.cpu.op_class::IntDiv 0 0.00% 71.12% # Class of executed instruction
+system.cpu.op_class::FloatAdd 38087 0.06% 71.18% # Class of executed instruction
+system.cpu.op_class::FloatCmp 0 0.00% 71.18% # Class of executed instruction
+system.cpu.op_class::FloatCvt 0 0.00% 71.18% # Class of executed instruction
+system.cpu.op_class::FloatMult 0 0.00% 71.18% # Class of executed instruction
+system.cpu.op_class::FloatDiv 3636 0.01% 71.19% # Class of executed instruction
+system.cpu.op_class::FloatSqrt 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdAdd 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdAlu 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdCmp 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdCvt 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdMisc 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdMult 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdShift 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdSqrt 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt 0 0.00% 71.19% # Class of executed instruction
+system.cpu.op_class::MemRead 9975076 16.61% 87.80% # Class of executed instruction
+system.cpu.op_class::MemWrite 6374115 10.61% 98.42% # Class of executed instruction
+system.cpu.op_class::IprAccess 951217 1.58% 100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
+system.cpu.op_class::total 60050179 # Class of executed instruction
system.cpu.dcache.tags.replacements 2042728 # number of replacements
system.cpu.dcache.tags.tagsinuse 511.997802 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 14038398 # Total number of references to valid blocks.
@@ -284,8 +284,8 @@ system.cpu.dcache.avg_blocked_cycles::no_mshrs nan
system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
-system.cpu.dcache.writebacks::writebacks 833493 # number of writebacks
-system.cpu.dcache.writebacks::total 833493 # number of writebacks
+system.cpu.dcache.writebacks::writebacks 833492 # number of writebacks
+system.cpu.dcache.writebacks::total 833492 # number of writebacks
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.icache.tags.replacements 919605 # number of replacements
system.cpu.icache.tags.tagsinuse 511.215260 # Cycle average of tags in use
@@ -335,19 +335,21 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs nan
system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
+system.cpu.icache.writebacks::writebacks 919605 # number of writebacks
+system.cpu.icache.writebacks::total 919605 # number of writebacks
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 992219 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 65424.374112 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 4560066 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 1057382 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 4.312600 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.replacements 992425 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 65424.374115 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 4560164 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 1057588 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 4.311853 # Average number of references to valid blocks.
system.cpu.l2cache.tags.warmup_cycle 614754000 # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.tags.occ_blocks::writebacks 56252.896873 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 4923.444270 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 4248.032969 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_percent::writebacks 0.858351 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::cpu.inst 0.075126 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::cpu.data 0.064820 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_blocks::writebacks 56331.555575 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 4843.320500 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 4249.498040 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_percent::writebacks 0.859551 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::cpu.inst 0.073903 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::cpu.data 0.064842 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::total 0.998297 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_task_id_blocks::1024 65163 # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::0 781 # Occupied blocks per task id
@@ -356,40 +358,44 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::2 4024
system.cpu.l2cache.tags.age_task_id_blocks_1024::3 3053 # Occupied blocks per task id
system.cpu.l2cache.tags.age_task_id_blocks_1024::4 54045 # Occupied blocks per task id
system.cpu.l2cache.tags.occ_task_id_percent::1024 0.994308 # Percentage of cache occupancy per task id
-system.cpu.l2cache.tags.tag_accesses 48753828 # Number of tag accesses
-system.cpu.l2cache.tags.data_accesses 48753828 # Number of data accesses
-system.cpu.l2cache.Writeback_hits::writebacks 833493 # number of Writeback hits
-system.cpu.l2cache.Writeback_hits::total 833493 # number of Writeback hits
+system.cpu.l2cache.tags.tag_accesses 48754034 # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses 48754034 # Number of data accesses
+system.cpu.l2cache.WritebackDirty_hits::writebacks 833492 # number of WritebackDirty hits
+system.cpu.l2cache.WritebackDirty_hits::total 833492 # number of WritebackDirty hits
+system.cpu.l2cache.WritebackClean_hits::writebacks 919353 # number of WritebackClean hits
+system.cpu.l2cache.WritebackClean_hits::total 919353 # number of WritebackClean hits
system.cpu.l2cache.UpgradeReq_hits::cpu.data 4 # number of UpgradeReq hits
system.cpu.l2cache.UpgradeReq_hits::total 4 # number of UpgradeReq hits
system.cpu.l2cache.ReadExReq_hits::cpu.data 187288 # number of ReadExReq hits
system.cpu.l2cache.ReadExReq_hits::total 187288 # number of ReadExReq hits
-system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 906839 # number of ReadCleanReq hits
-system.cpu.l2cache.ReadCleanReq_hits::total 906839 # number of ReadCleanReq hits
-system.cpu.l2cache.ReadSharedReq_hits::cpu.data 811246 # number of ReadSharedReq hits
-system.cpu.l2cache.ReadSharedReq_hits::total 811246 # number of ReadSharedReq hits
-system.cpu.l2cache.demand_hits::cpu.inst 906839 # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::cpu.data 998534 # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::total 1905373 # number of demand (read+write) hits
-system.cpu.l2cache.overall_hits::cpu.inst 906839 # number of overall hits
-system.cpu.l2cache.overall_hits::cpu.data 998534 # number of overall hits
-system.cpu.l2cache.overall_hits::total 1905373 # number of overall hits
+system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 906925 # number of ReadCleanReq hits
+system.cpu.l2cache.ReadCleanReq_hits::total 906925 # number of ReadCleanReq hits
+system.cpu.l2cache.ReadSharedReq_hits::cpu.data 811243 # number of ReadSharedReq hits
+system.cpu.l2cache.ReadSharedReq_hits::total 811243 # number of ReadSharedReq hits
+system.cpu.l2cache.demand_hits::cpu.inst 906925 # number of demand (read+write) hits
+system.cpu.l2cache.demand_hits::cpu.data 998531 # number of demand (read+write) hits
+system.cpu.l2cache.demand_hits::total 1905456 # number of demand (read+write) hits
+system.cpu.l2cache.overall_hits::cpu.inst 906925 # number of overall hits
+system.cpu.l2cache.overall_hits::cpu.data 998531 # number of overall hits
+system.cpu.l2cache.overall_hits::total 1905456 # number of overall hits
system.cpu.l2cache.UpgradeReq_misses::cpu.data 12 # number of UpgradeReq misses
system.cpu.l2cache.UpgradeReq_misses::total 12 # number of UpgradeReq misses
system.cpu.l2cache.ReadExReq_misses::cpu.data 117066 # number of ReadExReq misses
system.cpu.l2cache.ReadExReq_misses::total 117066 # number of ReadExReq misses
-system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13375 # number of ReadCleanReq misses
-system.cpu.l2cache.ReadCleanReq_misses::total 13375 # number of ReadCleanReq misses
-system.cpu.l2cache.ReadSharedReq_misses::cpu.data 927641 # number of ReadSharedReq misses
-system.cpu.l2cache.ReadSharedReq_misses::total 927641 # number of ReadSharedReq misses
-system.cpu.l2cache.demand_misses::cpu.inst 13375 # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::cpu.data 1044707 # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::total 1058082 # number of demand (read+write) misses
-system.cpu.l2cache.overall_misses::cpu.inst 13375 # number of overall misses
-system.cpu.l2cache.overall_misses::cpu.data 1044707 # number of overall misses
-system.cpu.l2cache.overall_misses::total 1058082 # number of overall misses
-system.cpu.l2cache.Writeback_accesses::writebacks 833493 # number of Writeback accesses(hits+misses)
-system.cpu.l2cache.Writeback_accesses::total 833493 # number of Writeback accesses(hits+misses)
+system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13289 # number of ReadCleanReq misses
+system.cpu.l2cache.ReadCleanReq_misses::total 13289 # number of ReadCleanReq misses
+system.cpu.l2cache.ReadSharedReq_misses::cpu.data 927644 # number of ReadSharedReq misses
+system.cpu.l2cache.ReadSharedReq_misses::total 927644 # number of ReadSharedReq misses
+system.cpu.l2cache.demand_misses::cpu.inst 13289 # number of demand (read+write) misses
+system.cpu.l2cache.demand_misses::cpu.data 1044710 # number of demand (read+write) misses
+system.cpu.l2cache.demand_misses::total 1057999 # number of demand (read+write) misses
+system.cpu.l2cache.overall_misses::cpu.inst 13289 # number of overall misses
+system.cpu.l2cache.overall_misses::cpu.data 1044710 # number of overall misses
+system.cpu.l2cache.overall_misses::total 1057999 # number of overall misses
+system.cpu.l2cache.WritebackDirty_accesses::writebacks 833492 # number of WritebackDirty accesses(hits+misses)
+system.cpu.l2cache.WritebackDirty_accesses::total 833492 # number of WritebackDirty accesses(hits+misses)
+system.cpu.l2cache.WritebackClean_accesses::writebacks 919353 # number of WritebackClean accesses(hits+misses)
+system.cpu.l2cache.WritebackClean_accesses::total 919353 # number of WritebackClean accesses(hits+misses)
system.cpu.l2cache.UpgradeReq_accesses::cpu.data 16 # number of UpgradeReq accesses(hits+misses)
system.cpu.l2cache.UpgradeReq_accesses::total 16 # number of UpgradeReq accesses(hits+misses)
system.cpu.l2cache.ReadExReq_accesses::cpu.data 304354 # number of ReadExReq accesses(hits+misses)
@@ -408,16 +414,16 @@ system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.750000
system.cpu.l2cache.UpgradeReq_miss_rate::total 0.750000 # miss rate for UpgradeReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.384638 # miss rate for ReadExReq accesses
system.cpu.l2cache.ReadExReq_miss_rate::total 0.384638 # miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.014535 # miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.014535 # miss rate for ReadCleanReq accesses
-system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.533468 # miss rate for ReadSharedReq accesses
-system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.533468 # miss rate for ReadSharedReq accesses
-system.cpu.l2cache.demand_miss_rate::cpu.inst 0.014535 # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::cpu.data 0.511299 # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::total 0.357043 # miss rate for demand accesses
-system.cpu.l2cache.overall_miss_rate::cpu.inst 0.014535 # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::cpu.data 0.511299 # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::total 0.357043 # miss rate for overall accesses
+system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.014441 # miss rate for ReadCleanReq accesses
+system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.014441 # miss rate for ReadCleanReq accesses
+system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.533470 # miss rate for ReadSharedReq accesses
+system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.533470 # miss rate for ReadSharedReq accesses
+system.cpu.l2cache.demand_miss_rate::cpu.inst 0.014441 # miss rate for demand accesses
+system.cpu.l2cache.demand_miss_rate::cpu.data 0.511300 # miss rate for demand accesses
+system.cpu.l2cache.demand_miss_rate::total 0.357015 # miss rate for demand accesses
+system.cpu.l2cache.overall_miss_rate::cpu.inst 0.014441 # miss rate for overall accesses
+system.cpu.l2cache.overall_miss_rate::cpu.data 0.511300 # miss rate for overall accesses
+system.cpu.l2cache.overall_miss_rate::total 0.357015 # miss rate for overall accesses
system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
@@ -426,8 +432,8 @@ system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan
system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes 0 # number of fast writes performed
system.cpu.l2cache.cache_copies 0 # number of cache copies performed
-system.cpu.l2cache.writebacks::writebacks 74334 # number of writebacks
-system.cpu.l2cache.writebacks::total 74334 # number of writebacks
+system.cpu.l2cache.writebacks::writebacks 74365 # number of writebacks
+system.cpu.l2cache.writebacks::total 74365 # number of writebacks
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu.toL2Bus.snoop_filter.tot_requests 5925822 # Total number of requests made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_requests 2962455 # Number of requests hitting in the snoop filter with a single holder of the requested data.
@@ -439,8 +445,9 @@ system.cpu.toL2Bus.trans_dist::ReadReq 7184 # Tr
system.cpu.toL2Bus.trans_dist::ReadResp 2666303 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteReq 9838 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteResp 9838 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::Writeback 833493 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::CleanEvict 2127019 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::WritebackDirty 833492 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::WritebackClean 919353 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::CleanEvict 1207667 # Transaction distribution
system.cpu.toL2Bus.trans_dist::UpgradeReq 16 # Transaction distribution
system.cpu.toL2Bus.trans_dist::UpgradeResp 16 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 304354 # Transaction distribution
@@ -450,21 +457,21 @@ system.cpu.toL2Bus.trans_dist::ReadSharedReq 1738887
system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2759817 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 6161717 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count::total 8921534 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 58894848 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 184157102 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total 243051950 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.snoops 1075788 # Total snoops (count)
-system.cpu.toL2Bus.snoop_fanout::samples 7018475 # Request fanout histogram
+system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 117733440 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 184157038 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size::total 301890478 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.snoops 1075994 # Total snoops (count)
+system.cpu.toL2Bus.snoop_fanout::samples 7018681 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean 0.000744 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev 0.027269 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::0 7013252 99.93% 99.93% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::0 7013458 99.93% 99.93% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::1 5223 0.07% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total 7018475 # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::total 7018681 # Request fanout histogram
system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD).
system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD).
@@ -563,42 +570,42 @@ system.iocache.writebacks::writebacks 41512 # nu
system.iocache.writebacks::total 41512 # number of writebacks
system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
system.membus.trans_dist::ReadReq 7184 # Transaction distribution
-system.membus.trans_dist::ReadResp 948374 # Transaction distribution
+system.membus.trans_dist::ReadResp 948291 # Transaction distribution
system.membus.trans_dist::WriteReq 9838 # Transaction distribution
system.membus.trans_dist::WriteResp 9838 # Transaction distribution
-system.membus.trans_dist::Writeback 115846 # Transaction distribution
-system.membus.trans_dist::CleanEvict 917156 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 132 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 132 # Transaction distribution
-system.membus.trans_dist::ReadExReq 116946 # Transaction distribution
-system.membus.trans_dist::ReadExResp 116946 # Transaction distribution
-system.membus.trans_dist::ReadSharedReq 941190 # Transaction distribution
+system.membus.trans_dist::WritebackDirty 115877 # Transaction distribution
+system.membus.trans_dist::CleanEvict 917027 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 147 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 147 # Transaction distribution
+system.membus.trans_dist::ReadExReq 116931 # Transaction distribution
+system.membus.trans_dist::ReadExResp 116931 # Transaction distribution
+system.membus.trans_dist::ReadSharedReq 941107 # Transaction distribution
system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution
system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 34044 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 3107665 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total 3141709 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 3107401 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total 3141445 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 124977 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::total 124977 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 3266686 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 3266422 # Packet count per connected master and slave (bytes)
system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 46126 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 72466944 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total 72513070 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 72462656 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::total 72508782 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2667904 # Cumulative packet size per connected master and slave (bytes)
system.membus.pkt_size_system.iocache.mem_side::total 2667904 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 75180974 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 75176686 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 0 # Total snoops (count)
-system.membus.snoop_fanout::samples 2150005 # Request fanout histogram
+system.membus.snoop_fanout::samples 2149824 # Request fanout histogram
system.membus.snoop_fanout::mean 1 # Request fanout histogram
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::1 2150005 100.00% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::1 2149824 100.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 1 # Request fanout histogram
system.membus.snoop_fanout::max_value 1 # Request fanout histogram
-system.membus.snoop_fanout::total 2150005 # Request fanout histogram
+system.membus.snoop_fanout::total 2149824 # Request fanout histogram
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA