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Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic')
-rw-r--r--tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini191
-rwxr-xr-xtests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout10
-rw-r--r--tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt82
3 files changed, 172 insertions, 111 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
index 50088b4ab..ac72e998f 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
@@ -8,19 +8,20 @@ time_sync_spin_threshold=100000000
[system]
type=LinuxAlphaSystem
-children=bridge cpu disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami
+children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
boot_cpu_frequency=500
boot_osflags=root=/dev/hda1 console=ttyS0
-clock=1000
-console=/scratch/nilay/GEM5/system/binaries/console
+cache_line_size=64
+clk_domain=system.clk_domain
+console=/dist/m5/system/binaries/console
init_param=0
-kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
+kernel=/dist/m5/system/binaries/vmlinux
load_addr_mask=1099511627775
mem_mode=atomic
mem_ranges=0:134217727
memories=system.physmem
num_work_ids=16
-pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
+pal=/dist/m5/system/binaries/ts_osfpal
readfile=tests/halt.sh
symbolfile=
system_rev=1024
@@ -36,7 +37,7 @@ system_port=system.membus.slave[0]
[system.bridge]
type=Bridge
-clock=1000
+clk_domain=system.clk_domain
delay=50000
ranges=8796093022208:18446744073709551615
req_size=16
@@ -44,12 +45,16 @@ resp_size=16
master=system.iobus.slave[0]
slave=system.membus.master[0]
+[system.clk_domain]
+type=SrcClockDomain
+clock=1000
+voltage_domain=system.voltage_domain
+
[system.cpu]
type=AtomicSimpleCPU
children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer
-branchPred=Null
checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
cpu_id=0
do_checkpoint_insts=true
do_quiesce=true
@@ -68,6 +73,10 @@ max_loads_any_thread=0
numThreads=1
profile=0
progress_interval=0
+simpoint_interval=100000000
+simpoint_profile=false
+simpoint_profile_file=simpoint.bb.gz
+simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
switched_out=false
@@ -80,10 +89,10 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
+children=tags
addr_ranges=0:18446744073709551615
assoc=4
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
forward_snoops=true
hit_latency=2
is_top_level=true
@@ -94,22 +103,31 @@ prefetcher=Null
response_latency=2
size=32768
system=system
+tags=system.cpu.dcache.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
+[system.cpu.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
[system.cpu.dtb]
type=AlphaTLB
size=64
[system.cpu.icache]
type=BaseCache
+children=tags
addr_ranges=0:18446744073709551615
assoc=1
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
forward_snoops=true
hit_latency=2
is_top_level=true
@@ -120,12 +138,21 @@ prefetcher=Null
response_latency=2
size=32768
system=system
+tags=system.cpu.icache.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
+[system.cpu.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
[system.cpu.interrupts]
type=AlphaInterrupts
@@ -138,10 +165,10 @@ size=48
[system.cpu.l2cache]
type=BaseCache
+children=tags
addr_ranges=0:18446744073709551615
assoc=8
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
forward_snoops=true
hit_latency=20
is_top_level=false
@@ -152,17 +179,26 @@ prefetcher=Null
response_latency=20
size=4194304
system=system
+tags=system.cpu.l2cache.tags
tgts_per_mshr=12
two_queue=false
write_buffers=8
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
+[system.cpu.l2cache.tags]
+type=LRU
+assoc=8
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=20
+size=4194304
+
[system.cpu.toL2Bus]
type=CoherentBus
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
header_cycles=1
+system=system
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
@@ -171,6 +207,11 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
[system.cpu.tracer]
type=ExeTracer
+[system.cpu_clk_domain]
+type=SrcClockDomain
+clock=500
+voltage_domain=system.voltage_domain
+
[system.disk0]
type=IdeDisk
children=image
@@ -188,7 +229,7 @@ table_size=65536
[system.disk0.image.child]
type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
+image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.disk2]
@@ -208,7 +249,7 @@ table_size=65536
[system.disk2.image.child]
type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
+image_file=/dist/m5/system/disks/linux-bigswap2.img
read_only=true
[system.intrctrl]
@@ -217,8 +258,7 @@ sys=system
[system.iobus]
type=NoncoherentBus
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
header_cycles=1
use_default_range=true
width=8
@@ -228,10 +268,10 @@ slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
[system.iocache]
type=BaseCache
+children=tags
addr_ranges=0:134217727
assoc=8
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
forward_snoops=false
hit_latency=50
is_top_level=true
@@ -242,18 +282,27 @@ prefetcher=Null
response_latency=50
size=1024
system=system
+tags=system.iocache.tags
tgts_per_mshr=12
two_queue=false
write_buffers=8
cpu_side=system.iobus.master[29]
mem_side=system.membus.slave[2]
+[system.iocache.tags]
+type=LRU
+assoc=8
+block_size=64
+clk_domain=system.clk_domain
+hit_latency=50
+size=1024
+
[system.membus]
type=CoherentBus
children=badaddr_responder
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
header_cycles=1
+system=system
use_default_range=false
width=8
default=system.membus.badaddr_responder.pio
@@ -262,7 +311,7 @@ slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
[system.membus.badaddr_responder]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=0
pio_latency=100000
@@ -279,28 +328,35 @@ pio=system.membus.default
[system.physmem]
type=SimpleDRAM
-addr_mapping=openmap
+activation_limit=4
+addr_mapping=RaBaChCo
banks_per_rank=8
-clock=1000
-conf_table_reported=false
+burst_length=8
+channels=1
+clk_domain=system.clk_domain
+conf_table_reported=true
+device_bus_width=8
+device_rowbuffer_size=1024
+devices_per_rank=8
in_addr_map=true
-lines_per_rowbuffer=64
-mem_sched_policy=fcfs
+mem_sched_policy=frfcfs
null=false
page_policy=open
range=0:134217727
ranks_per_channel=2
read_buffer_size=32
-tBURST=4000
-tCL=14000
-tRCD=14000
+static_backend_latency=10000
+static_frontend_latency=10000
+tBURST=5000
+tCL=13750
+tRCD=13750
tREFI=7800000
tRFC=300000
-tRP=14000
-tWTR=1000
+tRP=13750
+tWTR=7500
+tXAW=40000
write_buffer_size=32
write_thresh_perc=70
-zero=false
port=system.membus.master[1]
[system.simple_disk]
@@ -311,7 +367,7 @@ system=system
[system.simple_disk.disk]
type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
+image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.terminal]
@@ -329,7 +385,7 @@ system=system
[system.tsunami.backdoor]
type=AlphaBackdoor
-clock=1000
+clk_domain=system.clk_domain
cpu=system.cpu
disk=system.simple_disk
pio_addr=8804682956800
@@ -341,7 +397,7 @@ pio=system.iobus.master[24]
[system.tsunami.cchip]
type=TsunamiCChip
-clock=1000
+clk_domain=system.clk_domain
pio_addr=8803072344064
pio_latency=100000
system=system
@@ -388,7 +444,7 @@ SubClassCode=0
SubsystemID=0
SubsystemVendorID=0
VendorID=4107
-clock=2000
+clk_domain=system.clk_domain
config_latency=20000
dma_data_free=false
dma_desc_free=false
@@ -419,7 +475,7 @@ pio=system.iobus.master[27]
[system.tsunami.fake_OROM]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8796093677568
pio_latency=100000
@@ -436,7 +492,7 @@ pio=system.iobus.master[8]
[system.tsunami.fake_ata0]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848432
pio_latency=100000
@@ -453,7 +509,7 @@ pio=system.iobus.master[19]
[system.tsunami.fake_ata1]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848304
pio_latency=100000
@@ -470,7 +526,7 @@ pio=system.iobus.master[20]
[system.tsunami.fake_pnp_addr]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848569
pio_latency=100000
@@ -487,7 +543,7 @@ pio=system.iobus.master[9]
[system.tsunami.fake_pnp_read0]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848451
pio_latency=100000
@@ -504,7 +560,7 @@ pio=system.iobus.master[11]
[system.tsunami.fake_pnp_read1]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848515
pio_latency=100000
@@ -521,7 +577,7 @@ pio=system.iobus.master[12]
[system.tsunami.fake_pnp_read2]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848579
pio_latency=100000
@@ -538,7 +594,7 @@ pio=system.iobus.master[13]
[system.tsunami.fake_pnp_read3]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848643
pio_latency=100000
@@ -555,7 +611,7 @@ pio=system.iobus.master[14]
[system.tsunami.fake_pnp_read4]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848707
pio_latency=100000
@@ -572,7 +628,7 @@ pio=system.iobus.master[15]
[system.tsunami.fake_pnp_read5]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848771
pio_latency=100000
@@ -589,7 +645,7 @@ pio=system.iobus.master[16]
[system.tsunami.fake_pnp_read6]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848835
pio_latency=100000
@@ -606,7 +662,7 @@ pio=system.iobus.master[17]
[system.tsunami.fake_pnp_read7]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848899
pio_latency=100000
@@ -623,7 +679,7 @@ pio=system.iobus.master[18]
[system.tsunami.fake_pnp_write]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615850617
pio_latency=100000
@@ -640,7 +696,7 @@ pio=system.iobus.master[10]
[system.tsunami.fake_ppc]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848891
pio_latency=100000
@@ -657,7 +713,7 @@ pio=system.iobus.master[7]
[system.tsunami.fake_sm_chip]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848816
pio_latency=100000
@@ -674,7 +730,7 @@ pio=system.iobus.master[2]
[system.tsunami.fake_uart1]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848696
pio_latency=100000
@@ -691,7 +747,7 @@ pio=system.iobus.master[3]
[system.tsunami.fake_uart2]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848936
pio_latency=100000
@@ -708,7 +764,7 @@ pio=system.iobus.master[4]
[system.tsunami.fake_uart3]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848680
pio_latency=100000
@@ -725,7 +781,7 @@ pio=system.iobus.master[5]
[system.tsunami.fake_uart4]
type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
fake_mem=false
pio_addr=8804615848944
pio_latency=100000
@@ -742,7 +798,7 @@ pio=system.iobus.master[6]
[system.tsunami.fb]
type=BadDevice
-clock=1000
+clk_domain=system.clk_domain
devicename=FrameBuffer
pio_addr=8804615848912
pio_latency=100000
@@ -789,7 +845,7 @@ SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
-clock=1000
+clk_domain=system.clk_domain
config_latency=20000
ctrl_offset=0
disks=system.disk0 system.disk2
@@ -806,7 +862,7 @@ pio=system.iobus.master[25]
[system.tsunami.io]
type=TsunamiIO
-clock=1000
+clk_domain=system.clk_domain
frequency=976562500
pio_addr=8804615847936
pio_latency=100000
@@ -818,7 +874,7 @@ pio=system.iobus.master[22]
[system.tsunami.pchip]
type=TsunamiPChip
-clock=1000
+clk_domain=system.clk_domain
pio_addr=8802535473152
pio_latency=100000
system=system
@@ -828,7 +884,8 @@ pio=system.iobus.master[1]
[system.tsunami.pciconfig]
type=PciConfigAll
bus=0
-clock=1000
+clk_domain=system.clk_domain
+pio_addr=0
pio_latency=30000
platform=system.tsunami
size=16777216
@@ -837,7 +894,7 @@ pio=system.iobus.default
[system.tsunami.uart]
type=Uart8250
-clock=1000
+clk_domain=system.clk_domain
pio_addr=8804615848952
pio_latency=100000
platform=system.tsunami
@@ -845,3 +902,7 @@ system=system
terminal=system.terminal
pio=system.iobus.master[23]
+[system.voltage_domain]
+type=VoltageDomain
+voltage=1.000000
+
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
index c4aa2f920..b63c77b44 100755
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
@@ -3,12 +3,12 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/t
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 23 2013 13:29:14
-gem5 started Jan 23 2013 14:01:49
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Sep 24 2013 03:08:53
+gem5 started Sep 28 2013 03:05:50
+gem5 executing on zizzer
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
+info: kernel located at: /dist/m5/system/binaries/vmlinux
0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 1829330593000 because m5_exit instruction encountered
+Exiting @ tick 1829332269000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
index ee54d11d9..d5ea0605d 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 1.829332 # Nu
sim_ticks 1829332269000 # Number of ticks simulated
final_tick 1829332269000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1710493 # Simulator instruction rate (inst/s)
-host_op_rate 1710492 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 52117657653 # Simulator tick rate (ticks/s)
-host_mem_usage 306192 # Number of bytes of host memory used
-host_seconds 35.10 # Real time elapsed on the host
+host_inst_rate 2947908 # Simulator instruction rate (inst/s)
+host_op_rate 2947905 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 89820884398 # Simulator tick rate (ticks/s)
+host_mem_usage 305960 # Number of bytes of host memory used
+host_seconds 20.37 # Real time elapsed on the host
sim_insts 60038305 # Number of instructions simulated
sim_ops 60038305 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 857984 # Number of bytes read from this memory
@@ -188,15 +188,15 @@ system.physmem.avgGap nan # Av
system.membus.throughput 42552540 # Throughput (bytes/s)
system.membus.data_through_bus 77842734 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
-system.iocache.tags.replacements 41686 # number of replacements
-system.iocache.tags.tagsinuse 1.225570 # Cycle average of tags in use
-system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
-system.iocache.tags.sampled_refs 41702 # Sample count of references to valid blocks.
-system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
-system.iocache.tags.warmup_cycle 1685780659017 # Cycle when the warmup percentage was hit.
-system.iocache.tags.occ_blocks::tsunami.ide 1.225570 # Average occupied blocks per requestor
-system.iocache.tags.occ_percent::tsunami.ide 0.076598 # Average percentage of cache occupancy
-system.iocache.tags.occ_percent::total 0.076598 # Average percentage of cache occupancy
+system.iocache.tags.replacements 41686 # number of replacements
+system.iocache.tags.tagsinuse 1.225570 # Cycle average of tags in use
+system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
+system.iocache.tags.sampled_refs 41702 # Sample count of references to valid blocks.
+system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
+system.iocache.tags.warmup_cycle 1685780659017 # Cycle when the warmup percentage was hit.
+system.iocache.tags.occ_blocks::tsunami.ide 1.225570 # Average occupied blocks per requestor
+system.iocache.tags.occ_percent::tsunami.ide 0.076598 # Average percentage of cache occupancy
+system.iocache.tags.occ_percent::total 0.076598 # Average percentage of cache occupancy
system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses
system.iocache.ReadReq_misses::total 174 # number of ReadReq misses
system.iocache.WriteReq_misses::tsunami.ide 41552 # number of WriteReq misses
@@ -416,15 +416,15 @@ system.tsunami.ethernet.postedInterrupts 0 # nu
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
system.iobus.throughput 1480181 # Throughput (bytes/s)
system.iobus.data_through_bus 2707742 # Total data (bytes)
-system.cpu.icache.tags.replacements 919609 # number of replacements
-system.cpu.icache.tags.tagsinuse 511.215244 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 59129907 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 920121 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 64.263186 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 9686972500 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 511.215244 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.998467 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 919609 # number of replacements
+system.cpu.icache.tags.tagsinuse 511.215244 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 59129907 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 920121 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 64.263186 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 9686972500 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 511.215244 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.998467 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.998467 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 59129907 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 59129907 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 59129907 # number of demand (read+write) hits
@@ -458,19 +458,19 @@ system.cpu.icache.avg_blocked_cycles::no_targets nan
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 992301 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 65424.374219 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 2433263 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 1057464 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 2.301036 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 614754000 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 992301 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 65424.374219 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 2433263 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 1057464 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 2.301036 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 614754000 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 56309.127841 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 4867.327126 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 4247.919252 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 4867.327126 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 4247.919252 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.859209 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.074270 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.064818 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.998297 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.998297 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 906812 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 811232 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 1718044 # number of ReadReq hits
@@ -538,15 +538,15 @@ system.cpu.l2cache.cache_copies 0 # nu
system.cpu.l2cache.writebacks::writebacks 74291 # number of writebacks
system.cpu.l2cache.writebacks::total 74291 # number of writebacks
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 2042706 # number of replacements
-system.cpu.dcache.tags.tagsinuse 511.997802 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 14038427 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 2043218 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 6.870744 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.999996 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 2042706 # number of replacements
+system.cpu.dcache.tags.tagsinuse 511.997802 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 14038427 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 2043218 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 6.870744 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.999996 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 7807777 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 7807777 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 5848211 # number of WriteReq hits