diff options
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/config.json')
| -rw-r--r-- | tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/config.json | 65 |
1 files changed, 43 insertions, 22 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/config.json b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/config.json index 47529e9ec..9c5707f32 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/config.json +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/config.json @@ -88,6 +88,7 @@ "early_kernel_symbols": false, "panic_on_oops": true, "dtb_filename": "/scratch/nilay/GEM5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb", + "panic_on_panic": true, "enable_context_switch_stats_dump": false, "work_begin_ckpt_count": 0, "clk_domain": { @@ -896,7 +897,7 @@ "MSIXCAPNextCapability": 0, "PXCAPLinkCtrl": 0, "Revision": 0, - "hardware_address": "<m5.params.EthernetAddr object at 0x488d6d0>", + "hardware_address": "<m5.params.EthernetAddr object at 0x4626a90>", "LegacyIOBase": 0, "pio_latency": 30000, "platform": "system.realview", @@ -1168,13 +1169,14 @@ "use_default_range": false, "frontend_latency": 3 }, - "panic_on_panic": true, + "multi_thread": false, "eventq_index": 0, "iocache": { "cpu_side": { "peer": "system.iobus.master[27]", "role": "SLAVE" }, + "clusivity": "mostly_incl", "prefetcher": null, "clk_domain": "system.clk_domain", "write_buffers": 8, @@ -1201,11 +1203,12 @@ "peer": "system.membus.slave[3]", "role": "MASTER" }, - "mshrs": 20, + "type": "Cache", "forward_snoops": false, + "writeback_clean": false, "hit_latency": 50, - "demand_mshr_reserve": 1, "tgts_per_mshr": 12, + "demand_mshr_reserve": 1, "addr_ranges": [ "2147483648:2415919103" ], @@ -1213,7 +1216,7 @@ "prefetch_on_access": false, "path": "system.iocache", "name": "iocache", - "type": "Cache", + "mshrs": 20, "sequential_access": false, "assoc": 8 }, @@ -1382,7 +1385,16 @@ "role": "SLAVE" }, "name": "toL2Bus", - "snoop_filter": null, + "snoop_filter": { + "name": "snoop_filter", + "system": "system", + "max_capacity": 8388608, + "eventq_index": 0, + "cxx_class": "SnoopFilter", + "path": "system.cpu.toL2Bus.snoop_filter", + "type": "SnoopFilter", + "lookup_latency": 0 + }, "forward_latency": 0, "clk_domain": "system.cpu_clk_domain", "system": "system", @@ -1415,6 +1427,7 @@ "peer": "system.cpu.icache_port", "role": "SLAVE" }, + "clusivity": "mostly_incl", "prefetcher": null, "clk_domain": "system.cpu_clk_domain", "write_buffers": 8, @@ -1441,11 +1454,12 @@ "peer": "system.cpu.toL2Bus.slave[0]", "role": "MASTER" }, - "mshrs": 4, + "type": "Cache", "forward_snoops": true, + "writeback_clean": true, "hit_latency": 2, - "demand_mshr_reserve": 1, "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, "addr_ranges": [ "0:18446744073709551615" ], @@ -1453,17 +1467,19 @@ "prefetch_on_access": false, "path": "system.cpu.icache", "name": "icache", - "type": "Cache", + "mshrs": 4, "sequential_access": false, "assoc": 1 }, - "interrupts": { - "eventq_index": 0, - "path": "system.cpu.interrupts", - "type": "ArmInterrupts", - "name": "interrupts", - "cxx_class": "ArmISA::Interrupts" - }, + "interrupts": [ + { + "eventq_index": 0, + "path": "system.cpu.interrupts", + "type": "ArmInterrupts", + "name": "interrupts", + "cxx_class": "ArmISA::Interrupts" + } + ], "dcache_port": { "peer": "system.cpu.dcache.cpu_side", "role": "MASTER" @@ -1504,6 +1520,7 @@ "peer": "system.cpu.toL2Bus.master[0]", "role": "SLAVE" }, + "clusivity": "mostly_incl", "prefetcher": null, "clk_domain": "system.cpu_clk_domain", "write_buffers": 8, @@ -1530,11 +1547,12 @@ "peer": "system.membus.slave[2]", "role": "MASTER" }, - "mshrs": 20, + "type": "Cache", "forward_snoops": true, + "writeback_clean": false, "hit_latency": 20, - "demand_mshr_reserve": 1, "tgts_per_mshr": 12, + "demand_mshr_reserve": 1, "addr_ranges": [ "0:18446744073709551615" ], @@ -1542,7 +1560,7 @@ "prefetch_on_access": false, "path": "system.cpu.l2cache", "name": "l2cache", - "type": "Cache", + "mshrs": 20, "sequential_access": false, "assoc": 8 }, @@ -1585,6 +1603,7 @@ "peer": "system.cpu.dcache_port", "role": "SLAVE" }, + "clusivity": "mostly_incl", "prefetcher": null, "clk_domain": "system.cpu_clk_domain", "write_buffers": 8, @@ -1611,11 +1630,12 @@ "peer": "system.cpu.toL2Bus.slave[1]", "role": "MASTER" }, - "mshrs": 4, + "type": "Cache", "forward_snoops": true, + "writeback_clean": false, "hit_latency": 2, - "demand_mshr_reserve": 1, "tgts_per_mshr": 20, + "demand_mshr_reserve": 1, "addr_ranges": [ "0:18446744073709551615" ], @@ -1623,7 +1643,7 @@ "prefetch_on_access": false, "path": "system.cpu.dcache", "name": "dcache", - "type": "Cache", + "mshrs": 4, "sequential_access": false, "assoc": 4 }, @@ -1654,6 +1674,7 @@ "id_aa64dfr0_el1": 1052678, "path": "system.cpu.isa", "id_aa64isar0_el1": 0, + "decoderFlavour": "Generic", "name": "isa", "midr": 1091551472, "id_aa64afr0_el1": 0, |