diff options
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing')
4 files changed, 53 insertions, 17 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini index 925b86307..ea47afb6b 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini @@ -12,7 +12,7 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain atags_addr=256 -boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm +boot_loader=/dist/binaries/boot.arm boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 cache_line_size=64 clk_domain=system.clk_domain @@ -23,7 +23,7 @@ eventq_index=0 flags_addr=268435504 gic_cpu_addr=520093952 init_param=0 -kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +kernel=/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=timing @@ -75,7 +75,7 @@ table_size=65536 [system.cf0.image.child] type=RawDiskImage eventq_index=0 -image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img +image_file=/dist/disks/linux-arm-ael.img read_only=true [system.clk_domain] @@ -130,6 +130,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=32768 system=system tags=system.cpu.dcache.tags @@ -146,6 +147,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=2 +sequential_access=false size=32768 [system.cpu.dtb] @@ -178,6 +180,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=32768 system=system tags=system.cpu.icache.tags @@ -194,6 +197,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=2 +sequential_access=false size=32768 [system.cpu.interrupts] @@ -248,6 +252,7 @@ mshrs=20 prefetch_on_access=false prefetcher=Null response_latency=20 +sequential_access=false size=4194304 system=system tags=system.cpu.l2cache.tags @@ -264,6 +269,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=20 +sequential_access=false size=4194304 [system.cpu.toL2Bus] @@ -317,6 +323,7 @@ mshrs=20 prefetch_on_access=false prefetcher=Null response_latency=50 +sequential_access=false size=1024 system=system tags=system.iocache.tags @@ -333,6 +340,7 @@ block_size=64 clk_domain=system.clk_domain eventq_index=0 hit_latency=50 +sequential_access=false size=1024 [system.membus] diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr index eda827fb8..41742298b 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr @@ -1,7 +1,6 @@ warn: Sockets disabled, not accepting vnc client connections warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections -warn: DTB file specified, but no device tree support in kernel warn: The clidr register always reports 0 caches. warn: clidr LoUIS field of 0b001 to match current ARM implementations. warn: The csselr register isn't implemented. @@ -14,4 +13,3 @@ warn: instruction 'mcr icimvau' unimplemented warn: LCD dual screen mode not supported warn: instruction 'mcr icialluis' unimplemented warn: instruction 'mcr bpiallis' unimplemented -hack: be nice to actually delete the event here diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout index b95a8c30f..866b5bc98 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout @@ -1,14 +1,12 @@ -Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing/simout -Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 08:14:19 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 17:24:06 +gem5 started Jan 22 2014 17:31:30 +gem5 executing on u200540-lin command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-timing Global frequency set at 1000000000000 ticks per second -info: kernel located at: /dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 +info: kernel located at: /dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 info: Using bootloader at address 0x80000000 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 2615716222000 because m5_exit instruction encountered +Exiting @ tick 2616536483000 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt index df8a2beae..9c560044d 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt @@ -4,13 +4,15 @@ sim_seconds 2.616536 # Nu sim_ticks 2616536483000 # Number of ticks simulated final_tick 2616536483000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 343075 # Simulator instruction rate (inst/s) -host_op_rate 436578 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 14912044248 # Simulator tick rate (ticks/s) -host_mem_usage 444348 # Number of bytes of host memory used -host_seconds 175.46 # Real time elapsed on the host +host_inst_rate 577538 # Simulator instruction rate (inst/s) +host_op_rate 734941 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 25103147507 # Simulator tick rate (ticks/s) +host_mem_usage 400220 # Number of bytes of host memory used +host_seconds 104.23 # Real time elapsed on the host sim_insts 60197580 # Number of instructions simulated sim_ops 76603973 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory @@ -811,6 +813,7 @@ system.iobus.respLayer0.occupancy 2374820000 # La system.iobus.respLayer0.utilization 0.1 # Layer utilization (%) system.iobus.respLayer1.occupancy 42035380750 # Layer occupancy (ticks) system.iobus.respLayer1.utilization 1.6 # Layer utilization (%) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.inst_hits 0 # ITB inst hits system.cpu.dtb.inst_misses 0 # ITB inst misses system.cpu.dtb.read_hits 14995644 # DTB read hits @@ -886,6 +889,14 @@ system.cpu.icache.tags.warmup_cycle 19982971250 # Cy system.cpu.icache.tags.occ_blocks::cpu.inst 510.868538 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.997790 # Average percentage of cache occupancy system.cpu.icache.tags.occ_percent::total 0.997790 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 44 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 195 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 267 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::3 6 # Occupied blocks per task id +system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.icache.tags.tag_accesses 62348185 # Number of tag accesses +system.cpu.icache.tags.data_accesses 62348185 # Number of data accesses system.cpu.icache.ReadReq_hits::cpu.inst 60634641 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 60634641 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 60634641 # number of demand (read+write) hits @@ -980,6 +991,18 @@ system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000000 system.cpu.l2cache.tags.occ_percent::cpu.inst 0.106711 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.092147 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::total 0.774455 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_task_id_blocks::1023 4 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_blocks::1024 65378 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1023::4 4 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 28 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::1 22 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 2163 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 6898 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 56267 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1023 0.000061 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.997589 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 17137304 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 17137304 # Number of data accesses system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 8705 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3532 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.inst 844551 # number of ReadReq hits @@ -1210,6 +1233,13 @@ system.cpu.dcache.tags.warmup_cycle 664004250 # Cy system.cpu.dcache.tags.occ_blocks::cpu.data 511.876746 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.999759 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_percent::total 0.999759 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 74 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 329 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 109 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 97755015 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 97755015 # Number of data accesses system.cpu.dcache.ReadReq_hits::cpu.data 13195741 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 13195741 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 9972594 # number of WriteReq hits @@ -1375,6 +1405,8 @@ system.iocache.tags.total_refs 0 # To system.iocache.tags.sampled_refs 0 # Sample count of references to valid blocks. system.iocache.tags.avg_refs nan # Average number of references to valid blocks. system.iocache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.iocache.tags.tag_accesses 0 # Number of tag accesses +system.iocache.tags.data_accesses 0 # Number of data accesses system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked |