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diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt
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+
+---------- Begin Simulation Statistics ----------
+sim_seconds 5.317975 # Number of seconds simulated
+sim_ticks 5317975489500 # Number of ticks simulated
+final_tick 5317975489500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_freq 1000000000000 # Frequency of simulated ticks
+host_inst_rate 136334 # Simulator instruction rate (inst/s)
+host_op_rate 282983 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 5550018922 # Simulator tick rate (ticks/s)
+host_mem_usage 546352 # Number of bytes of host memory used
+host_seconds 958.19 # Real time elapsed on the host
+sim_insts 130634065 # Number of instructions simulated
+sim_ops 271151330 # Number of ops (including micro ops) simulated
+system.physmem.bytes_read 1385454984 # Number of bytes read from this memory
+system.physmem.bytes_inst_read 1291299576 # Number of instructions bytes read from this memory
+system.physmem.bytes_written 72060789 # Number of bytes written to this memory
+system.physmem.num_reads 177292929 # Number of read requests responded to by this memory
+system.physmem.num_writes 10101818 # Number of write requests responded to by this memory
+system.physmem.num_other 0 # Number of other requests responded to by this memory
+system.physmem.bw_read 260523010 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read 242817888 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write 13550418 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total 274073428 # Total bandwidth to/from this memory (bytes/s)
+system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD).
+system.pc.south_bridge.ide.disks0.dma_read_txs 29 # Number of DMA read transactions (not PRD).
+system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes.
+system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes.
+system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions.
+system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes.
+system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes.
+system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions.
+system.cpu0.numCycles 10635950979 # number of cpu cycles simulated
+system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu0.committedInsts 112896478 # Number of instructions committed
+system.cpu0.committedOps 236092299 # Number of ops (including micro ops) committed
+system.cpu0.num_int_alu_accesses 215933401 # Number of integer alu accesses
+system.cpu0.num_fp_alu_accesses 0 # Number of float alu accesses
+system.cpu0.num_func_calls 0 # number of times a function call or return occured
+system.cpu0.num_conditional_control_insts 22693697 # number of instructions that are conditional controls
+system.cpu0.num_int_insts 215933401 # number of integer instructions
+system.cpu0.num_fp_insts 0 # number of float instructions
+system.cpu0.num_int_register_reads 463804902 # number of times the integer registers were read
+system.cpu0.num_int_register_writes 225947677 # number of times the integer registers were written
+system.cpu0.num_fp_register_reads 0 # number of times the floating registers were read
+system.cpu0.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu0.num_mem_refs 25657945 # number of memory refs
+system.cpu0.num_load_insts 18885621 # Number of load instructions
+system.cpu0.num_store_insts 6772324 # Number of store instructions
+system.cpu0.num_idle_cycles 9920814224.934135 # Number of idle cycles
+system.cpu0.num_busy_cycles 715136754.065866 # Number of busy cycles
+system.cpu0.not_idle_fraction 0.067238 # Percentage of non-idle cycles
+system.cpu0.idle_fraction 0.932762 # Percentage of idle cycles
+system.cpu0.kern.inst.arm 0 # number of arm instructions executed
+system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed
+system.cpu1.numCycles 10633730672 # number of cpu cycles simulated
+system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu1.committedInsts 17737587 # Number of instructions committed
+system.cpu1.committedOps 35059031 # Number of ops (including micro ops) committed
+system.cpu1.num_int_alu_accesses 33696414 # Number of integer alu accesses
+system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses
+system.cpu1.num_func_calls 0 # number of times a function call or return occured
+system.cpu1.num_conditional_control_insts 2413897 # number of instructions that are conditional controls
+system.cpu1.num_int_insts 33696414 # number of integer instructions
+system.cpu1.num_fp_insts 0 # number of float instructions
+system.cpu1.num_int_register_reads 76064273 # number of times the integer registers were read
+system.cpu1.num_int_register_writes 32516586 # number of times the integer registers were written
+system.cpu1.num_fp_register_reads 0 # number of times the floating registers were read
+system.cpu1.num_fp_register_writes 0 # number of times the floating registers were written
+system.cpu1.num_mem_refs 8183613 # number of memory refs
+system.cpu1.num_load_insts 4592243 # Number of load instructions
+system.cpu1.num_store_insts 3591370 # Number of store instructions
+system.cpu1.num_idle_cycles 10491161304.078011 # Number of idle cycles
+system.cpu1.num_busy_cycles 142569367.921989 # Number of busy cycles
+system.cpu1.not_idle_fraction 0.013407 # Percentage of non-idle cycles
+system.cpu1.idle_fraction 0.986593 # Percentage of idle cycles
+system.cpu1.kern.inst.arm 0 # number of arm instructions executed
+system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed
+
+---------- End Simulation Statistics ----------